2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * SPDX-License-Identifier: GPL-2.0+
14 #include <config_cmd_default.h>
17 * High Level Board Configuration Options
21 #define machine_is_efikamx() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
22 #define machine_is_efikasb() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
24 #include <asm/arch/imx-regs.h>
26 #define CONFIG_DISPLAY_CPUINFO
27 #define CONFIG_DISPLAY_BOARDINFO
29 #define CONFIG_SYS_TEXT_BASE 0x97800000
31 #define CONFIG_SYS_ICACHE_OFF
32 #define CONFIG_SYS_DCACHE_OFF
35 * Bootloader Components Configuration
37 #define CONFIG_CMD_SPI
39 #define CONFIG_CMD_MMC
40 #define CONFIG_CMD_FAT
41 #define CONFIG_CMD_EXT2
42 #define CONFIG_CMD_IDE
43 #define CONFIG_CMD_DATE
44 #undef CONFIG_CMD_IMLS
47 * Environmental settings
50 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
51 #define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
52 #define CONFIG_ENV_SIZE (4 * 1024)
57 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
58 #define CONFIG_REVISION_TAG
59 #define CONFIG_SETUP_MEMORY_TAGS
60 #define CONFIG_INITRD_TAG
62 #define CONFIG_OF_LIBFDT 1
65 * Size of malloc() pool
67 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
69 #define CONFIG_BOARD_EARLY_INIT_F
70 #define CONFIG_BOARD_LATE_INIT
75 #define CONFIG_MXC_UART
76 #define CONFIG_MXC_UART_BASE UART1_BASE
77 #define CONFIG_CONS_INDEX 1
78 #define CONFIG_BAUDRATE 115200
80 #define CONFIG_MXC_GPIO
87 #define CONFIG_HARD_SPI
88 #define CONFIG_MXC_SPI
89 #define CONFIG_DEFAULT_SPI_BUS 1
90 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
95 #define CONFIG_SPI_FLASH_SST
96 #define CONFIG_SF_DEFAULT_CS 1
97 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
98 #define CONFIG_SF_DEFAULT_SPEED 25000000
100 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
101 #define CONFIG_ENV_SPI_BUS 0
102 #define CONFIG_ENV_SPI_MAX_HZ 25000000
103 #define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
104 #define CONFIG_FSL_ENV_IN_SF
105 #define CONFIG_ENV_IS_IN_SPI_FLASH
106 #define CONFIG_SYS_NO_FLASH
109 #define CONFIG_ENV_IS_NOWHERE
114 #define CONFIG_POWER_SPI
115 #define CONFIG_POWER_FSL
116 #define CONFIG_FSL_PMIC_BUS 0
117 #define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
118 #define CONFIG_FSL_PMIC_CLK 25000000
119 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
120 #define CONFIG_FSL_PMIC_BITLEN 32
121 #define CONFIG_RTC_MC13XXX
127 #ifdef CONFIG_CMD_MMC
129 #define CONFIG_GENERIC_MMC
130 #define CONFIG_FSL_ESDHC
131 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
132 #define CONFIG_SYS_FSL_ESDHC_NUM 2
138 #ifdef CONFIG_CMD_IDE
140 #undef CONFIG_IDE_LED
141 #undef CONFIG_IDE_RESET
143 #define CONFIG_MX51_PATA
147 #define CONFIG_SYS_IDE_MAXBUS 1
148 #define CONFIG_SYS_IDE_MAXDEVICE 1
150 #define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
151 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
153 #define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
154 #define CONFIG_SYS_ATA_REG_OFFSET 0xa0
155 #define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
157 #define CONFIG_SYS_ATA_STRIDE 4
159 #define CONFIG_IDE_PREINIT
160 #define CONFIG_MXC_ATA_PIO_MODE 4
166 #define CONFIG_CMD_USB
167 #ifdef CONFIG_CMD_USB
168 #define CONFIG_USB_EHCI /* Enable EHCI USB support */
169 #define CONFIG_USB_EHCI_MX5
170 #define CONFIG_USB_ULPI
171 #define CONFIG_USB_ULPI_VIEWPORT
172 #define CONFIG_MXC_USB_PORT 1
173 #if (CONFIG_MXC_USB_PORT == 0)
174 #define CONFIG_MXC_USB_PORTSC (1 << 28)
175 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_INTERNAL_PHY
177 #define CONFIG_MXC_USB_PORTSC (2 << 30)
178 #define CONFIG_MXC_USB_FLAGS 0
180 #define CONFIG_EHCI_IS_TDI
181 #define CONFIG_USB_STORAGE
182 #define CONFIG_USB_HOST_ETHER
183 #define CONFIG_USB_KEYBOARD
184 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
185 #define CONFIG_PREBOOT
187 #ifdef CONFIG_CMD_NET
188 #define CONFIG_USB_ETHER_ASIX
189 #define CONFIG_CMD_PING
190 #define CONFIG_CMD_DHCP
192 #endif /* CONFIG_CMD_USB */
197 #ifdef CONFIG_CMD_FAT
198 #define CONFIG_DOS_PARTITION
199 #ifdef CONFIG_CMD_NET
200 #define CONFIG_CMD_NFS
205 * Miscellaneous configurable options
207 #define CONFIG_ENV_OVERWRITE
208 #define CONFIG_BOOTDELAY 3
209 #define CONFIG_LOADADDR 0x90800000
211 #define CONFIG_SYS_LONGHELP /* undef to save memory */
212 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
213 #define CONFIG_SYS_PROMPT "Efika> "
214 #define CONFIG_AUTO_COMPLETE
215 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
216 /* Print Buffer Size */
217 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
218 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
219 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
221 #define CONFIG_SYS_MEMTEST_START 0x90000000
222 #define CONFIG_SYS_MEMTEST_END 0x90010000
224 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
226 #define CONFIG_CMDLINE_EDITING
228 /*-----------------------------------------------------------------------
229 * Physical Memory Map
231 #define CONFIG_NR_DRAM_BANKS 1
232 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
233 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
235 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
236 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
237 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
239 #define CONFIG_SYS_INIT_SP_OFFSET \
240 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
241 #define CONFIG_SYS_INIT_SP_ADDR \
242 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
244 #define CONFIG_SYS_DDR_CLKSEL 0
245 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35145
246 #define CONFIG_SYS_MAIN_PWR_ON