2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6SL EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "mx6_common.h"
14 #define CONFIG_DISPLAY_CPUINFO
15 #define CONFIG_DISPLAY_BOARDINFO
17 #define MACH_TYPE_MX6SLEVK 4307
18 #define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK
20 #define CONFIG_CMDLINE_TAG
21 #define CONFIG_SETUP_MEMORY_TAGS
22 #define CONFIG_INITRD_TAG
23 #define CONFIG_REVISION_TAG
25 #define CONFIG_SYS_GENERIC_BOARD
27 /* Size of malloc() pool */
28 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
30 #define CONFIG_BOARD_EARLY_INIT_F
31 #define CONFIG_MXC_GPIO
33 #define CONFIG_MXC_UART
34 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
37 #define CONFIG_FSL_ESDHC
38 #define CONFIG_FSL_USDHC
39 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
42 #define CONFIG_CMD_MMC
43 #define CONFIG_GENERIC_MMC
44 #define CONFIG_CMD_FAT
45 #define CONFIG_DOS_PARTITION
48 #define CONFIG_CMD_I2C
49 #define CONFIG_SYS_I2C
50 #define CONFIG_SYS_I2C_MXC
51 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
52 #define CONFIG_SYS_I2C_SPEED 100000
56 #define CONFIG_POWER_I2C
57 #define CONFIG_POWER_PFUZE100
58 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
60 #define CONFIG_CMD_PING
61 #define CONFIG_CMD_DHCP
62 #define CONFIG_CMD_MII
63 #define CONFIG_CMD_NET
64 #define CONFIG_FEC_MXC
66 #define IMX_FEC_BASE ENET_BASE_ADDR
67 #define CONFIG_FEC_XCV_TYPE RMII
68 #define CONFIG_ETHPRIME "FEC"
69 #define CONFIG_FEC_MXC_PHYADDR 0
72 #define CONFIG_PHY_SMSC
74 /* allow to overwrite serial and ethaddr */
75 #define CONFIG_ENV_OVERWRITE
76 #define CONFIG_CONS_INDEX 1
77 #define CONFIG_BAUDRATE 115200
79 /* Command definition */
81 #define CONFIG_BOOTDELAY 3
83 #define CONFIG_LOADADDR 0x82000000
84 #define CONFIG_SYS_TEXT_BASE 0x87800000
86 #define CONFIG_EXTRA_ENV_SETTINGS \
90 "fdt_high=0xffffffff\0" \
91 "initrd_high=0xffffffff\0" \
92 "fdt_file=imx6sl-evk-ldo.dtb\0" \
93 "fdt_addr=0x88000000\0" \
98 "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
99 "mmcargs=setenv bootargs console=${console},${baudrate} " \
100 "root=${mmcroot}\0" \
102 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
103 "bootscript=echo Running bootscript from mmc ...; " \
105 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
106 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
107 "mmcboot=echo Booting from mmc ...; " \
109 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
110 "if run loadfdt; then " \
111 "bootz ${loadaddr} - ${fdt_addr}; " \
113 "if test ${boot_fdt} = try; then " \
116 "echo WARN: Cannot load the DT; " \
122 "netargs=setenv bootargs console=${console},${baudrate} " \
124 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
125 "netboot=echo Booting from net ...; " \
127 "if test ${ip_dyn} = yes; then " \
128 "setenv get_cmd dhcp; " \
130 "setenv get_cmd tftp; " \
132 "${get_cmd} ${image}; " \
133 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
134 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
135 "bootz ${loadaddr} - ${fdt_addr}; " \
137 "if test ${boot_fdt} = try; then " \
140 "echo WARN: Cannot load the DT; " \
147 #define CONFIG_BOOTCOMMAND \
148 "mmc dev ${mmcdev};" \
149 "mmc dev ${mmcdev}; if mmc rescan; then " \
150 "if run loadbootscript; then " \
153 "if run loadimage; then " \
155 "else run netboot; " \
158 "else run netboot; fi"
160 /* Miscellaneous configurable options */
161 #define CONFIG_SYS_LONGHELP
162 #define CONFIG_SYS_HUSH_PARSER
163 #define CONFIG_AUTO_COMPLETE
164 #define CONFIG_SYS_CBSIZE 256
166 #define CONFIG_SYS_MAXARGS 16
167 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
169 #define CONFIG_SYS_MEMTEST_START 0x80000000
170 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
172 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
174 #define CONFIG_CMDLINE_EDITING
175 #define CONFIG_STACKSIZE SZ_128K
177 /* Physical Memory Map */
178 #define CONFIG_NR_DRAM_BANKS 1
179 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
180 #define PHYS_SDRAM_SIZE SZ_1G
182 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
183 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
184 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
186 #define CONFIG_SYS_INIT_SP_OFFSET \
187 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
188 #define CONFIG_SYS_INIT_SP_ADDR \
189 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
191 /* Environment organization */
192 #define CONFIG_ENV_SIZE SZ_8K
194 #if defined CONFIG_SYS_BOOT_SPINOR
195 #define CONFIG_ENV_IS_IN_SPI_FLASH
196 #define CONFIG_ENV_OFFSET (768 * 1024)
197 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
198 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
199 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
200 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
201 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
203 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
204 #define CONFIG_ENV_IS_IN_MMC
207 #define CONFIG_OF_LIBFDT
208 #define CONFIG_CMD_BOOTZ
210 #ifndef CONFIG_SYS_DCACHE_OFF
211 #define CONFIG_CMD_CACHE
214 #define CONFIG_CMD_SF
216 #define CONFIG_SPI_FLASH
217 #define CONFIG_SPI_FLASH_STMICRO
218 #define CONFIG_MXC_SPI
219 #define CONFIG_SF_DEFAULT_BUS 0
220 #define CONFIG_SF_DEFAULT_CS 0
221 #define CONFIG_SF_DEFAULT_SPEED 20000000
222 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
226 #define CONFIG_CMD_USB
227 #ifdef CONFIG_CMD_USB
228 #define CONFIG_USB_EHCI
229 #define CONFIG_USB_EHCI_MX6
230 #define CONFIG_USB_STORAGE
231 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
232 #define CONFIG_USB_HOST_ETHER
233 #define CONFIG_USB_ETHER_ASIX
234 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
235 #define CONFIG_MXC_USB_FLAGS 0
236 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
239 #define CONFIG_SYS_FSL_USDHC_NUM 3
240 #if defined(CONFIG_ENV_IS_IN_MMC)
241 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
244 #define CONFIG_IMX6_THERMAL
246 #define CONFIG_CMD_FUSE
247 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
248 #define CONFIG_MXC_OCOTP
251 #endif /* __CONFIG_H */