2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6SL EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "mx6_common.h"
14 #define MACH_TYPE_MX6SLEVK 4307
15 #define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
20 #define CONFIG_BOARD_EARLY_INIT_F
21 #define CONFIG_MXC_GPIO
23 #define CONFIG_MXC_UART
24 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
27 #define CONFIG_FSL_ESDHC
28 #define CONFIG_FSL_USDHC
29 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
32 #define CONFIG_CMD_MMC
33 #define CONFIG_GENERIC_MMC
34 #define CONFIG_CMD_FAT
35 #define CONFIG_DOS_PARTITION
38 #define CONFIG_CMD_I2C
39 #define CONFIG_SYS_I2C
40 #define CONFIG_SYS_I2C_MXC
41 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
42 #define CONFIG_SYS_I2C_SPEED 100000
46 #define CONFIG_POWER_I2C
47 #define CONFIG_POWER_PFUZE100
48 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
50 #define CONFIG_CMD_PING
51 #define CONFIG_CMD_DHCP
52 #define CONFIG_CMD_MII
53 #define CONFIG_CMD_NET
54 #define CONFIG_FEC_MXC
56 #define IMX_FEC_BASE ENET_BASE_ADDR
57 #define CONFIG_FEC_XCV_TYPE RMII
58 #define CONFIG_ETHPRIME "FEC"
59 #define CONFIG_FEC_MXC_PHYADDR 0
62 #define CONFIG_PHY_SMSC
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66 #define CONFIG_CONS_INDEX 1
67 #define CONFIG_BAUDRATE 115200
69 /* Command definition */
71 #define CONFIG_BOOTDELAY 3
73 #define CONFIG_LOADADDR 0x82000000
74 #define CONFIG_SYS_TEXT_BASE 0x87800000
76 #define CONFIG_EXTRA_ENV_SETTINGS \
80 "fdt_high=0xffffffff\0" \
81 "initrd_high=0xffffffff\0" \
82 "fdt_file=imx6sl-evk-ldo.dtb\0" \
83 "fdt_addr=0x88000000\0" \
88 "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
89 "mmcargs=setenv bootargs console=${console},${baudrate} " \
92 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
93 "bootscript=echo Running bootscript from mmc ...; " \
95 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
96 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
97 "mmcboot=echo Booting from mmc ...; " \
99 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
100 "if run loadfdt; then " \
101 "bootz ${loadaddr} - ${fdt_addr}; " \
103 "if test ${boot_fdt} = try; then " \
106 "echo WARN: Cannot load the DT; " \
112 "netargs=setenv bootargs console=${console},${baudrate} " \
114 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
115 "netboot=echo Booting from net ...; " \
117 "if test ${ip_dyn} = yes; then " \
118 "setenv get_cmd dhcp; " \
120 "setenv get_cmd tftp; " \
122 "${get_cmd} ${image}; " \
123 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
124 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
125 "bootz ${loadaddr} - ${fdt_addr}; " \
127 "if test ${boot_fdt} = try; then " \
130 "echo WARN: Cannot load the DT; " \
137 #define CONFIG_BOOTCOMMAND \
138 "mmc dev ${mmcdev};" \
139 "mmc dev ${mmcdev}; if mmc rescan; then " \
140 "if run loadbootscript; then " \
143 "if run loadimage; then " \
145 "else run netboot; " \
148 "else run netboot; fi"
150 /* Miscellaneous configurable options */
151 #define CONFIG_SYS_LONGHELP
152 #define CONFIG_SYS_HUSH_PARSER
153 #define CONFIG_AUTO_COMPLETE
154 #define CONFIG_SYS_CBSIZE 256
156 #define CONFIG_SYS_MAXARGS 16
157 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
159 #define CONFIG_SYS_MEMTEST_START 0x80000000
160 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
162 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
164 #define CONFIG_CMDLINE_EDITING
165 #define CONFIG_STACKSIZE SZ_128K
167 /* Physical Memory Map */
168 #define CONFIG_NR_DRAM_BANKS 1
169 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
170 #define PHYS_SDRAM_SIZE SZ_1G
172 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
173 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
174 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
176 #define CONFIG_SYS_INIT_SP_OFFSET \
177 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
178 #define CONFIG_SYS_INIT_SP_ADDR \
179 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
181 /* Environment organization */
182 #define CONFIG_ENV_SIZE SZ_8K
184 #if defined CONFIG_SYS_BOOT_SPINOR
185 #define CONFIG_ENV_IS_IN_SPI_FLASH
186 #define CONFIG_ENV_OFFSET (768 * 1024)
187 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
188 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
189 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
190 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
191 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
193 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
194 #define CONFIG_ENV_IS_IN_MMC
197 #define CONFIG_OF_LIBFDT
198 #define CONFIG_CMD_BOOTZ
200 #ifndef CONFIG_SYS_DCACHE_OFF
201 #define CONFIG_CMD_CACHE
204 #define CONFIG_CMD_SF
206 #define CONFIG_SPI_FLASH
207 #define CONFIG_SPI_FLASH_STMICRO
208 #define CONFIG_MXC_SPI
209 #define CONFIG_SF_DEFAULT_BUS 0
210 #define CONFIG_SF_DEFAULT_CS 0
211 #define CONFIG_SF_DEFAULT_SPEED 20000000
212 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
216 #define CONFIG_CMD_USB
217 #ifdef CONFIG_CMD_USB
218 #define CONFIG_USB_EHCI
219 #define CONFIG_USB_EHCI_MX6
220 #define CONFIG_USB_STORAGE
221 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
222 #define CONFIG_USB_HOST_ETHER
223 #define CONFIG_USB_ETHER_ASIX
224 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
225 #define CONFIG_MXC_USB_FLAGS 0
226 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
229 #define CONFIG_SYS_FSL_USDHC_NUM 3
230 #if defined(CONFIG_ENV_IS_IN_MMC)
231 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
234 #define CONFIG_IMX6_THERMAL
236 #define CONFIG_CMD_FUSE
237 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
238 #define CONFIG_MXC_OCOTP
241 #endif /* __CONFIG_H */