2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6SL EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/imx-regs.h>
13 #include <asm/imx-common/gpio.h>
14 #include <linux/sizes.h>
15 #include "mx6_common.h"
17 #define CONFIG_DISPLAY_CPUINFO
18 #define CONFIG_DISPLAY_BOARDINFO
20 #define MACH_TYPE_MX6SLEVK 4307
21 #define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK
23 #define CONFIG_CMDLINE_TAG
24 #define CONFIG_SETUP_MEMORY_TAGS
25 #define CONFIG_INITRD_TAG
26 #define CONFIG_REVISION_TAG
28 #define CONFIG_SYS_GENERIC_BOARD
30 /* Size of malloc() pool */
31 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
33 #define CONFIG_BOARD_EARLY_INIT_F
34 #define CONFIG_MXC_GPIO
36 #define CONFIG_MXC_UART
37 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
40 #define CONFIG_FSL_ESDHC
41 #define CONFIG_FSL_USDHC
42 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
45 #define CONFIG_CMD_MMC
46 #define CONFIG_GENERIC_MMC
47 #define CONFIG_CMD_FAT
48 #define CONFIG_DOS_PARTITION
50 #define CONFIG_CMD_PING
51 #define CONFIG_CMD_DHCP
52 #define CONFIG_CMD_MII
53 #define CONFIG_CMD_NET
54 #define CONFIG_FEC_MXC
56 #define IMX_FEC_BASE ENET_BASE_ADDR
57 #define CONFIG_FEC_XCV_TYPE RMII
58 #define CONFIG_ETHPRIME "FEC"
59 #define CONFIG_FEC_MXC_PHYADDR 0
62 #define CONFIG_PHY_SMSC
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66 #define CONFIG_CONS_INDEX 1
67 #define CONFIG_BAUDRATE 115200
69 /* Command definition */
70 #include <config_cmd_default.h>
72 #undef CONFIG_CMD_IMLS
74 #define CONFIG_BOOTDELAY 3
76 #define CONFIG_LOADADDR 0x82000000
77 #define CONFIG_SYS_TEXT_BASE 0x87800000
79 #define CONFIG_EXTRA_ENV_SETTINGS \
83 "fdt_high=0xffffffff\0" \
84 "initrd_high=0xffffffff\0" \
85 "fdt_file=imx6sl-evk.dtb\0" \
86 "fdt_addr=0x88000000\0" \
91 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
92 "mmcargs=setenv bootargs console=${console},${baudrate} " \
95 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
96 "bootscript=echo Running bootscript from mmc ...; " \
98 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
99 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
100 "mmcboot=echo Booting from mmc ...; " \
102 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
103 "if run loadfdt; then " \
104 "bootz ${loadaddr} - ${fdt_addr}; " \
106 "if test ${boot_fdt} = try; then " \
109 "echo WARN: Cannot load the DT; " \
115 "netargs=setenv bootargs console=${console},${baudrate} " \
117 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
118 "netboot=echo Booting from net ...; " \
120 "if test ${ip_dyn} = yes; then " \
121 "setenv get_cmd dhcp; " \
123 "setenv get_cmd tftp; " \
125 "${get_cmd} ${image}; " \
126 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
127 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
128 "bootz ${loadaddr} - ${fdt_addr}; " \
130 "if test ${boot_fdt} = try; then " \
133 "echo WARN: Cannot load the DT; " \
140 #define CONFIG_BOOTCOMMAND \
141 "mmc dev ${mmcdev};" \
142 "mmc dev ${mmcdev}; if mmc rescan; then " \
143 "if run loadbootscript; then " \
146 "if run loadimage; then " \
148 "else run netboot; " \
151 "else run netboot; fi"
153 /* Miscellaneous configurable options */
154 #define CONFIG_SYS_LONGHELP
155 #define CONFIG_SYS_HUSH_PARSER
156 #define CONFIG_AUTO_COMPLETE
157 #define CONFIG_SYS_CBSIZE 256
159 /* Print Buffer Size */
160 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
161 #define CONFIG_SYS_MAXARGS 16
162 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
164 #define CONFIG_SYS_MEMTEST_START 0x80000000
165 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
167 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
169 #define CONFIG_CMDLINE_EDITING
170 #define CONFIG_STACKSIZE SZ_128K
172 /* Physical Memory Map */
173 #define CONFIG_NR_DRAM_BANKS 1
174 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
175 #define PHYS_SDRAM_SIZE SZ_1G
177 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
178 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
179 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
181 #define CONFIG_SYS_INIT_SP_OFFSET \
182 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
183 #define CONFIG_SYS_INIT_SP_ADDR \
184 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
186 /* FLASH and environment organization */
187 #define CONFIG_SYS_NO_FLASH
189 #define CONFIG_ENV_SIZE SZ_8K
191 #if defined CONFIG_SYS_BOOT_SPINOR
192 #define CONFIG_ENV_IS_IN_SPI_FLASH
193 #define CONFIG_ENV_OFFSET (768 * 1024)
194 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
195 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
196 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
197 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
198 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
200 #define CONFIG_ENV_OFFSET (6 * SZ_64K)
201 #define CONFIG_ENV_IS_IN_MMC
204 #define CONFIG_OF_LIBFDT
205 #define CONFIG_CMD_BOOTZ
207 #ifndef CONFIG_SYS_DCACHE_OFF
208 #define CONFIG_CMD_CACHE
211 #define CONFIG_CMD_SF
213 #define CONFIG_SPI_FLASH
214 #define CONFIG_SPI_FLASH_STMICRO
215 #define CONFIG_MXC_SPI
216 #define CONFIG_SF_DEFAULT_BUS 0
217 #define CONFIG_SF_DEFAULT_CS 0
218 #define CONFIG_SF_DEFAULT_SPEED 20000000
219 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
223 #define CONFIG_CMD_USB
224 #ifdef CONFIG_CMD_USB
225 #define CONFIG_USB_EHCI
226 #define CONFIG_USB_EHCI_MX6
227 #define CONFIG_USB_STORAGE
228 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
229 #define CONFIG_USB_HOST_ETHER
230 #define CONFIG_USB_ETHER_ASIX
231 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
232 #define CONFIG_MXC_USB_FLAGS 0
233 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
236 #define CONFIG_SYS_FSL_USDHC_NUM 3
237 #if defined(CONFIG_ENV_IS_IN_MMC)
238 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
241 #endif /* __CONFIG_H */