2 * (C) Copyright 2006-2008
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 * Nishanth Menon <nm@ti.com>
8 * Configuration settings for the TI OMAP3430 Zoom MDK board.
10 * SPDX-License-Identifier: GPL-2.0+
17 * High Level Configuration Options
19 #define CONFIG_OMAP 1 /* in a TI OMAP core */
20 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
21 #define CONFIG_OMAP3_ZOOM1 1 /* working with Zoom MDK Rev1 */
22 #define CONFIG_OMAP_COMMON
23 #define CONFIG_SYS_GENERIC_BOARD
25 #define CONFIG_SDRC /* The chip has SDRC controller */
27 #include <asm/arch/cpu.h> /* get chip and board defs */
28 #include <asm/arch/omap3.h>
31 * Display CPU and Board information
33 #define CONFIG_DISPLAY_CPUINFO 1
34 #define CONFIG_DISPLAY_BOARDINFO 1
37 #define V_OSCK 26000000 /* Clock output from T2 */
38 #define V_SCLK (V_OSCK >> 1)
40 #define CONFIG_MISC_INIT_R
42 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
43 #define CONFIG_SETUP_MEMORY_TAGS 1
44 #define CONFIG_INITRD_TAG 1
45 #define CONFIG_REVISION_TAG 1
47 #define CONFIG_OF_LIBFDT 1
50 * Size of malloc() pool
52 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
54 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
61 * NS16550 Configuration
63 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
65 #define CONFIG_SYS_NS16550
66 #define CONFIG_SYS_NS16550_SERIAL
67 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
68 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
71 * select serial console configuration
73 #define CONFIG_CONS_INDEX 3
74 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
75 #define CONFIG_SERIAL3 3 /* UART3 */
77 /* allow to overwrite serial and ethaddr */
78 #define CONFIG_ENV_OVERWRITE
79 #define CONFIG_BAUDRATE 115200
80 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
82 #define CONFIG_GENERIC_MMC 1
84 #define CONFIG_OMAP_HSMMC 1
85 #define CONFIG_DOS_PARTITION 1
88 #define CONFIG_MUSB_UDC 1
89 #define CONFIG_USB_OMAP3 1
90 #define CONFIG_TWL4030_USB 1
92 /* USB device configuration */
93 #define CONFIG_USB_DEVICE 1
94 #define CONFIG_USB_TTY 1
95 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
96 /* Change these to suit your needs */
97 #define CONFIG_USBD_VENDORID 0x0451
98 #define CONFIG_USBD_PRODUCTID 0x5678
99 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
100 #define CONFIG_USBD_PRODUCT_NAME "Zoom1"
102 /* commands to include */
103 #include <config_cmd_default.h>
105 #define CONFIG_CMD_EXT2 /* EXT2 Support */
106 #define CONFIG_CMD_FAT /* FAT support */
107 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
109 #define CONFIG_CMD_I2C /* I2C serial bus support */
110 #define CONFIG_CMD_MMC /* MMC support */
111 #define CONFIG_CMD_NAND /* NAND support */
112 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
114 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
115 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
116 #undef CONFIG_CMD_IMI /* iminfo */
117 #undef CONFIG_CMD_IMLS /* List all found images */
118 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
119 #define CONFIG_CMD_NFS /* NFS support */
120 #define CONFIG_CMD_PING
121 #define CONFIG_CMD_DHCP
123 #define CONFIG_SYS_NO_FLASH
124 #define CONFIG_SYS_I2C
125 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
126 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
127 #define CONFIG_SYS_I2C_OMAP34XX
132 #define CONFIG_TWL4030_POWER 1
133 #define CONFIG_TWL4030_LED 1
138 #define CONFIG_NAND_OMAP_GPMC
139 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
141 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
142 /* to access nand at */
144 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
146 #define CONFIG_JFFS2_NAND
147 /* nand device jffs2 lives on */
148 #define CONFIG_JFFS2_DEV "nand0"
149 /* start of jffs2 partition */
150 #define CONFIG_JFFS2_PART_OFFSET 0x680000
151 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
154 /* Environment information */
155 #define CONFIG_BOOTDELAY 10
157 #define CONFIG_EXTRA_ENV_SETTINGS \
158 "loadaddr=0x82000000\0" \
160 "console=ttyS2,115200n8\0" \
162 "videomode=1024x768@60,vxres=1024,vyres=768\0" \
163 "videospec=omapfb:vram:2M,vram:4M\0" \
164 "mmcargs=setenv bootargs console=${console} " \
165 "video=${videospec},mode:${videomode} " \
166 "root=/dev/mmcblk0p2 rw " \
167 "rootfstype=ext3 rootwait\0" \
168 "nandargs=setenv bootargs console=${console} " \
169 "video=${videospec},mode:${videomode} " \
170 "root=/dev/mtdblock4 rw " \
171 "rootfstype=jffs2\0" \
172 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
173 "bootscript=echo Running bootscript from mmc ...; " \
174 "source ${loadaddr}\0" \
175 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
176 "mmcboot=echo Booting from mmc ...; " \
178 "bootm ${loadaddr}\0" \
179 "nandboot=echo Booting from nand ...; " \
181 "nand read ${loadaddr} 280000 400000; " \
182 "bootm ${loadaddr}\0" \
184 #define CONFIG_BOOTCOMMAND \
185 "mmc dev ${mmcdev}; if mmc rescan; then " \
186 "if run loadbootscript; then " \
189 "if run loaduimage; then " \
191 "else run nandboot; " \
194 "else run nandboot; fi"
196 #define CONFIG_AUTO_COMPLETE 1
198 * Miscellaneous configurable options
200 #define CONFIG_SYS_LONGHELP /* undef to save memory */
201 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
202 #define CONFIG_SYS_PROMPT "OMAP3 Zoom1 # "
203 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
204 /* Print Buffer Size */
205 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
206 sizeof(CONFIG_SYS_PROMPT) + 16)
207 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
208 /* Boot Argument Buffer Size */
209 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
211 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
213 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
214 0x01F00000) /* 31MB */
216 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
219 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
220 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
221 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
222 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
223 CONFIG_SYS_INIT_RAM_SIZE - \
224 GENERATED_GBL_DATA_SIZE)
226 * OMAP3 has 12 GP timers, they can be driven by the system clock
227 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
228 * This rate is divided by a local divisor.
230 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
231 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
233 /*-----------------------------------------------------------------------
234 * Physical Memory Map
236 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
237 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
238 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
240 /*-----------------------------------------------------------------------
241 * FLASH and environment organization
244 /* **** PISMO SUPPORT *** */
246 /* Configure the PISMO */
247 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
248 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
250 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
252 #if defined(CONFIG_CMD_NAND)
253 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
256 /* Monitor at start of flash */
257 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
258 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
260 #define CONFIG_ENV_IS_IN_NAND 1
261 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
262 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
264 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
265 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
266 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
268 #define CONFIG_SYS_CACHELINE_SIZE 64
270 #ifdef CONFIG_CMD_NET
271 /* Ethernet (LAN9211 from SMSC9118 family) */
272 #define CONFIG_SMC911X
273 #define CONFIG_SMC911X_32_BIT
274 #define CONFIG_SMC911X_BASE DEBUG_BASE
278 #endif /* __CONFIG_H */