2 * (C) Copyright 2006-2008
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 * Nishanth Menon <nm@ti.com>
8 * Configuration settings for the TI OMAP3430 Zoom MDK board.
10 * SPDX-License-Identifier: GPL-2.0+
17 * High Level Configuration Options
19 #define CONFIG_OMAP 1 /* in a TI OMAP core */
20 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
21 #define CONFIG_OMAP3_ZOOM1 1 /* working with Zoom MDK Rev1 */
22 #define CONFIG_OMAP_COMMON
23 #define CONFIG_SYS_GENERIC_BOARD
25 #define CONFIG_SDRC /* The chip has SDRC controller */
27 #include <asm/arch/cpu.h> /* get chip and board defs */
28 #include <asm/arch/omap3.h>
31 * Display CPU and Board information
33 #define CONFIG_DISPLAY_CPUINFO 1
34 #define CONFIG_DISPLAY_BOARDINFO 1
37 #define V_OSCK 26000000 /* Clock output from T2 */
38 #define V_SCLK (V_OSCK >> 1)
40 #define CONFIG_MISC_INIT_R
42 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
43 #define CONFIG_SETUP_MEMORY_TAGS 1
44 #define CONFIG_INITRD_TAG 1
45 #define CONFIG_REVISION_TAG 1
47 #define CONFIG_OF_LIBFDT 1
48 #define CONFIG_CMD_BOOTZ 1
51 * Size of malloc() pool
53 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
55 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
62 * NS16550 Configuration
64 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
66 #define CONFIG_SYS_NS16550
67 #define CONFIG_SYS_NS16550_SERIAL
68 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
69 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
72 * select serial console configuration
74 #define CONFIG_CONS_INDEX 3
75 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
76 #define CONFIG_SERIAL3 3 /* UART3 */
78 /* allow to overwrite serial and ethaddr */
79 #define CONFIG_ENV_OVERWRITE
80 #define CONFIG_BAUDRATE 115200
81 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
83 #define CONFIG_GENERIC_MMC 1
85 #define CONFIG_OMAP_HSMMC 1
86 #define CONFIG_DOS_PARTITION 1
89 #define CONFIG_MUSB_UDC 1
90 #define CONFIG_USB_OMAP3 1
91 #define CONFIG_TWL4030_USB 1
93 /* USB device configuration */
94 #define CONFIG_USB_DEVICE 1
95 #define CONFIG_USB_TTY 1
96 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
97 /* Change these to suit your needs */
98 #define CONFIG_USBD_VENDORID 0x0451
99 #define CONFIG_USBD_PRODUCTID 0x5678
100 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
101 #define CONFIG_USBD_PRODUCT_NAME "Zoom1"
103 /* commands to include */
104 #include <config_cmd_default.h>
106 #define CONFIG_CMD_EXT2 /* EXT2 Support */
107 #define CONFIG_CMD_FAT /* FAT support */
108 #define CONFIG_CMD_FS_GENERIC /* Generic FS support */
109 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
110 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
111 #define MTDIDS_DEFAULT "nand0=nand"
112 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
113 "1920k(u-boot),128k(u-boot-env),"\
116 #define CONFIG_CMD_I2C /* I2C serial bus support */
117 #define CONFIG_CMD_MMC /* MMC support */
118 #define CONFIG_CMD_NAND /* NAND support */
119 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
121 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
122 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
123 #undef CONFIG_CMD_IMI /* iminfo */
124 #undef CONFIG_CMD_IMLS /* List all found images */
125 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
126 #define CONFIG_CMD_NFS /* NFS support */
127 #define CONFIG_CMD_PING
128 #define CONFIG_CMD_DHCP
130 #define CONFIG_SYS_NO_FLASH
131 #define CONFIG_SYS_I2C
132 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
133 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
134 #define CONFIG_SYS_I2C_OMAP34XX
139 #define CONFIG_TWL4030_POWER 1
140 #define CONFIG_TWL4030_LED 1
145 #define CONFIG_NAND_OMAP_GPMC
146 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
148 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
149 /* to access nand at */
151 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
154 /* Environment information */
155 #define CONFIG_BOOTDELAY 10
157 #define CONFIG_EXTRA_ENV_SETTINGS \
158 "loadaddr=0x82000000\0" \
159 "fdtaddr=0x80f80000\0" \
160 "bootfile=uImage\0" \
161 "fdtfile=omap3-ldp.dtb\0" \
165 "console=ttyO2,115200n8\0" \
167 "videomode=1024x768@60,vxres=1024,vyres=768\0" \
168 "videospec=omapfb:vram:2M,vram:4M\0" \
169 "mmcargs=setenv bootargs console=${console} " \
170 "video=${videospec},mode:${videomode} " \
171 "root=/dev/mmcblk0p2 rw " \
172 "rootfstype=ext3 rootwait\0" \
173 "nandargs=setenv bootargs console=${console} " \
174 "video=${videospec},mode:${videomode} " \
175 "root=/dev/mtdblock4 rw " \
176 "rootfstype=jffs2\0" \
177 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
178 "bootscript=echo Running bootscript from mmc ...; " \
179 "source ${loadaddr}\0" \
180 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
181 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
182 "loadzimage=setenv bootfile zImage; if run loadimage; then run loadfdt;fi\0"\
183 "mmcboot=echo Booting from mmc ...; " \
185 "bootm ${loadaddr}\0" \
186 "mmczboot=echo Booting from mmc ...; " \
188 "bootz ${loadaddr} - ${fdtaddr}\0" \
189 "nandboot=echo Booting from nand ...; " \
191 "nand read ${loadaddr} 280000 400000; " \
192 "bootm ${loadaddr}\0" \
194 #define CONFIG_BOOTCOMMAND \
195 "mmc dev ${mmcdev}; if mmc rescan; then " \
196 "if run loadbootscript; then " \
199 "if run loadimage; then " \
201 "else if run loadzimage; then " \
203 "else run nandboot; " \
206 "else run nandboot; fi"
208 #define CONFIG_AUTO_COMPLETE 1
210 * Miscellaneous configurable options
212 #define CONFIG_SYS_LONGHELP /* undef to save memory */
213 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
214 #define CONFIG_SYS_PROMPT "OMAP3 Zoom1 # "
215 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
216 /* Print Buffer Size */
217 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
218 sizeof(CONFIG_SYS_PROMPT) + 16)
219 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
220 /* Boot Argument Buffer Size */
221 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
223 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
225 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
226 0x01F00000) /* 31MB */
228 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
231 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
232 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
233 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
234 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
235 CONFIG_SYS_INIT_RAM_SIZE - \
236 GENERATED_GBL_DATA_SIZE)
238 * OMAP3 has 12 GP timers, they can be driven by the system clock
239 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
240 * This rate is divided by a local divisor.
242 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
243 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
245 /*-----------------------------------------------------------------------
246 * Physical Memory Map
248 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
249 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
250 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
252 /*-----------------------------------------------------------------------
253 * FLASH and environment organization
256 /* **** PISMO SUPPORT *** */
258 /* Configure the PISMO */
259 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
260 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
262 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
264 #if defined(CONFIG_CMD_NAND)
265 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
268 /* Monitor at start of flash */
269 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
270 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
272 #define CONFIG_ENV_IS_IN_NAND 1
273 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
274 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
276 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
277 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
278 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
280 #define CONFIG_SYS_CACHELINE_SIZE 64
282 #ifdef CONFIG_CMD_NET
283 /* Ethernet (LAN9211 from SMSC9118 family) */
284 #define CONFIG_SMC911X
285 #define CONFIG_SMC911X_32_BIT
286 #define CONFIG_SMC911X_BASE DEBUG_BASE
290 #endif /* __CONFIG_H */