2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2014 Bachmann electronic GmbH
5 * SPDX-License-Identifier: GPL-2.0+
11 #include "mx6_common.h"
12 #define CONFIG_DISPLAY_CPUINFO
13 #define CONFIG_DISPLAY_BOARDINFO
15 #define CONFIG_CMDLINE_TAG
16 #define CONFIG_SETUP_MEMORY_TAGS
17 #define CONFIG_INITRD_TAG
18 #define CONFIG_REVISION_TAG
19 #define CONFIG_SYS_GENERIC_BOARD
21 /* Size of malloc() pool */
22 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
24 #define CONFIG_BOARD_EARLY_INIT_F
25 #define CONFIG_MISC_INIT_R
26 #define CONFIG_MXC_GPIO
29 #define CONFIG_CMD_FUSE
30 #define CONFIG_MXC_OCOTP
33 #define CONFIG_MXC_UART
34 #define CONFIG_MXC_UART_BASE UART1_BASE
39 #define CONFIG_SPI_FLASH
40 #define CONFIG_SPI_FLASH_STMICRO
41 #define CONFIG_SPI_FLASH_WINBOND
42 #define CONFIG_SPI_FLASH_MACRONIX
43 #define CONFIG_SPI_FLASH_SST
44 #define CONFIG_MXC_SPI
45 #define CONFIG_SF_DEFAULT_BUS 2
46 #define CONFIG_SF_DEFAULT_CS 0
47 #define CONFIG_SF_DEFAULT_SPEED 25000000
48 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
51 #define CONFIG_PCA953X
52 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
53 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
54 #define CONFIG_CMD_PCA953X
55 #define CONFIG_CMD_PCA953X_INFO
58 #define CONFIG_CMD_I2C
59 #define CONFIG_SYS_I2C
60 #define CONFIG_SYS_I2C_MXC
61 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
62 #define CONFIG_SYS_I2C_SPEED 100000
65 #define CONFIG_CMD_IMXOTP
66 #define CONFIG_IMX_OTP
67 #define IMX_OTP_BASE OCOTP_BASE_ADDR
68 #define IMX_OTP_ADDR_MAX 0x7F
69 #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
70 #define IMX_OTPWRITE_ENABLED
73 #define CONFIG_FSL_ESDHC
74 #define CONFIG_FSL_USDHC
75 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
76 #define CONFIG_SYS_FSL_USDHC_NUM 2
79 #define CONFIG_CMD_MMC
80 #define CONFIG_GENERIC_MMC
81 #define CONFIG_BOUNCE_BUFFER
84 #define CONFIG_CMD_USB
85 #define CONFIG_USB_STORAGE
86 #define CONFIG_USB_EHCI
87 #define CONFIG_USB_EHCI_MX6
88 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
89 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
91 #define CONFIG_CMD_SATA
97 #ifdef CONFIG_CMD_SATA
98 #define CONFIG_DWC_AHSATA
99 #define CONFIG_SYS_SATA_MAX_DEVICE 1
100 #define CONFIG_DWC_AHSATA_PORT_ID 0
101 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
103 #define CONFIG_LIBATA
109 #include "imx6_spl.h"
110 #define CONFIG_SPL_SPI_SUPPORT
111 #define CONFIG_SPL_LIBCOMMON_SUPPORT
112 #define CONFIG_SPL_SPI_FLASH_SUPPORT
113 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
114 #define CONFIG_SPL_SPI_LOAD
117 #define CONFIG_CMD_PING
118 #define CONFIG_CMD_DHCP
119 #define CONFIG_CMD_MII
120 #define CONFIG_CMD_NET
121 #define CONFIG_FEC_MXC
123 #define IMX_FEC_BASE ENET_BASE_ADDR
124 #define CONFIG_FEC_XCV_TYPE MII100
125 #define CONFIG_ETHPRIME "FEC"
126 #define CONFIG_FEC_MXC_PHYADDR 0x5
127 #define CONFIG_PHYLIB
128 #define CONFIG_PHY_SMSC
131 #define CONFIG_CMD_EEPROM
132 #define CONFIG_ENV_EEPROM_IS_ON_I2C
133 #define CONFIG_SYS_I2C_EEPROM_BUS 1
134 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
135 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
136 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
137 #define CONFIG_SYS_I2C_MULTI_EEPROMS
140 /* Miscellaneous commands */
141 #define CONFIG_CMD_BMODE
142 #define CONFIG_CMD_SETEXPR
144 /* allow to overwrite serial and ethaddr */
145 #define CONFIG_ENV_OVERWRITE
146 #define CONFIG_CONS_INDEX 1
147 #define CONFIG_BAUDRATE 115200
149 /* Command definition */
151 #define CONFIG_BOOTDELAY 2
153 #define CONFIG_PREBOOT ""
155 #define CONFIG_LOADADDR 0x12000000
156 #define CONFIG_SYS_TEXT_BASE 0x17800000
158 /* Miscellaneous configurable options */
159 #define CONFIG_SYS_LONGHELP
160 #define CONFIG_SYS_HUSH_PARSER
161 #define CONFIG_SYS_CBSIZE 1024
163 /* Print Buffer Size */
164 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
165 #define CONFIG_SYS_MAXARGS 16
166 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
168 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
170 #define CONFIG_CMDLINE_EDITING
172 /* Physical Memory Map */
173 #define CONFIG_NR_DRAM_BANKS 1
174 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
176 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
177 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
178 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
180 #define CONFIG_SYS_INIT_SP_OFFSET \
181 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
182 #define CONFIG_SYS_INIT_SP_ADDR \
183 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
185 /* Environment organization */
186 #define CONFIG_ENV_IS_IN_SPI_FLASH
187 #define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
188 #define CONFIG_ENV_OFFSET (1024 * 1024)
189 /* M25P16 has an erase size of 64 KiB */
190 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
191 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
192 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
193 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
194 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
196 #define CONFIG_OF_LIBFDT
197 #define CONFIG_CMD_BOOTZ
199 #ifndef CONFIG_SYS_DCACHE_OFF
200 #define CONFIG_CMD_CACHE
203 #define CONFIG_CMD_BOOTZ
204 #define CONFIG_SUPPORT_RAW_INITRD
207 #define CONFIG_CMD_EXT3
208 #define CONFIG_CMD_EXT4
209 #define CONFIG_DOS_PARTITION
210 #define CONFIG_CMD_FS_GENERIC
211 #define CONFIG_LIB_UUID
212 #define CONFIG_CMD_FS_UUID
214 #define CONFIG_BOOTP_SERVERIP
215 #define CONFIG_BOOTP_BOOTFILE
217 #endif /* __CONFIG_H */