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1 /*
2  * Copyright (C) ST-Ericsson SA 2009
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9
10 /*
11  * #define DEBUG 1
12  */
13
14 #define CONFIG_SKIP_LOWLEVEL_INIT
15 #define CONFIG_SNOWBALL
16 #define CONFIG_SYS_ICACHE_OFF
17 #define CONFIG_SYS_DCACHE_OFF
18 #define CONFIG_ARCH_CPU_INIT
19 #define CONFIG_BOARD_LATE_INIT
20
21 /*
22  * High Level Configuration Options
23  * (easy to change)
24  */
25 #define CONFIG_U8500
26
27 #define CONFIG_SYS_MEMTEST_START        0x00000000
28 #define CONFIG_SYS_MEMTEST_END  0x1FFFFFFF
29
30 /*-----------------------------------------------------------------------
31  * Size of environment and malloc() pool
32  */
33 /*
34  * If you use U-Boot as crash kernel, make sure that it does not overwrite
35  * information saved by kexec during panic. Kexec expects the start
36  * address of the executable 32K above "crashkernel" address.
37  */
38 /*
39  * Size of malloc() pool
40  */
41 #define CONFIG_ENV_SIZE         (8*1024)
42 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 256*1024)
43
44 #define CONFIG_ENV_IS_IN_MMC
45 #define CONFIG_CMD_ENV
46 #define CONFIG_CMD_SAVEENV
47 #define CONFIG_ENV_OFFSET               0x0118000
48 #define CONFIG_SYS_MMC_ENV_DEV          0              /* SLOT2: eMMC */
49
50 /*
51  * PL011 Configuration
52  */
53 #define CONFIG_PL011_SERIAL
54 #define CONFIG_PL011_SERIAL_RLCR
55 #define CONFIG_PL011_SERIAL_FLUSH_ON_INIT
56
57 /*
58  * U8500 UART registers base for 3 serial devices
59  */
60 #define CFG_UART0_BASE          0x80120000
61 #define CFG_UART1_BASE          0x80121000
62 #define CFG_UART2_BASE          0x80007000
63 #define CFG_SERIAL0             CFG_UART0_BASE
64 #define CFG_SERIAL1             CFG_UART1_BASE
65 #define CFG_SERIAL2             CFG_UART2_BASE
66 #define CONFIG_PL011_CLOCK      38400000
67 #define CONFIG_PL01x_PORTS      { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \
68                                   (void *)CFG_SERIAL2 }
69 #define CONFIG_CONS_INDEX       2
70 #define CONFIG_BAUDRATE         115200
71
72 /*
73  * Devices and file systems
74  */
75 #define CONFIG_MMC
76 #define CONFIG_GENERIC_MMC
77 #define CONFIG_DOS_PARTITION
78
79 /*
80  * Commands
81  */
82 #define CONFIG_CMD_MEMORY
83 #define CONFIG_CMD_BOOTD
84 #define CONFIG_CMD_BDI
85 #define CONFIG_CMD_IMI
86 #define CONFIG_CMD_MISC
87 #define CONFIG_CMD_RUN
88 #define CONFIG_CMD_ECHO
89 #define CONFIG_CMD_CONSOLE
90 #define CONFIG_CMD_LOADS
91 #define CONFIG_CMD_LOADB
92 #define CONFIG_CMD_MMC
93 #define CONFIG_CMD_FAT
94 #define CONFIG_CMD_EXT2
95 #define CONFIG_CMD_SOURCE
96
97 #ifndef CONFIG_BOOTDELAY
98 #define CONFIG_BOOTDELAY        1
99 #endif
100 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
101
102 #undef CONFIG_BOOTARGS
103 #define CONFIG_BOOTCOMMAND \
104 "mmc dev 1; "                                                           \
105         "if run loadbootscript; "                                       \
106                 "then run bootscript; "                                 \
107         "else "                                                         \
108                 "if run mmcload; "                                      \
109                         "then run mmcboot; "                            \
110                 "else "                                                 \
111                         "mmc dev 0; "                                   \
112                         "if run emmcloadbootscript; "                   \
113                                 "then run bootscript; "                 \
114                         "else "                                         \
115                                 "if run emmcload; "                     \
116                                         "then run emmcboot; "           \
117                                 "else "                                 \
118                                         "echo No media to boot from; "  \
119                                 "fi; "                                  \
120                         "fi; "                                          \
121                 "fi; "                                                  \
122         "fi; "
123
124 #define CONFIG_EXTRA_ENV_SETTINGS \
125         "verify=n\0"                                                    \
126         "loadaddr=0x00100000\0"                                         \
127         "console=ttyAMA2,115200n8\0"                                    \
128         "loadbootscript=fatload mmc 1:1 ${loadaddr} boot.scr\0"         \
129         "emmcloadbootscript=fatload mmc 0:2 ${loadaddr} boot.scr\0"     \
130         "bootscript=echo Running bootscript "                           \
131                 "from mmc ...; source ${loadaddr}\0"                    \
132         "memargs256=mem=96M@0 mem_modem=32M@96M mem=32M@128M "          \
133                 "hwmem=22M@160M pmem_hwb=42M@182M mem_mali=32@224M\0"   \
134         "memargs512=mem=96M@0 mem_modem=32M@96M hwmem=32M@128M "        \
135                 "mem=64M@160M mem_mali=32M@224M "                       \
136                 "pmem_hwb=128M@256M mem=128M@384M\0"                    \
137         "memargs1024=mem=128M@0 mali.mali_mem=32M@128M "                \
138                 "hwmem=168M@M160M mem=48M@328M "                        \
139                 "mem_issw=1M@383M mem=640M@384M\0"                      \
140         "memargs=setenv bootargs ${bootargs} ${memargs1024}\0"          \
141         "emmcload=fatload mmc 0:2 ${loadaddr} uImage\0"                 \
142         "mmcload=fatload mmc 1:1 ${loadaddr} uImage\0"                  \
143         "commonargs=setenv bootargs console=${console} "                \
144         "vmalloc=300M\0"                                                \
145         "emmcargs=setenv bootargs ${bootargs} "                         \
146                 "root=/dev/mmcblk0p3 "                                  \
147                 "rootwait\0"                                            \
148         "addcons=setenv bootargs ${bootargs} "                          \
149                 "console=${console}\0"                                  \
150         "emmcboot=echo Booting from eMMC ...; "                         \
151                 "run commonargs emmcargs memargs; "                     \
152                 "bootm ${loadaddr}\0"                                   \
153         "mmcargs=setenv bootargs ${bootargs} "                          \
154                 "root=/dev/mmcblk1p2 "                                  \
155                 "rootwait earlyprintk\0"                                \
156         "mmcboot=echo Booting from external MMC ...; "                  \
157                 "run commonargs mmcargs memargs; "                      \
158                 "bootm ${loadaddr}\0"                                   \
159         "fdt_high=0x2BC00000\0"                                         \
160         "stdout=serial,usbtty\0"                                        \
161         "stdin=serial,usbtty\0"                                         \
162         "stderr=serial,usbtty\0"
163
164 /*-----------------------------------------------------------------------
165  * Miscellaneous configurable options
166  */
167
168 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
169 #define CONFIG_SYS_PROMPT       "U8500 $ "      /* Monitor Command Prompt   */
170 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size  */
171
172 /* Print Buffer Size */
173 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE \
174                                         + sizeof(CONFIG_SYS_PROMPT) + 16)
175 #define CONFIG_SYS_MAXARGS      32      /* max number of command args */
176 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
177
178 #undef  CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
179 #define CONFIG_SYS_LOAD_ADDR            0x00100000 /* default load address */
180 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1
181
182 #define CONFIG_SYS_HUSH_PARSER          1
183 #define CONFIG_CMDLINE_EDITING
184
185 #define CONFIG_SETUP_MEMORY_TAGS        2
186 #define CONFIG_INITRD_TAG               1
187 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs  */
188
189 /*
190  * Physical Memory Map
191  */
192 #define CONFIG_NR_DRAM_BANKS            1
193 #define PHYS_SDRAM_1                    0x00000000      /* DDR-SDRAM Bank #1 */
194
195 /*
196  * additions for new relocation code
197  */
198 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
199 #define CONFIG_SYS_MAX_RAM_SIZE 0x40000000
200 #define CONFIG_SYS_INIT_RAM_SIZE        0x100000
201 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_SDRAM_BASE + \
202                                          CONFIG_SYS_INIT_RAM_SIZE - \
203                                          GENERATED_GBL_DATA_SIZE)
204 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_GBL_DATA_OFFSET
205
206 /* landing address before relocation */
207 #ifndef CONFIG_SYS_TEXT_BASE
208 #define CONFIG_SYS_TEXT_BASE            0x0
209 #endif
210
211 /*
212  * MMC related configs
213  */
214 #define CONFIG_ARM_PL180_MMCI
215 #define MMC_BLOCK_SIZE                  512
216 #define CFG_EMMC_BASE                   0x80114000
217 #define CFG_MMC_BASE                    0x80126000
218
219 /*
220  * FLASH and environment organization
221  */
222 #define CONFIG_SYS_NO_FLASH
223
224 /*
225  * base register values for U8500
226  */
227 #define CFG_PRCMU_BASE          0x80157000      /* Power, reset and clock */
228
229
230 /*
231  * U8500 GPIO register base for 9 banks
232  */
233 #define CONFIG_DB8500_GPIO
234 #define CFG_GPIO_0_BASE                 0x8012E000
235 #define CFG_GPIO_1_BASE                 0x8012E080
236 #define CFG_GPIO_2_BASE                 0x8000E000
237 #define CFG_GPIO_3_BASE                 0x8000E080
238 #define CFG_GPIO_4_BASE                 0x8000E100
239 #define CFG_GPIO_5_BASE                 0x8000E180
240 #define CFG_GPIO_6_BASE                 0x8011E000
241 #define CFG_GPIO_7_BASE                 0x8011E080
242 #define CFG_GPIO_8_BASE                 0xA03FE000
243
244 #define CFG_FSMC_BASE           0x80000000      /* FSMC Controller */
245
246 #endif  /* __CONFIG_H */