2 * (C) Copyright 2002-2005
3 * Gary Jennejohn <gj@denx.de>
5 * Configuation settings for the TRAB board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * Default configuration is with 8 MB Flash, 32 MB RAM
32 #if (!defined(CONFIG_FLASH_8MB)) && (!defined(CONFIG_FLASH_16MB))
33 # define CONFIG_FLASH_8MB /* 8 MB Flash */
35 #if (!defined(CONFIG_RAM_16MB)) && (!defined(CONFIG_RAM_32MB))
36 # define CONFIG_RAM_32MB /* 32 MB SDRAM */
40 * High Level Configuration Options
43 #define CONFIG_ARM920T 1 /* This is an arm920t CPU */
44 #define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
45 #define CONFIG_TRAB 1 /* on a TRAB Board */
46 #undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
47 #define LITTLEENDIAN 1 /* used by usb_ohci.c */
49 /* automatic software updates (see board/trab/auto_update.c) */
50 #define CONFIG_AUTO_UPDATE 1
52 /* input clock of PLL */
53 #define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
55 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
57 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
58 #define CONFIG_SETUP_MEMORY_TAGS 1
59 #define CONFIG_INITRD_TAG 1
61 #define CFG_DEVICE_NULLDEV 1 /* enble null device */
62 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
64 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
66 /***********************************************************
68 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
69 * address 0x54 with 8bit addressing
70 ***********************************************************/
71 #define CONFIG_HARD_I2C /* I2C with hardware support */
72 #define CFG_I2C_SPEED 100000 /* I2C speed */
73 #define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
75 #define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
76 #define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
78 #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
79 #define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
80 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
83 #define CONFIG_USB_OHCI 1
84 #define CONFIG_USB_STORAGE 1
85 #define CONFIG_DOS_PARTITION 1
88 * Size of malloc() pool
90 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
91 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
96 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
97 #define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
98 #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
100 #define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
102 #define CONFIG_VFD 1 /* VFD linear frame buffer driver */
103 #define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
106 * select serial console configuration
108 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
110 #define CONFIG_HWFLOW /* include RTS/CTS flow control support */
112 #define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
114 #define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
117 * The following enables modem debugging stuff. The dbg() and
118 * 'char screen[1024]' are used for debug printfs. Unfortunately,
119 * it is usable only from BDI
121 #undef CONFIG_MODEM_SUPPORT_DEBUG
123 /* allow to overwrite serial and ethaddr */
124 #define CONFIG_ENV_OVERWRITE
126 #define CONFIG_BAUDRATE 115200
128 #define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
130 /* Use s3c2400's RTC */
131 #define CONFIG_RTC_S3C24X0 1
134 #define CONFIG_COMMANDS_ADD_HWFLOW CFG_CMD_HWFLOW
136 #define CONFIG_COMMANDS_ADD_HWFLOW 0
140 #define CONFIG_COMMANDS_ADD_VFD CFG_CMD_VFD
142 #define CONFIG_COMMANDS_ADD_VFD 0
145 #ifdef CONFIG_DRIVER_S3C24X0_I2C
146 #define CONFIG_COMMANDS_ADD_EEPROM CFG_CMD_EEPROM
147 #define CONFIG_COMMANDS_I2C CFG_CMD_I2C
149 #define CONFIG_COMMANDS_ADD_EEPROM 0
150 #define CONFIG_COMMANDS_I2C 0
154 #define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
155 CONFIG_COMMANDS_ADD_HWFLOW | \
156 CONFIG_COMMANDS_ADD_VFD | \
157 CONFIG_COMMANDS_ADD_EEPROM | \
158 CONFIG_COMMANDS_I2C | \
167 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
168 CONFIG_COMMANDS_ADD_HWFLOW | \
169 CONFIG_COMMANDS_ADD_VFD | \
170 CONFIG_COMMANDS_ADD_EEPROM | \
171 CONFIG_COMMANDS_I2C | \
182 #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
184 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
185 #include <cmd_confdefs.h>
187 #define CONFIG_BOOTDELAY 5
188 #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
189 #define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
190 #define CONFIG_BOOTARGS "console=ttyS0"
191 #define CONFIG_NETMASK 255.255.0.0
192 #define CONFIG_IPADDR 192.168.3.68
193 #define CONFIG_HOSTNAME trab
194 #define CONFIG_SERVERIP 192.168.3.1
195 #define CONFIG_BOOTCOMMAND "burn_in"
197 #ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
198 #ifdef CFG_HUSH_PARSER
199 #define CONFIG_EXTRA_ENV_SETTINGS \
200 "nfs_args=setenv bootargs root=/dev/nfs rw " \
201 "nfsroot=$serverip:$rootpath\0" \
202 "rootpath=/opt/eldk/arm_920TDI\0" \
203 "ram_args=setenv bootargs root=/dev/ram rw\0" \
204 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
205 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
206 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
207 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
208 "load=tftp C100000 ${u-boot}\0" \
209 "update=protect off 0 5FFFF;era 0 5FFFF;" \
210 "cp.b C100000 0 $filesize\0" \
211 "loadfile=/tftpboot/TRAB/uImage\0" \
212 "loadaddr=c400000\0" \
213 "net_load=tftpboot $loadaddr $loadfile\0" \
214 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
215 "kernel_addr=00060000\0" \
216 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
218 "mdm_init2=ATS0=1\0" \
219 "mdm_flow_control=rts/cts\0"
220 #else /* !CFG_HUSH_PARSER */
221 #define CONFIG_EXTRA_ENV_SETTINGS \
222 "nfs_args=setenv bootargs root=/dev/nfs rw " \
223 "nfsroot=${serverip}:${rootpath}\0" \
224 "rootpath=/opt/eldk/arm_920TDI\0" \
225 "ram_args=setenv bootargs root=/dev/ram rw\0" \
226 "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
227 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
228 "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
229 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
230 "load=tftp C100000 ${u-boot}\0" \
231 "update=protect off 0 5FFFF;era 0 5FFFF;" \
232 "cp.b C100000 0 ${filesize}\0" \
233 "loadfile=/tftpboot/TRAB/uImage\0" \
234 "loadaddr=c400000\0" \
235 "net_load=tftpboot ${loadaddr} ${loadfile}\0" \
236 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
237 "kernel_addr=000C0000\0" \
238 "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
240 "mdm_init2=ATS0=1\0" \
241 "mdm_flow_control=rts/cts\0"
242 #endif /* CFG_HUSH_PARSER */
243 #else /* CONFIG_FLASH_8MB => 8 MB flash */
244 #ifdef CFG_HUSH_PARSER
245 #define CONFIG_EXTRA_ENV_SETTINGS \
246 "nfs_args=setenv bootargs root=/dev/nfs rw " \
247 "nfsroot=$serverip:$rootpath\0" \
248 "rootpath=/opt/eldk/arm_920TDI\0" \
249 "ram_args=setenv bootargs root=/dev/ram rw\0" \
250 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
251 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
252 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
253 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
254 "load=tftp C100000 ${u-boot}\0" \
255 "update=protect off 0 3FFFF;era 0 3FFFF;" \
256 "cp.b C100000 0 $filesize;" \
257 "setenv filesize;saveenv\0" \
258 "loadfile=/tftpboot/TRAB/uImage\0" \
259 "loadaddr=C400000\0" \
260 "net_load=tftpboot $loadaddr $loadfile\0" \
261 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
262 "kernel_addr=000C0000\0" \
263 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
265 "mdm_init2=ATS0=1\0" \
266 "mdm_flow_control=rts/cts\0"
267 #else /* !CFG_HUSH_PARSER */
268 #define CONFIG_EXTRA_ENV_SETTINGS \
269 "nfs_args=setenv bootargs root=/dev/nfs rw " \
270 "nfsroot=${serverip}:${rootpath}\0" \
271 "rootpath=/opt/eldk/arm_920TDI\0" \
272 "ram_args=setenv bootargs root=/dev/ram rw\0" \
273 "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
274 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
275 "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
276 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
277 "load=tftp C100000 ${u-boot}\0" \
278 "update=protect off 0 3FFFF;era 0 3FFFF;" \
279 "cp.b C100000 0 ${filesize};" \
280 "setenv filesize;saveenv\0" \
281 "loadfile=/tftpboot/TRAB/uImage\0" \
282 "loadaddr=C400000\0" \
283 "net_load=tftpboot ${loadaddr} ${loadfile}\0" \
284 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
285 "kernel_addr=000C0000\0" \
286 "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
288 "mdm_init2=ATS0=1\0" \
289 "mdm_flow_control=rts/cts\0"
290 #endif /* CFG_HUSH_PARSER */
291 #endif /* CONFIG_FLASH_8MB */
293 #if 1 /* feel free to disable for development */
294 #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
295 #define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
296 #define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */
299 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
300 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
301 /* what's this ? it's not used anywhere */
302 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
306 * Miscellaneous configurable options
308 #define CFG_LONGHELP /* undef to save memory */
309 #define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
310 #ifdef CFG_HUSH_PARSER
311 #define CFG_PROMPT_HUSH_PS2 "> "
314 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
315 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
316 #define CFG_MAXARGS 16 /* max number of command args */
317 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
319 #define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
320 #define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
322 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
324 #define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
326 #ifdef CONFIG_TRAB_50MHZ
327 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
328 /* it to wrap 100 times (total 1562500) to get 1 sec. */
329 /* this should _really_ be calculated !! */
330 #define CFG_HZ 1562500
332 /* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
333 /* it to wrap 100 times (total 1039000) to get 1 sec. */
334 /* this should _really_ be calculated !! */
335 #define CFG_HZ 1039000
338 /* valid baudrates */
339 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
341 #define CONFIG_MISC_INIT_R /* have misc_init_r() function */
343 /*-----------------------------------------------------------------------
344 * burn-in test stuff.
346 * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
347 * Because the burn-in test itself causes also an delay of about 4 seconds,
348 * this time must be subtracted from the desired overall burn-in cycle time.
350 #define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
352 /*-----------------------------------------------------------------------
355 * The stack sizes are set up in start.S using the settings below
357 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
358 #ifdef CONFIG_USE_IRQ
359 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
360 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
363 /*-----------------------------------------------------------------------
364 * Physical Memory Map
366 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
367 #define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
368 #ifndef CONFIG_RAM_16MB
369 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
371 #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
374 #define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
376 /* The following #defines are needed to get flash environment right */
377 #define CFG_MONITOR_BASE CFG_FLASH_BASE
378 #define CFG_MONITOR_LEN (256 << 10)
380 /* Dynamic MTD partition support */
381 #define CONFIG_JFFS2_CMDLINE
382 #define MTDIDS_DEFAULT "nor0=0"
384 /* production flash layout */
385 #define MTDPARTS_DEFAULT "mtdparts=0:16k(Firmware1)ro," \
388 "336k(Firmware2)ro," \
394 /*-----------------------------------------------------------------------
395 * FLASH and environment organization
397 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
398 #ifndef CONFIG_FLASH_8MB
399 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
401 #define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
404 /* timeout values are in ticks */
405 #define CFG_FLASH_ERASE_TOUT (15*CFG_HZ) /* Timeout for Flash Erase */
406 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
408 #define CFG_ENV_IS_IN_FLASH 1
410 /* Address and size of Primary Environment Sector */
411 #ifndef CONFIG_FLASH_8MB
412 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
413 #define CFG_ENV_SIZE 0x4000
414 #define CFG_ENV_SECT_SIZE 0x20000
416 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
417 #define CFG_ENV_SIZE 0x4000
418 #define CFG_ENV_SECT_SIZE 0x4000
421 /* Address and size of Redundant Environment Sector */
422 #define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
423 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
425 /* Initial value of the on-board touch screen brightness */
426 #define CFG_BRIGHTNESS 0x20
428 #endif /* __CONFIG_H */