2 * Copyright (C) 2006 Freescale Semiconductor, Inc.
3 * Dave Liu <daveliu@freescale.com>
5 * Copyright (C) 2007 Logic Product Development, Inc.
6 * Peter Barada <peterb@logicpd.com>
8 * Copyright (C) 2007 MontaVista Software, Inc.
9 * Anton Vorontsov <avorontsov@ru.mvista.com>
12 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
14 * (C) Copyright 2010-2011
15 * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
16 * Holger Brunck, Keymile GmbH, holger.bruncl@keymile.com
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
28 * High Level Configuration Options
30 #define CONFIG_TUXXX /* TUXX1 board specific */
31 #define CONFIG_HOSTNAME tuxx1
32 #define CONFIG_KM_BOARD_NAME "tuxx1"
34 #define CONFIG_SYS_TEXT_BASE 0xF0000000
36 /* include common defines/options for all 8321 Keymile boards */
37 #include "km/km8321-common.h"
39 #define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
40 #define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
41 #define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */
42 #define CONFIG_SYS_APP2_SIZE 256 /* Megabytes */
45 * Init Local Bus Memory Controller:
47 * Bank Bus Machine PortSz Size Device on TUDA1 TUXA1
48 * ---- --- ------- ------ ----- ---------------------
49 * 2 Local GPCM 8 bit 256MB PAXG LPXF
50 * 3 Local GPCM 8 bit 256MB PINC3 PINC2
55 * Configuration for C2 on the local bus
57 /* Window base at flash base */
58 #define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
59 /* Window size: 256 MB */
60 #define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
62 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
67 #define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
72 OR_GPCM_EHTR_CLEAR | \
75 * Configuration for C3 on the local bus
77 /* Access window base at PINC3 base */
78 #define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
79 /* Window size: 256 MB */
80 #define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
82 #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \
87 #define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
94 #define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
101 /* APP1: icache cacheable, but dcache-inhibit and guarded */
102 #define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | \
105 /* 512M should also include APP2... */
106 #define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | \
110 #define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | \
112 BATL_CACHEINHIBIT | \
114 #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
116 /* APP2: icache cacheable, but dcache-inhibit and guarded */
117 #define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | \
120 #define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | \
124 #define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | \
126 BATL_CACHEINHIBIT | \
128 #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
130 #define CONFIG_SYS_IBAT7L (0)
131 #define CONFIG_SYS_IBAT7U (0)
132 #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
133 #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
135 #endif /* __CONFIG_H */