2 * Copyright (C) 2012-2014 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #define CONFIG_MX53 /* must be defined before including imx-regs.h */
13 #include <linux/sizes.h>
14 #include <asm/arch/imx-regs.h>
17 * Ka-Ro TX53 board - SoC configuration
19 #define CONFIG_SYS_MX5_IOMUX_V3
20 #define CONFIG_MXC_GPIO /* GPIO control */
21 #define CONFIG_SYS_MX5_HCLK 24000000
22 #define CONFIG_SYS_DDR_CLKSEL 0
23 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
24 #define CONFIG_SHOW_ACTIVITY
25 #define CONFIG_DISPLAY_BOARDINFO
26 #define CONFIG_BOARD_LATE_INIT
27 #define CONFIG_BOARD_EARLY_INIT_F
28 #define CONFIG_SYS_GENERIC_BOARD
30 /* LCD Logo and Splash screen support */
32 #define CONFIG_SPLASH_SCREEN
33 #define CONFIG_SPLASH_SCREEN_ALIGN
34 #define CONFIG_VIDEO_IPUV3
35 #define CONFIG_IPUV3_CLK 200000000
36 #define CONFIG_LCD_LOGO
37 #define LCD_BPP LCD_COLOR32
38 #define CONFIG_CMD_BMP
39 #define CONFIG_VIDEO_BMP_RLE8
40 #endif /* CONFIG_LCD */
43 * Memory configuration options
45 #ifndef CONFIG_SYS_SDRAM_SIZE
46 #define CONFIG_SYS_SDRAM_SIZE (SZ_512M * CONFIG_NR_DRAM_BANKS)
49 #define PHYS_SDRAM_1 0x70000000 /* Base address of bank 1 */
50 #define PHYS_SDRAM_1_SIZE (CONFIG_SYS_SDRAM_SIZE / CONFIG_NR_DRAM_BANKS)
51 #if CONFIG_NR_DRAM_BANKS > 1
52 #define PHYS_SDRAM_2 0xb0000000 /* Base address of bank 2 */
53 #define PHYS_SDRAM_2_SIZE PHYS_SDRAM_1_SIZE
55 #define CONFIG_STACKSIZE SZ_128K
56 #define CONFIG_SYS_MALLOC_LEN SZ_8M
57 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
58 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
59 #define CONFIG_SYS_SDRAM_CLK 400
62 * U-Boot general configurations
64 #define CONFIG_SYS_LONGHELP
65 #define CONFIG_SYS_PROMPT "TX53 U-Boot > "
66 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
67 #define CONFIG_SYS_PBSIZE \
68 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
69 /* Print buffer size */
70 #define CONFIG_SYS_MAXARGS 256 /* Max number of command args */
71 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
72 /* Boot argument buffer size */
73 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
74 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
75 #define CONFIG_CMDLINE_EDITING /* Command history etc */
77 #define CONFIG_SYS_64BIT_VSPRINTF
80 * Flattened Device Tree (FDT) support
86 #define xstr(s) str(s)
88 #define __pfx(x, s) (x##s)
89 #define _pfx(x, s) __pfx(x, s)
91 #define CONFIG_CMDLINE_TAG
92 #define CONFIG_SETUP_MEMORY_TAGS
93 #define CONFIG_BOOTDELAY 3
94 #define CONFIG_ZERO_BOOTDELAY_CHECK
95 #define CONFIG_SYS_AUTOLOAD "no"
96 #define CONFIG_BOOTFILE "uImage"
97 #define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
98 #define CONFIG_BOOTCOMMAND "run bootcmd_${boot_mode} bootm_cmd"
99 #define CONFIG_LOADADDR 78000000
100 #define CONFIG_FDTADDR 71000000
101 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
102 #define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
103 #define CONFIG_U_BOOT_IMG_SIZE SZ_1M
104 #ifndef CONFIG_SYS_LVDS_IF
105 #define DEFAULT_VIDEO_MODE "VGA"
107 #define DEFAULT_VIDEO_MODE "HSD100PXN1"
111 * Extra Environment Settings
113 #define CONFIG_EXTRA_ENV_SETTINGS \
115 "baseboard=stk5-v3\0" \
116 "bootargs_jffs2=run default_bootargs;set bootargs ${bootargs}" \
117 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
118 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
119 " root=/dev/mmcblk0p2 rootwait\0" \
120 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
121 " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
123 "bootargs_ubifs=run default_bootargs;set bootargs ${bootargs}" \
124 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
125 "bootcmd_jffs2=set autostart no;run bootargs_jffs2" \
127 "bootcmd_mmc=set autostart no;run bootargs_mmc" \
128 ";fatload mmc 0 ${loadaddr} uImage\0" \
129 "bootcmd_nand=set autostart no;run bootargs_ubifs" \
131 "bootcmd_net=set autoload y;set autostart n;run bootargs_nfs" \
133 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
136 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
137 " ${append_bootargs}\0" \
138 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
139 "fdtsave=fdt resize;nand erase.part dtb" \
140 ";nand write ${fdtaddr} dtb ${fdtsize}\0" \
141 "mtdids=" MTDIDS_DEFAULT "\0" \
142 "mtdparts=" MTDPARTS_DEFAULT "\0" \
143 "nfsroot=/tftpboot/rootfs\0" \
144 "otg_mode=device\0" \
145 "touchpanel=tsc2007\0" \
146 "video_mode=" DEFAULT_VIDEO_MODE "\0"
148 #define MTD_NAME "mxc_nand"
149 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
154 #include <config_cmd_default.h>
159 #define CONFIG_MXC_UART
160 #define CONFIG_MXC_UART_BASE UART1_BASE
161 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
162 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
163 #define CONFIG_SYS_CONSOLE_INFO_QUIET
168 #define CONFIG_MXC_GPIO
173 #ifdef CONFIG_FEC_MXC
174 #define IMX_FEC_BASE FEC_BASE_ADDR
175 #define CONFIG_FEC_MXC_PHYADDR 0
176 #define CONFIG_FEC_XCV_TYPE MII100
177 #define CONFIG_CMD_MII
178 /* Add for working with "strict" DHCP server */
179 #define CONFIG_BOOTP_SUBNETMASK
180 #define CONFIG_BOOTP_GATEWAY
181 #define CONFIG_BOOTP_DNS
187 #ifdef CONFIG_CMD_I2C
188 #define CONFIG_I2C_MXC
189 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
190 #define CONFIG_SYS_I2C_SPEED 400000
191 #define CONFIG_SYS_I2C_SLAVE 0x34
197 #ifdef CONFIG_CMD_NAND
198 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
199 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
200 #define CONFIG_MXC_NAND_HWECC
201 #define CONFIG_SYS_NAND_MAX_CHIPS 0x1
202 #define CONFIG_SYS_MAX_NAND_DEVICE 0x1
203 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
204 #ifdef CONFIG_ENV_IS_IN_NAND
205 #define CONFIG_ENV_OVERWRITE
206 #define CONFIG_ENV_OFFSET CONFIG_U_BOOT_IMG_SIZE
207 #define CONFIG_ENV_SIZE 0x20000 /* 128 KiB */
208 #define CONFIG_ENV_RANGE 0x60000
210 #define CONFIG_SYS_NAND_BASE 0x00000000
211 #endif /* CONFIG_CMD_NAND */
216 #ifdef CONFIG_FSL_ESDHC
217 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
219 #define CONFIG_CMD_FAT
220 #define CONFIG_FAT_WRITE
221 #define CONFIG_CMD_EXT2
224 * Environments on MMC
226 #ifdef CONFIG_ENV_IS_IN_MMC
227 #define CONFIG_SYS_MMC_ENV_DEV 0
228 #define CONFIG_ENV_OVERWRITE
229 /* Associated with the MMC layout defined in mmcops.c */
230 #define CONFIG_ENV_OFFSET SZ_1K
231 #define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
232 #define CONFIG_DYNAMIC_MMC_DEVNO
233 #endif /* CONFIG_ENV_IS_IN_MMC */
234 #endif /* CONFIG_CMD_MMC */
236 #ifdef CONFIG_ENV_OFFSET_REDUND
237 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
239 xstr(CONFIG_ENV_RANGE) \
241 xstr(CONFIG_ENV_RANGE) \
242 "(env2),6m(linux),32m(rootfs),89344k(userfs),512k@0x7f00000(dtb),512k@0x7f80000(bbt)ro"
244 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
246 xstr(CONFIG_ENV_RANGE) \
247 "(env),6m(linux),32m(rootfs),89728k(userfs),512k@0x7f00000(dtb),512k@0x7f80000(bbt)ro"
250 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
251 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
252 GENERATED_GBL_DATA_SIZE)
254 #ifdef CONFIG_CMD_IIM
255 #define CONFIG_FSL_IIM
258 #endif /* __CONFIG_H */