2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #include <asm/sizes.h>
12 #include <asm/arch/imx-regs.h>
15 * Ka-Ro TX6 board - SoC configuration
18 #define CONFIG_SYS_MX6_HCLK 24000000
19 #define CONFIG_SYS_MX6_CLK32 32768
20 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
21 #define CONFIG_SHOW_ACTIVITY
22 #define CONFIG_ARCH_CPU_INIT
23 #define CONFIG_DISPLAY_BOARDINFO
24 #define CONFIG_BOARD_LATE_INIT
25 #define CONFIG_BOARD_EARLY_INIT_F
28 /* LCD Logo and Splash screen support */
31 #define CONFIG_SPLASH_SCREEN
32 #define CONFIG_SPLASH_SCREEN_ALIGN
33 #define CONFIG_VIDEO_IPUV3
34 #define CONFIG_IPUV3_CLK 266000000
35 #define CONFIG_LCD_LOGO
36 #define LCD_BPP LCD_COLOR24
37 #define CONFIG_CMD_BMP
38 #define CONFIG_VIDEO_BMP_RLE8
39 #endif /* CONFIG_LCD */
40 #endif /* CONFIG_MFG */
43 * Memory configuration options
45 #define CONFIG_NR_DRAM_BANKS 1 /* # of SDRAM banks */
46 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
47 #ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
48 #define PHYS_SDRAM_1_WIDTH CONFIG_SYS_SDRAM_BUS_WIDTH
50 #define PHYS_SDRAM_1_WIDTH 64
52 #define PHYS_SDRAM_1_SIZE (SZ_512M * (PHYS_SDRAM_1_WIDTH / 32))
55 #define CONFIG_SYS_SDRAM_CLK 528
57 #define CONFIG_SYS_SDRAM_CLK 400
59 #define CONFIG_STACKSIZE SZ_128K
60 #define CONFIG_SYS_MALLOC_LEN SZ_8M
61 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
62 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
65 * U-Boot general configurations
67 #define CONFIG_SYS_LONGHELP
69 #define CONFIG_SYS_PROMPT "TX6Q U-Boot > "
71 #define CONFIG_SYS_PROMPT "TX6DL U-Boot > "
73 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
74 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
75 sizeof(CONFIG_SYS_PROMPT) + 16) /* Print buffer size */
76 #define CONFIG_SYS_MAXARGS 64 /* Max number of command args */
77 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
78 /* Boot argument buffer size */
79 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
80 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
81 #define CONFIG_CMDLINE_EDITING /* Command history etc */
83 #define CONFIG_SYS_64BIT_VSPRINTF
84 #define CONFIG_SYS_NO_FLASH
87 * Flattened Device Tree (FDT) support
90 #define CONFIG_OF_LIBFDT
91 #ifdef CONFIG_OF_LIBFDT
92 #define CONFIG_FDT_FIXUP_PARTITIONS
93 #define CONFIG_OF_EMBED
94 #define CONFIG_OF_BOARD_SETUP
96 #define CONFIG_DEFAULT_DEVICE_TREE tx6q
97 #define CONFIG_ARCH_DEVICE_TREE mx6q
99 #define CONFIG_DEFAULT_DEVICE_TREE tx6dl
100 #define CONFIG_ARCH_DEVICE_TREE mx6dl
102 #define CONFIG_SYS_FDT_ADDR (PHYS_SDRAM_1 + SZ_16M)
103 #endif /* CONFIG_OF_LIBFDT */
104 #endif /* CONFIG_MFG */
109 #define xstr(s) str(s)
111 #define __pfx(x, s) (x##s)
112 #define _pfx(x, s) __pfx(x, s)
114 #define CONFIG_CMDLINE_TAG
115 #define CONFIG_INITRD_TAG
116 #define CONFIG_SETUP_MEMORY_TAGS
117 #define CONFIG_SERIAL_TAG
119 #define CONFIG_BOOTDELAY 1
121 #define CONFIG_BOOTDELAY 0
123 #define CONFIG_ZERO_BOOTDELAY_CHECK
124 #define CONFIG_SYS_AUTOLOAD "no"
126 #define CONFIG_BOOTFILE "uImage"
127 #define CONFIG_BOOTARGS "console=ttymxc0,115200 ro debug panic=1"
128 #define CONFIG_BOOTCOMMAND "run bootcmd_nand"
130 #define CONFIG_BOOTCOMMAND "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
131 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
132 #define CONFIG_DELAY_ENVIRONMENT
133 #endif /* CONFIG_MFG */
134 #define CONFIG_LOADADDR 18000000
135 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
136 #define CONFIG_IMX_WATCHDOG
137 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 3000
143 #ifdef CONFIG_ENV_IS_NOWHERE
144 #define CONFIG_EXTRA_ENV_SETTINGS \
148 "fdtaddr=11000000\0" \
149 "mtdids=" MTDIDS_DEFAULT "\0" \
150 "mtdparts=" MTDPARTS_DEFAULT "\0"
152 #define CONFIG_EXTRA_ENV_SETTINGS \
154 "baseboard=stk5-v3\0" \
155 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
156 " root=/dev/mmcblk0p3 rootwait\0" \
157 "bootargs_nand=run default_bootargs;set bootargs ${bootargs}" \
158 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
159 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
160 " root=/dev/nfs ip=dhcp nfsroot=${nfs_server}:${nfsroot},nolock\0"\
161 "bootcmd_mmc=set autostart no;run bootargs_mmc;" \
162 "fatload mmc 0 ${loadaddr} uImage;run bootm_cmd\0" \
163 "bootcmd_nand=set autostart no;run bootargs_nand;" \
164 "nboot linux;run bootm_cmd\0" \
165 "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;" \
167 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
170 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
171 " video=${video_mode} ${append_bootargs}\0" \
172 "fdtaddr=11000000\0" \
173 "mtdids=" MTDIDS_DEFAULT "\0" \
174 "mtdparts=" MTDPARTS_DEFAULT "\0" \
175 "nfsroot=/tftpboot/rootfs\0" \
176 "otg_mode=device\0" \
177 "touchpanel=tsc2007\0" \
178 "video_mode=VGA-1:640x480MR-24@60\0"
179 #endif /* CONFIG_ENV_IS_NOWHERE */
180 #endif /* CONFIG_MFG */
182 #define MTD_NAME "gpmi-nand"
183 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
184 #define CONFIG_SYS_NAND_ONFI_DETECTION
189 #include <config_cmd_default.h>
190 #define CONFIG_CMD_CACHE
191 #define CONFIG_CMD_MMC
192 #define CONFIG_CMD_NAND
193 #define CONFIG_CMD_MTDPARTS
194 #define CONFIG_CMD_BOOTCE
195 #define CONFIG_CMD_TIME
196 #define CONFIG_CMD_I2C
197 #define CONFIG_CMD_MEMTEST
202 #define CONFIG_MXC_UART
203 #define CONFIG_MXC_UART_BASE UART1_BASE
204 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
205 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
206 #define CONFIG_SYS_CONSOLE_INFO_QUIET
211 #define CONFIG_MXC_GPIO
216 #define CONFIG_FEC_MXC
217 #ifdef CONFIG_FEC_MXC
218 /* This is required for the FEC driver to work with cache enabled */
219 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
220 #define CONFIG_SYS_CACHELINE_SIZE 64
222 #define IMX_FEC_BASE ENET_BASE_ADDR
223 #define CONFIG_FEC_MXC_PHYADDR 0
224 #define CONFIG_PHYLIB
225 #define CONFIG_PHY_SMSC
227 #define CONFIG_FEC_XCV_TYPE RMII
228 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
229 #define CONFIG_CMD_MII
230 #define CONFIG_CMD_DHCP
231 #define CONFIG_CMD_PING
232 /* Add for working with "strict" DHCP server */
233 #define CONFIG_BOOTP_SUBNETMASK
234 #define CONFIG_BOOTP_GATEWAY
235 #define CONFIG_BOOTP_DNS
241 #ifdef CONFIG_CMD_I2C
242 #define CONFIG_HARD_I2C 1
243 #define CONFIG_I2C_MXC 1
244 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
245 #define CONFIG_SYS_I2C_MX6_PORT1
246 #define CONFIG_SYS_I2C_SPEED 10000
247 #define CONFIG_SYS_I2C_SLAVE 0x3c
248 #define CONFIG_MX6_INTER_LDO_BYPASS 0
251 #ifndef CONFIG_ENV_IS_NOWHERE
252 /* define one of the following options:
253 #define CONFIG_ENV_IS_IN_NAND
254 #define CONFIG_ENV_IS_IN_MMC
256 #define CONFIG_ENV_IS_IN_NAND
258 #define CONFIG_ENV_OVERWRITE
263 #ifdef CONFIG_CMD_NAND
264 #define CONFIG_MTD_DEVICE
266 #define CONFIG_MTD_DEBUG
267 #define CONFIG_MTD_DEBUG_VERBOSE 4
269 #define CONFIG_NAND_MXS
270 #define CONFIG_NAND_MXS_NO_BBM_SWAP
271 #define CONFIG_APBH_DMA
272 #define CONFIG_APBH_DMA_BURST
273 #define CONFIG_APBH_DMA_BURST8
274 #define CONFIG_CMD_NAND_TRIMFFS
275 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
276 #define CONFIG_SYS_MAX_FLASH_BANKS 1
277 #define CONFIG_SYS_NAND_MAX_CHIPS 1
278 #define CONFIG_SYS_MAX_NAND_DEVICE 1
279 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
280 #define CONFIG_SYS_NAND_USE_FLASH_BBT
281 #define CONFIG_SYS_NAND_BASE 0x00000000
282 #define CONFIG_CMD_ROMUPDATE
284 #undef CONFIG_ENV_IS_IN_NAND
285 #endif /* CONFIG_CMD_NAND */
287 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
288 #define CONFIG_ENV_SIZE SZ_128K
289 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
290 #ifdef CONFIG_ENV_OFFSET_REDUND
291 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
293 xstr(CONFIG_SYS_ENV_PART_SIZE) \
295 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
297 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
299 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
300 #endif /* CONFIG_ENV_OFFSET_REDUND */
305 #ifdef CONFIG_CMD_MMC
307 #define CONFIG_GENERIC_MMC
308 #define CONFIG_FSL_ESDHC
309 #define CONFIG_FSL_USDHC
310 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
311 #define CONFIG_SYS_FSL_ESDHC_NUM 2
313 #define CONFIG_DOS_PARTITION
314 #define CONFIG_CMD_FAT
315 #define CONFIG_CMD_EXT2
318 * Environments on MMC
320 #ifdef CONFIG_ENV_IS_IN_MMC
321 #define CONFIG_SYS_MMC_ENV_DEV 0
322 #undef CONFIG_ENV_OFFSET
323 #undef CONFIG_ENV_SIZE
324 /* Associated with the MMC layout defined in mmcops.c */
325 #define CONFIG_ENV_OFFSET SZ_1K
326 #define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
327 #define CONFIG_DYNAMIC_MMC_DEVNO
328 #endif /* CONFIG_ENV_IS_IN_MMC */
330 #undef CONFIG_ENV_IS_IN_MMC
331 #endif /* CONFIG_CMD_MMC */
333 #ifdef CONFIG_ENV_IS_NOWHERE
334 #undef CONFIG_ENV_SIZE
335 #define CONFIG_ENV_SIZE SZ_4K
338 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
339 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
340 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
342 CONFIG_SYS_ENV_PART_STR \
343 "4m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
344 xstr(CONFIG_SYS_DTB_PART_SIZE) \
346 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
347 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
349 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
350 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
351 GENERATED_GBL_DATA_SIZE)
353 #endif /* __CONFIGS_TX6_H */