2 * Host communication command constants for ChromeOS EC
4 * Copyright (C) 2012 Google, Inc
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * The ChromeOS EC multi function device is used to mux all the requests
16 * to the EC device for its multiple features: keyboard controller,
17 * battery charging and regulator control, firmware update.
19 * NOTE: This file is copied verbatim from the ChromeOS EC Open Source
20 * project in an attempt to make future updates easy to make.
23 #ifndef __CROS_EC_COMMANDS_H
24 #define __CROS_EC_COMMANDS_H
27 * Current version of this protocol
29 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
30 * determined in other ways. Remove this once the kernel code no longer
33 #define EC_PROTO_VERSION 0x00000002
35 /* Command version mask */
36 #define EC_VER_MASK(version) (1UL << (version))
38 /* I/O addresses for ACPI commands */
39 #define EC_LPC_ADDR_ACPI_DATA 0x62
40 #define EC_LPC_ADDR_ACPI_CMD 0x66
42 /* I/O addresses for host command */
43 #define EC_LPC_ADDR_HOST_DATA 0x200
44 #define EC_LPC_ADDR_HOST_CMD 0x204
46 /* I/O addresses for host command args and params */
47 /* Protocol version 2 */
48 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */
49 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is
50 * EC_PROTO2_MAX_PARAM_SIZE */
51 /* Protocol version 3 */
52 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */
53 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
55 /* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
56 * and they tell the kernel that so we have to think of it as two parts. */
57 #define EC_HOST_CMD_REGION0 0x800
58 #define EC_HOST_CMD_REGION1 0x880
59 #define EC_HOST_CMD_REGION_SIZE 0x80
61 /* EC command register bit functions */
62 #define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */
63 #define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */
64 #define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */
65 #define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */
66 #define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */
67 #define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */
68 #define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */
70 #define EC_LPC_ADDR_MEMMAP 0x900
71 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */
72 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
74 /* The offset address of each type of data in mapped memory. */
75 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
76 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
77 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
78 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */
79 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
80 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
81 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
82 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
83 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
84 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */
85 /* Unused 0x28 - 0x2f */
86 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
87 /* Unused 0x31 - 0x33 */
88 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */
89 /* Reserve 0x38 - 0x3f for additional host event-related stuff */
90 /* Battery values are all 32 bits */
91 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
92 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
93 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
94 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */
95 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */
96 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
97 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
98 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */
99 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
100 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */
101 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */
102 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */
103 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */
104 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */
105 /* Unused 0x84 - 0x8f */
106 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/
108 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometer data 0x92 - 0x9f */
109 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
110 /* Unused 0xa6 - 0xfe (remember, 0xff is NOT part of the memmap region) */
113 /* Define the format of the accelerometer mapped memory status byte. */
114 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
115 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4)
116 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7)
118 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
119 #define EC_TEMP_SENSOR_ENTRIES 16
121 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
123 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
125 #define EC_TEMP_SENSOR_B_ENTRIES 8
127 /* Special values for mapped temperature sensors */
128 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff
129 #define EC_TEMP_SENSOR_ERROR 0xfe
130 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd
131 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
133 * The offset of temperature value stored in mapped memory. This allows
134 * reporting a temperature range of 200K to 454K = -73C to 181C.
136 #define EC_TEMP_SENSOR_OFFSET 200
139 * Number of ALS readings at EC_MEMMAP_ALS
141 #define EC_ALS_ENTRIES 2
144 * The default value a temperature sensor will return when it is present but
145 * has not been read this boot. This is a reasonable number to avoid
146 * triggering alarms on the host.
148 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
150 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */
151 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */
152 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */
154 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
155 #define EC_BATT_FLAG_AC_PRESENT 0x01
156 #define EC_BATT_FLAG_BATT_PRESENT 0x02
157 #define EC_BATT_FLAG_DISCHARGING 0x04
158 #define EC_BATT_FLAG_CHARGING 0x08
159 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
161 /* Switch flags at EC_MEMMAP_SWITCHES */
162 #define EC_SWITCH_LID_OPEN 0x01
163 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
164 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
165 /* Was recovery requested via keyboard; now unused. */
166 #define EC_SWITCH_IGNORE1 0x08
167 /* Recovery requested via dedicated signal (from servo board) */
168 #define EC_SWITCH_DEDICATED_RECOVERY 0x10
169 /* Was fake developer mode switch; now unused. Remove in next refactor. */
170 #define EC_SWITCH_IGNORE0 0x20
172 /* Host command interface flags */
173 /* Host command interface supports LPC args (LPC interface only) */
174 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
175 /* Host command interface supports version 3 protocol */
176 #define EC_HOST_CMD_FLAG_VERSION_3 0x02
178 /* Wireless switch flags */
179 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */
180 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */
181 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */
182 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
183 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
186 * This header file is used in coreboot both in C and ACPI code. The ACPI code
187 * is pre-processed to handle constants but the ASL compiler is unable to
188 * handle actual C code so keep it separate.
193 * Define __packed if someone hasn't beat us to it. Linux kernel style
194 * checking prefers __packed over __attribute__((packed)).
197 #define __packed __attribute__((packed))
200 /* LPC command status byte masks */
201 /* EC has written a byte in the data register and host hasn't read it yet */
202 #define EC_LPC_STATUS_TO_HOST 0x01
203 /* Host has written a command/data byte and the EC hasn't read it yet */
204 #define EC_LPC_STATUS_FROM_HOST 0x02
205 /* EC is processing a command */
206 #define EC_LPC_STATUS_PROCESSING 0x04
207 /* Last write to EC was a command, not data */
208 #define EC_LPC_STATUS_LAST_CMD 0x08
209 /* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */
210 #define EC_LPC_STATUS_BURST_MODE 0x10
211 /* SCI event is pending (requesting SCI query) */
212 #define EC_LPC_STATUS_SCI_PENDING 0x20
213 /* SMI event is pending (requesting SMI query) */
214 #define EC_LPC_STATUS_SMI_PENDING 0x40
216 #define EC_LPC_STATUS_RESERVED 0x80
219 * EC is busy. This covers both the EC processing a command, and the host has
220 * written a new command but the EC hasn't picked it up yet.
222 #define EC_LPC_STATUS_BUSY_MASK \
223 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
225 /* Host command response codes */
228 EC_RES_INVALID_COMMAND = 1,
230 EC_RES_INVALID_PARAM = 3,
231 EC_RES_ACCESS_DENIED = 4,
232 EC_RES_INVALID_RESPONSE = 5,
233 EC_RES_INVALID_VERSION = 6,
234 EC_RES_INVALID_CHECKSUM = 7,
235 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */
236 EC_RES_UNAVAILABLE = 9, /* No response available */
237 EC_RES_TIMEOUT = 10, /* We got a timeout */
238 EC_RES_OVERFLOW = 11, /* Table / data overflow */
239 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */
240 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */
241 EC_RES_RESPONSE_TOO_BIG = 14 /* Response was too big to handle */
245 * Host event codes. Note these are 1-based, not 0-based, because ACPI query
246 * EC command uses code 0 to mean "no event pending". We explicitly specify
247 * each value in the enum listing so they won't change if we delete/insert an
248 * item or rearrange the list (it needs to be stable across platforms, not
249 * just within a single compiled instance).
251 enum host_event_code {
252 EC_HOST_EVENT_LID_CLOSED = 1,
253 EC_HOST_EVENT_LID_OPEN = 2,
254 EC_HOST_EVENT_POWER_BUTTON = 3,
255 EC_HOST_EVENT_AC_CONNECTED = 4,
256 EC_HOST_EVENT_AC_DISCONNECTED = 5,
257 EC_HOST_EVENT_BATTERY_LOW = 6,
258 EC_HOST_EVENT_BATTERY_CRITICAL = 7,
259 EC_HOST_EVENT_BATTERY = 8,
260 EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
261 EC_HOST_EVENT_THERMAL_OVERLOAD = 10,
262 EC_HOST_EVENT_THERMAL = 11,
263 EC_HOST_EVENT_USB_CHARGER = 12,
264 EC_HOST_EVENT_KEY_PRESSED = 13,
266 * EC has finished initializing the host interface. The host can check
267 * for this event following sending a EC_CMD_REBOOT_EC command to
268 * determine when the EC is ready to accept subsequent commands.
270 EC_HOST_EVENT_INTERFACE_READY = 14,
271 /* Keyboard recovery combo has been pressed */
272 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
274 /* Shutdown due to thermal overload */
275 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
276 /* Shutdown due to battery level too low */
277 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
279 /* Suggest that the AP throttle itself */
280 EC_HOST_EVENT_THROTTLE_START = 18,
281 /* Suggest that the AP resume normal speed */
282 EC_HOST_EVENT_THROTTLE_STOP = 19,
284 /* Hang detect logic detected a hang and host event timeout expired */
285 EC_HOST_EVENT_HANG_DETECT = 20,
286 /* Hang detect logic detected a hang and warm rebooted the AP */
287 EC_HOST_EVENT_HANG_REBOOT = 21,
290 * The high bit of the event mask is not used as a host event code. If
291 * it reads back as set, then the entire event mask should be
292 * considered invalid by the host. This can happen when reading the
293 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
294 * not initialized on the EC, or improperly configured on the host.
296 EC_HOST_EVENT_INVALID = 32
298 /* Host event mask */
299 #define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1))
301 /* Arguments at EC_LPC_ADDR_HOST_ARGS */
302 struct ec_lpc_host_args {
304 uint8_t command_version;
307 * Checksum; sum of command + flags + command_version + data_size +
308 * all params/response data bytes.
313 /* Flags for ec_lpc_host_args.flags */
315 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command
318 * If EC gets a command and this flag is not set, this is an old-style command.
319 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
320 * unknown length. EC must respond with an old-style response (that is,
321 * withouth setting EC_HOST_ARGS_FLAG_TO_HOST).
323 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
325 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response.
327 * If EC responds to a command and this flag is not set, this is an old-style
328 * response. Command version is 0 and response data from EC is at
329 * EC_LPC_ADDR_OLD_PARAM with unknown length.
331 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02
333 /*****************************************************************************/
335 * Byte codes returned by EC over SPI interface.
337 * These can be used by the AP to debug the EC interface, and to determine
338 * when the EC is not in a state where it will ever get around to responding
341 * Example of sequence of bytes read from EC for a current good transfer:
342 * 1. - - AP asserts chip select (CS#)
343 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request
344 * 3. - - EC starts handling CS# interrupt
345 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request
346 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in
347 * bytes looking for EC_SPI_FRAME_START
348 * 6. - - EC finishes processing and sets up response
349 * 7. EC_SPI_FRAME_START - AP reads frame byte
350 * 8. (response packet) - AP reads response packet
351 * 9. EC_SPI_PAST_END - Any additional bytes read by AP
352 * 10 - - AP deasserts chip select
353 * 11 - - EC processes CS# interrupt and sets up DMA for
356 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
357 * the following byte values:
363 * Then the EC found an error in the request, or was not ready for the request
364 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START,
365 * because the EC is unable to tell when the AP is done sending its request.
369 * Framing byte which precedes a response packet from the EC. After sending a
370 * request, the AP will clock in bytes until it sees the framing byte, then
371 * clock in the response packet.
373 #define EC_SPI_FRAME_START 0xec
376 * Padding bytes which are clocked out after the end of a response packet.
378 #define EC_SPI_PAST_END 0xed
381 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects
382 * that the AP will send a valid packet header (starting with
383 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
385 #define EC_SPI_RX_READY 0xf8
388 * EC has started receiving the request from the AP, but hasn't started
391 #define EC_SPI_RECEIVING 0xf9
393 /* EC has received the entire request from the AP and is processing it. */
394 #define EC_SPI_PROCESSING 0xfa
397 * EC received bad data from the AP, such as a packet header with an invalid
398 * length. EC will ignore all data until chip select deasserts.
400 #define EC_SPI_RX_BAD_DATA 0xfb
403 * EC received data from the AP before it was ready. That is, the AP asserted
404 * chip select and started clocking data before the EC was ready to receive it.
405 * EC will ignore all data until chip select deasserts.
407 #define EC_SPI_NOT_READY 0xfc
410 * EC was ready to receive a request from the AP. EC has treated the byte sent
411 * by the AP as part of a request packet, or (for old-style ECs) is processing
412 * a fully received packet but is not ready to respond yet.
414 #define EC_SPI_OLD_READY 0xfd
416 /*****************************************************************************/
419 * Protocol version 2 for I2C and SPI send a request this way:
421 * 0 EC_CMD_VERSION0 + (command version)
423 * 2 Length of params = N
424 * 3..N+2 Params, if any
425 * N+3 8-bit checksum of bytes 0..N+2
427 * The corresponding response is:
429 * 0 Result code (EC_RES_*)
430 * 1 Length of params = M
431 * 2..M+1 Params, if any
432 * M+2 8-bit checksum of bytes 0..M+1
434 #define EC_PROTO2_REQUEST_HEADER_BYTES 3
435 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1
436 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \
437 EC_PROTO2_REQUEST_TRAILER_BYTES)
439 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2
440 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
441 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \
442 EC_PROTO2_RESPONSE_TRAILER_BYTES)
444 /* Parameter length was limited by the LPC interface */
445 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc
447 /* Maximum request and response packet sizes for protocol version 2 */
448 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \
449 EC_PROTO2_MAX_PARAM_SIZE)
450 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \
451 EC_PROTO2_MAX_PARAM_SIZE)
453 /*****************************************************************************/
456 * Value written to legacy command port / prefix byte to indicate protocol
457 * 3+ structs are being used. Usage is bus-dependent.
459 #define EC_COMMAND_PROTOCOL_3 0xda
461 #define EC_HOST_REQUEST_VERSION 3
463 /* Version 3 request from host */
464 struct ec_host_request {
465 /* Struct version (=3)
467 * EC will return EC_RES_INVALID_HEADER if it receives a header with a
468 * version it doesn't know how to parse.
470 uint8_t struct_version;
473 * Checksum of request and data; sum of all bytes including checksum
481 /* Command version */
482 uint8_t command_version;
484 /* Unused byte in current protocol version; set to 0 */
487 /* Length of data which follows this header */
491 #define EC_HOST_RESPONSE_VERSION 3
493 /* Version 3 response from EC */
494 struct ec_host_response {
495 /* Struct version (=3) */
496 uint8_t struct_version;
499 * Checksum of response and data; sum of all bytes including checksum
504 /* Result code (EC_RES_*) */
507 /* Length of data which follows this header */
510 /* Unused bytes in current protocol version; set to 0 */
514 /*****************************************************************************/
518 * Each command is an 16-bit command value. Commands which take params or
519 * return response data specify structs for that data. If no struct is
520 * specified, the command does not input or output data, respectively.
521 * Parameter/response length is implicit in the structs. Some underlying
522 * communication protocols (I2C, SPI) may add length or checksum headers, but
523 * those are implementation-dependent and not defined here.
526 /*****************************************************************************/
527 /* General / test commands */
530 * Get protocol version, used to deal with non-backward compatible protocol
533 #define EC_CMD_PROTO_VERSION 0x00
535 struct ec_response_proto_version {
540 * Hello. This is a simple command to test the EC is responsive to
543 #define EC_CMD_HELLO 0x01
545 struct ec_params_hello {
546 uint32_t in_data; /* Pass anything here */
549 struct ec_response_hello {
550 uint32_t out_data; /* Output will be in_data + 0x01020304 */
553 /* Get version number */
554 #define EC_CMD_GET_VERSION 0x02
556 enum ec_current_image {
557 EC_IMAGE_UNKNOWN = 0,
562 struct ec_response_get_version {
563 /* Null-terminated version strings for RO, RW */
564 char version_string_ro[32];
565 char version_string_rw[32];
566 char reserved[32]; /* Was previously RW-B string */
567 uint32_t current_image; /* One of ec_current_image */
571 #define EC_CMD_READ_TEST 0x03
573 struct ec_params_read_test {
574 uint32_t offset; /* Starting value for read buffer */
575 uint32_t size; /* Size to read in bytes */
578 struct ec_response_read_test {
583 * Get build information
585 * Response is null-terminated string.
587 #define EC_CMD_GET_BUILD_INFO 0x04
590 #define EC_CMD_GET_CHIP_INFO 0x05
592 struct ec_response_get_chip_info {
593 /* Null-terminated strings */
596 char revision[32]; /* Mask version */
599 /* Get board HW version */
600 #define EC_CMD_GET_BOARD_VERSION 0x06
602 struct ec_response_board_version {
603 uint16_t board_version; /* A monotonously incrementing number. */
607 * Read memory-mapped data.
609 * This is an alternate interface to memory-mapped data for bus protocols
610 * which don't support direct-mapped memory - I2C, SPI, etc.
612 * Response is params.size bytes of data.
614 #define EC_CMD_READ_MEMMAP 0x07
616 struct ec_params_read_memmap {
617 uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */
618 uint8_t size; /* Size to read in bytes */
621 /* Read versions supported for a command */
622 #define EC_CMD_GET_CMD_VERSIONS 0x08
624 struct ec_params_get_cmd_versions {
625 uint8_t cmd; /* Command to check */
628 struct ec_response_get_cmd_versions {
630 * Mask of supported versions; use EC_VER_MASK() to compare with a
633 uint32_t version_mask;
637 * Check EC communcations status (busy). This is needed on i2c/spi but not
638 * on lpc since it has its own out-of-band busy indicator.
640 * lpc must read the status from the command register. Attempting this on
641 * lpc will overwrite the args/parameter space and corrupt its data.
643 #define EC_CMD_GET_COMMS_STATUS 0x09
645 /* Avoid using ec_status which is for return values */
646 enum ec_comms_status {
647 EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */
650 struct ec_response_get_comms_status {
651 uint32_t flags; /* Mask of enum ec_comms_status */
654 /* Fake a variety of responses, purely for testing purposes. */
655 #define EC_CMD_TEST_PROTOCOL 0x0a
657 /* Tell the EC what to send back to us. */
658 struct ec_params_test_protocol {
664 /* Here it comes... */
665 struct ec_response_test_protocol {
669 /* Get prococol information */
670 #define EC_CMD_GET_PROTOCOL_INFO 0x0b
672 /* Flags for ec_response_get_protocol_info.flags */
673 /* EC_RES_IN_PROGRESS may be returned if a command is slow */
674 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0)
676 struct ec_response_get_protocol_info {
677 /* Fields which exist if at least protocol version 3 supported */
679 /* Bitmask of protocol versions supported (1 << n means version n)*/
680 uint32_t protocol_versions;
682 /* Maximum request packet size, in bytes */
683 uint16_t max_request_packet_size;
685 /* Maximum response packet size, in bytes */
686 uint16_t max_response_packet_size;
688 /* Flags; see EC_PROTOCOL_INFO_* */
693 /*****************************************************************************/
694 /* Get/Set miscellaneous values */
696 /* The upper byte of .flags tells what to do (nothing means "get") */
697 #define EC_GSV_SET 0x80000000
699 /* The lower three bytes of .flags identifies the parameter, if that has
700 meaning for an individual command. */
701 #define EC_GSV_PARAM_MASK 0x00ffffff
703 struct ec_params_get_set_value {
708 struct ec_response_get_set_value {
713 /* More than one command can use these structs to get/set paramters. */
714 #define EC_CMD_GSV_PAUSE_IN_S5 0x0c
717 /*****************************************************************************/
721 #define EC_CMD_FLASH_INFO 0x10
723 /* Version 0 returns these fields */
724 struct ec_response_flash_info {
725 /* Usable flash size, in bytes */
728 * Write block size. Write offset and size must be a multiple
731 uint32_t write_block_size;
733 * Erase block size. Erase offset and size must be a multiple
736 uint32_t erase_block_size;
738 * Protection block size. Protection offset and size must be a
741 uint32_t protect_block_size;
744 /* Flags for version 1+ flash info command */
745 /* EC flash erases bits to 0 instead of 1 */
746 #define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)
749 * Version 1 returns the same initial fields as version 0, with additional
752 * gcc anonymous structs don't seem to get along with the __packed directive;
753 * if they did we'd define the version 0 struct as a sub-struct of this one.
755 struct ec_response_flash_info_1 {
756 /* Version 0 fields; see above for description */
758 uint32_t write_block_size;
759 uint32_t erase_block_size;
760 uint32_t protect_block_size;
762 /* Version 1 adds these fields: */
764 * Ideal write size in bytes. Writes will be fastest if size is
765 * exactly this and offset is a multiple of this. For example, an EC
766 * may have a write buffer which can do half-page operations if data is
767 * aligned, and a slower word-at-a-time write mode.
769 uint32_t write_ideal_size;
771 /* Flags; see EC_FLASH_INFO_* */
778 * Response is params.size bytes of data.
780 #define EC_CMD_FLASH_READ 0x11
782 struct ec_params_flash_read {
783 uint32_t offset; /* Byte offset to read */
784 uint32_t size; /* Size to read in bytes */
788 #define EC_CMD_FLASH_WRITE 0x12
789 #define EC_VER_FLASH_WRITE 1
791 /* Version 0 of the flash command supported only 64 bytes of data */
792 #define EC_FLASH_WRITE_VER0_SIZE 64
794 struct ec_params_flash_write {
795 uint32_t offset; /* Byte offset to write */
796 uint32_t size; /* Size to write in bytes */
797 /* Followed by data to write */
801 #define EC_CMD_FLASH_ERASE 0x13
803 struct ec_params_flash_erase {
804 uint32_t offset; /* Byte offset to erase */
805 uint32_t size; /* Size to erase in bytes */
809 * Get/set flash protection.
811 * If mask!=0, sets/clear the requested bits of flags. Depending on the
812 * firmware write protect GPIO, not all flags will take effect immediately;
813 * some flags require a subsequent hard reset to take effect. Check the
814 * returned flags bits to see what actually happened.
816 * If mask=0, simply returns the current flags state.
818 #define EC_CMD_FLASH_PROTECT 0x15
819 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */
821 /* Flags for flash protection */
822 /* RO flash code protected when the EC boots */
823 #define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0)
825 * RO flash code protected now. If this bit is set, at-boot status cannot
828 #define EC_FLASH_PROTECT_RO_NOW (1 << 1)
829 /* Entire flash code protected now, until reboot. */
830 #define EC_FLASH_PROTECT_ALL_NOW (1 << 2)
831 /* Flash write protect GPIO is asserted now */
832 #define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3)
833 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
834 #define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4)
836 * Error - flash protection is in inconsistent state. At least one bank of
837 * flash which should be protected is not protected. Usually fixed by
838 * re-requesting the desired flags, or by a hard reset if that fails.
840 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5)
841 /* Entile flash code protected when the EC boots */
842 #define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6)
844 struct ec_params_flash_protect {
845 uint32_t mask; /* Bits in flags to apply */
846 uint32_t flags; /* New flags to apply */
849 struct ec_response_flash_protect {
850 /* Current value of flash protect flags */
853 * Flags which are valid on this platform. This allows the caller
854 * to distinguish between flags which aren't set vs. flags which can't
855 * be set on this platform.
857 uint32_t valid_flags;
858 /* Flags which can be changed given the current protection state */
859 uint32_t writable_flags;
863 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
864 * write protect. These commands may be reused with version > 0.
867 /* Get the region offset/size */
868 #define EC_CMD_FLASH_REGION_INFO 0x16
869 #define EC_VER_FLASH_REGION_INFO 1
871 enum ec_flash_region {
872 /* Region which holds read-only EC image */
873 EC_FLASH_REGION_RO = 0,
874 /* Region which holds rewritable EC image */
877 * Region which should be write-protected in the factory (a superset of
878 * EC_FLASH_REGION_RO)
880 EC_FLASH_REGION_WP_RO,
881 /* Number of regions */
882 EC_FLASH_REGION_COUNT,
885 struct ec_params_flash_region_info {
886 uint32_t region; /* enum ec_flash_region */
889 struct ec_response_flash_region_info {
894 /* Read/write VbNvContext */
895 #define EC_CMD_VBNV_CONTEXT 0x17
896 #define EC_VER_VBNV_CONTEXT 1
897 #define EC_VBNV_BLOCK_SIZE 16
899 enum ec_vbnvcontext_op {
900 EC_VBNV_CONTEXT_OP_READ,
901 EC_VBNV_CONTEXT_OP_WRITE,
904 struct ec_params_vbnvcontext {
906 uint8_t block[EC_VBNV_BLOCK_SIZE];
909 struct ec_response_vbnvcontext {
910 uint8_t block[EC_VBNV_BLOCK_SIZE];
913 /*****************************************************************************/
916 /* Get fan target RPM */
917 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x20
919 struct ec_response_pwm_get_fan_rpm {
923 /* Set target fan RPM */
924 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21
926 struct ec_params_pwm_set_fan_target_rpm {
930 /* Get keyboard backlight */
931 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22
933 struct ec_response_pwm_get_keyboard_backlight {
938 /* Set keyboard backlight */
939 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23
941 struct ec_params_pwm_set_keyboard_backlight {
945 /* Set target fan PWM duty cycle */
946 #define EC_CMD_PWM_SET_FAN_DUTY 0x24
948 struct ec_params_pwm_set_fan_duty {
952 #define EC_CMD_PWM_SET_DUTY 0x25
953 /* 16 bit duty cycle, 0xffff = 100% */
954 #define EC_PWM_MAX_DUTY 0xffff
957 /* All types, indexed by board-specific enum pwm_channel */
958 EC_PWM_TYPE_GENERIC = 0,
959 /* Keyboard backlight */
960 EC_PWM_TYPE_KB_LIGHT,
961 /* Display backlight */
962 EC_PWM_TYPE_DISPLAY_LIGHT,
966 struct ec_params_pwm_set_duty {
967 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
968 uint8_t pwm_type; /* ec_pwm_type */
969 uint8_t index; /* Type-specific index, or 0 if unique */
972 #define EC_CMD_PWM_GET_DUTY 0x26
974 struct ec_params_pwm_get_duty {
975 uint8_t pwm_type; /* ec_pwm_type */
976 uint8_t index; /* Type-specific index, or 0 if unique */
979 struct ec_response_pwm_get_duty {
980 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
983 /*****************************************************************************/
985 * Lightbar commands. This looks worse than it is. Since we only use one HOST
986 * command to say "talk to the lightbar", we put the "and tell it to do X" part
987 * into a subcommand. We'll make separate structs for subcommands with
988 * different input args, so that we know how much to expect.
990 #define EC_CMD_LIGHTBAR_CMD 0x28
996 #define LB_BATTERY_LEVELS 4
997 /* List of tweakable parameters. NOTE: It's __packed so it can be sent in a
998 * host command, but the alignment is the same regardless. Keep it that way.
1000 struct lightbar_params_v0 {
1002 int32_t google_ramp_up;
1003 int32_t google_ramp_down;
1004 int32_t s3s0_ramp_up;
1005 int32_t s0_tick_delay[2]; /* AC=0/1 */
1006 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1007 int32_t s0s3_ramp_down;
1008 int32_t s3_sleep_for;
1010 int32_t s3_ramp_down;
1014 uint8_t osc_min[2]; /* AC=0/1 */
1015 uint8_t osc_max[2]; /* AC=0/1 */
1016 uint8_t w_ofs[2]; /* AC=0/1 */
1018 /* Brightness limits based on the backlight and AC. */
1019 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1020 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1021 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1023 /* Battery level thresholds */
1024 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1026 /* Map [AC][battery_level] to color index */
1027 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1028 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1031 struct rgb_s color[8]; /* 0-3 are Google colors */
1034 struct lightbar_params_v1 {
1036 int32_t google_ramp_up;
1037 int32_t google_ramp_down;
1038 int32_t s3s0_ramp_up;
1039 int32_t s0_tick_delay[2]; /* AC=0/1 */
1040 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1041 int32_t s0s3_ramp_down;
1042 int32_t s3_sleep_for;
1044 int32_t s3_ramp_down;
1045 int32_t tap_tick_delay;
1046 int32_t tap_display_time;
1048 /* Tap-for-battery params */
1049 uint8_t tap_pct_red;
1050 uint8_t tap_pct_green;
1051 uint8_t tap_seg_min_on;
1052 uint8_t tap_seg_max_on;
1053 uint8_t tap_seg_osc;
1057 uint8_t osc_min[2]; /* AC=0/1 */
1058 uint8_t osc_max[2]; /* AC=0/1 */
1059 uint8_t w_ofs[2]; /* AC=0/1 */
1061 /* Brightness limits based on the backlight and AC. */
1062 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1063 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1064 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1066 /* Battery level thresholds */
1067 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1069 /* Map [AC][battery_level] to color index */
1070 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1071 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1074 struct rgb_s color[8]; /* 0-3 are Google colors */
1077 struct ec_params_lightbar {
1078 uint8_t cmd; /* Command (see enum lightbar_command) */
1082 } dump, off, on, init, get_seq, get_params_v0, get_params_v1,
1083 version, get_brightness, get_demo;
1087 } set_brightness, seq, demo;
1090 uint8_t ctrl, reg, value;
1094 uint8_t led, red, green, blue;
1101 struct lightbar_params_v0 set_params_v0;
1102 struct lightbar_params_v1 set_params_v1;
1106 struct ec_response_lightbar {
1118 } get_seq, get_brightness, get_demo;
1120 struct lightbar_params_v0 get_params_v0;
1121 struct lightbar_params_v1 get_params_v1;
1129 uint8_t red, green, blue;
1133 /* no return params */
1134 } off, on, init, set_brightness, seq, reg, set_rgb,
1135 demo, set_params_v0, set_params_v1;
1139 /* Lightbar commands */
1140 enum lightbar_command {
1141 LIGHTBAR_CMD_DUMP = 0,
1142 LIGHTBAR_CMD_OFF = 1,
1143 LIGHTBAR_CMD_ON = 2,
1144 LIGHTBAR_CMD_INIT = 3,
1145 LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
1146 LIGHTBAR_CMD_SEQ = 5,
1147 LIGHTBAR_CMD_REG = 6,
1148 LIGHTBAR_CMD_SET_RGB = 7,
1149 LIGHTBAR_CMD_GET_SEQ = 8,
1150 LIGHTBAR_CMD_DEMO = 9,
1151 LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
1152 LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
1153 LIGHTBAR_CMD_VERSION = 12,
1154 LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
1155 LIGHTBAR_CMD_GET_RGB = 14,
1156 LIGHTBAR_CMD_GET_DEMO = 15,
1157 LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
1158 LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
1162 /*****************************************************************************/
1163 /* LED control commands */
1165 #define EC_CMD_LED_CONTROL 0x29
1168 /* LED to indicate battery state of charge */
1169 EC_LED_ID_BATTERY_LED = 0,
1171 * LED to indicate system power state (on or in suspend).
1172 * May be on power button or on C-panel.
1174 EC_LED_ID_POWER_LED,
1175 /* LED on power adapter or its plug */
1176 EC_LED_ID_ADAPTER_LED,
1181 /* LED control flags */
1182 #define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */
1183 #define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */
1185 enum ec_led_colors {
1186 EC_LED_COLOR_RED = 0,
1189 EC_LED_COLOR_YELLOW,
1195 struct ec_params_led_control {
1196 uint8_t led_id; /* Which LED to control */
1197 uint8_t flags; /* Control flags */
1199 uint8_t brightness[EC_LED_COLOR_COUNT];
1202 struct ec_response_led_control {
1204 * Available brightness value range.
1206 * Range 0 means color channel not present.
1207 * Range 1 means on/off control.
1208 * Other values means the LED is control by PWM.
1210 uint8_t brightness_range[EC_LED_COLOR_COUNT];
1213 /*****************************************************************************/
1214 /* Verified boot commands */
1217 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
1218 * reused for other purposes with version > 0.
1221 /* Verified boot hash command */
1222 #define EC_CMD_VBOOT_HASH 0x2A
1224 struct ec_params_vboot_hash {
1225 uint8_t cmd; /* enum ec_vboot_hash_cmd */
1226 uint8_t hash_type; /* enum ec_vboot_hash_type */
1227 uint8_t nonce_size; /* Nonce size; may be 0 */
1228 uint8_t reserved0; /* Reserved; set 0 */
1229 uint32_t offset; /* Offset in flash to hash */
1230 uint32_t size; /* Number of bytes to hash */
1231 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */
1234 struct ec_response_vboot_hash {
1235 uint8_t status; /* enum ec_vboot_hash_status */
1236 uint8_t hash_type; /* enum ec_vboot_hash_type */
1237 uint8_t digest_size; /* Size of hash digest in bytes */
1238 uint8_t reserved0; /* Ignore; will be 0 */
1239 uint32_t offset; /* Offset in flash which was hashed */
1240 uint32_t size; /* Number of bytes hashed */
1241 uint8_t hash_digest[64]; /* Hash digest data */
1244 enum ec_vboot_hash_cmd {
1245 EC_VBOOT_HASH_GET = 0, /* Get current hash status */
1246 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */
1247 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */
1248 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */
1251 enum ec_vboot_hash_type {
1252 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
1255 enum ec_vboot_hash_status {
1256 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */
1257 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */
1258 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */
1262 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
1263 * If one of these is specified, the EC will automatically update offset and
1264 * size to the correct values for the specified image (RO or RW).
1266 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
1267 #define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd
1269 /*****************************************************************************/
1271 * Motion sense commands. We'll make separate structs for sub-commands with
1272 * different input args, so that we know how much to expect.
1274 #define EC_CMD_MOTION_SENSE_CMD 0x2B
1276 /* Motion sense commands */
1277 enum motionsense_command {
1279 * Dump command returns all motion sensor data including motion sense
1280 * module flags and individual sensor flags.
1282 MOTIONSENSE_CMD_DUMP = 0,
1285 * Info command returns data describing the details of a given sensor,
1286 * including enum motionsensor_type, enum motionsensor_location, and
1287 * enum motionsensor_chip.
1289 MOTIONSENSE_CMD_INFO = 1,
1292 * EC Rate command is a setter/getter command for the EC sampling rate
1293 * of all motion sensors in milliseconds.
1295 MOTIONSENSE_CMD_EC_RATE = 2,
1298 * Sensor ODR command is a setter/getter command for the output data
1299 * rate of a specific motion sensor in millihertz.
1301 MOTIONSENSE_CMD_SENSOR_ODR = 3,
1304 * Sensor range command is a setter/getter command for the range of
1305 * a specified motion sensor in +/-G's or +/- deg/s.
1307 MOTIONSENSE_CMD_SENSOR_RANGE = 4,
1310 * Setter/getter command for the keyboard wake angle. When the lid
1311 * angle is greater than this value, keyboard wake is disabled in S3,
1312 * and when the lid angle goes less than this value, keyboard wake is
1313 * enabled. Note, the lid angle measurement is an approximate,
1314 * un-calibrated value, hence the wake angle isn't exact.
1316 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
1318 /* Number of motionsense sub-commands. */
1319 MOTIONSENSE_NUM_CMDS
1322 enum motionsensor_id {
1323 EC_MOTION_SENSOR_ACCEL_BASE = 0,
1324 EC_MOTION_SENSOR_ACCEL_LID = 1,
1325 EC_MOTION_SENSOR_GYRO = 2,
1328 * Note, if more sensors are added and this count changes, the padding
1329 * in ec_response_motion_sense dump command must be modified.
1331 EC_MOTION_SENSOR_COUNT = 3
1334 /* List of motion sensor types. */
1335 enum motionsensor_type {
1336 MOTIONSENSE_TYPE_ACCEL = 0,
1337 MOTIONSENSE_TYPE_GYRO = 1,
1340 /* List of motion sensor locations. */
1341 enum motionsensor_location {
1342 MOTIONSENSE_LOC_BASE = 0,
1343 MOTIONSENSE_LOC_LID = 1,
1346 /* List of motion sensor chips. */
1347 enum motionsensor_chip {
1348 MOTIONSENSE_CHIP_KXCJ9 = 0,
1351 /* Module flag masks used for the dump sub-command. */
1352 #define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0)
1354 /* Sensor flag masks used for the dump sub-command. */
1355 #define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0)
1358 * Send this value for the data element to only perform a read. If you
1359 * send any other value, the EC will interpret it as data to set and will
1360 * return the actual value set.
1362 #define EC_MOTION_SENSE_NO_VALUE -1
1364 struct ec_params_motion_sense {
1367 /* Used for MOTIONSENSE_CMD_DUMP. */
1373 * Used for MOTIONSENSE_CMD_EC_RATE and
1374 * MOTIONSENSE_CMD_KB_WAKE_ANGLE.
1377 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
1379 } ec_rate, kb_wake_angle;
1381 /* Used for MOTIONSENSE_CMD_INFO. */
1383 /* Should be element of enum motionsensor_id. */
1388 * Used for MOTIONSENSE_CMD_SENSOR_ODR and
1389 * MOTIONSENSE_CMD_SENSOR_RANGE.
1392 /* Should be element of enum motionsensor_id. */
1395 /* Rounding flag, true for round-up, false for down. */
1400 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
1402 } sensor_odr, sensor_range;
1406 struct ec_response_motion_sense {
1408 /* Used for MOTIONSENSE_CMD_DUMP. */
1410 /* Flags representing the motion sensor module. */
1411 uint8_t module_flags;
1413 /* Flags for each sensor in enum motionsensor_id. */
1414 uint8_t sensor_flags[EC_MOTION_SENSOR_COUNT];
1416 /* Array of all sensor data. Each sensor is 3-axis. */
1417 int16_t data[3*EC_MOTION_SENSOR_COUNT];
1420 /* Used for MOTIONSENSE_CMD_INFO. */
1422 /* Should be element of enum motionsensor_type. */
1425 /* Should be element of enum motionsensor_location. */
1428 /* Should be element of enum motionsensor_chip. */
1433 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
1434 * MOTIONSENSE_CMD_SENSOR_RANGE, and
1435 * MOTIONSENSE_CMD_KB_WAKE_ANGLE.
1438 /* Current value of the parameter queried. */
1440 } ec_rate, sensor_odr, sensor_range, kb_wake_angle;
1444 /*****************************************************************************/
1445 /* USB charging control commands */
1447 /* Set USB port charging mode */
1448 #define EC_CMD_USB_CHARGE_SET_MODE 0x30
1450 struct ec_params_usb_charge_set_mode {
1451 uint8_t usb_port_id;
1455 /*****************************************************************************/
1456 /* Persistent storage for host */
1458 /* Maximum bytes that can be read/written in a single command */
1459 #define EC_PSTORE_SIZE_MAX 64
1461 /* Get persistent storage info */
1462 #define EC_CMD_PSTORE_INFO 0x40
1464 struct ec_response_pstore_info {
1465 /* Persistent storage size, in bytes */
1466 uint32_t pstore_size;
1467 /* Access size; read/write offset and size must be a multiple of this */
1468 uint32_t access_size;
1472 * Read persistent storage
1474 * Response is params.size bytes of data.
1476 #define EC_CMD_PSTORE_READ 0x41
1478 struct ec_params_pstore_read {
1479 uint32_t offset; /* Byte offset to read */
1480 uint32_t size; /* Size to read in bytes */
1483 /* Write persistent storage */
1484 #define EC_CMD_PSTORE_WRITE 0x42
1486 struct ec_params_pstore_write {
1487 uint32_t offset; /* Byte offset to write */
1488 uint32_t size; /* Size to write in bytes */
1489 uint8_t data[EC_PSTORE_SIZE_MAX];
1492 /*****************************************************************************/
1493 /* Real-time clock */
1495 /* RTC params and response structures */
1496 struct ec_params_rtc {
1500 struct ec_response_rtc {
1504 /* These use ec_response_rtc */
1505 #define EC_CMD_RTC_GET_VALUE 0x44
1506 #define EC_CMD_RTC_GET_ALARM 0x45
1508 /* These all use ec_params_rtc */
1509 #define EC_CMD_RTC_SET_VALUE 0x46
1510 #define EC_CMD_RTC_SET_ALARM 0x47
1512 /*****************************************************************************/
1513 /* Port80 log access */
1515 /* Maximum entries that can be read/written in a single command */
1516 #define EC_PORT80_SIZE_MAX 32
1518 /* Get last port80 code from previous boot */
1519 #define EC_CMD_PORT80_LAST_BOOT 0x48
1520 #define EC_CMD_PORT80_READ 0x48
1522 enum ec_port80_subcmd {
1523 EC_PORT80_GET_INFO = 0,
1524 EC_PORT80_READ_BUFFER,
1527 struct ec_params_port80_read {
1532 uint32_t num_entries;
1537 struct ec_response_port80_read {
1541 uint32_t history_size;
1545 uint16_t codes[EC_PORT80_SIZE_MAX];
1550 struct ec_response_port80_last_boot {
1554 /*****************************************************************************/
1555 /* Thermal engine commands. Note that there are two implementations. We'll
1556 * reuse the command number, but the data and behavior is incompatible.
1557 * Version 0 is what originally shipped on Link.
1558 * Version 1 separates the CPU thermal limits from the fan control.
1561 #define EC_CMD_THERMAL_SET_THRESHOLD 0x50
1562 #define EC_CMD_THERMAL_GET_THRESHOLD 0x51
1564 /* The version 0 structs are opaque. You have to know what they are for
1565 * the get/set commands to make any sense.
1568 /* Version 0 - set */
1569 struct ec_params_thermal_set_threshold {
1570 uint8_t sensor_type;
1571 uint8_t threshold_id;
1575 /* Version 0 - get */
1576 struct ec_params_thermal_get_threshold {
1577 uint8_t sensor_type;
1578 uint8_t threshold_id;
1581 struct ec_response_thermal_get_threshold {
1586 /* The version 1 structs are visible. */
1587 enum ec_temp_thresholds {
1588 EC_TEMP_THRESH_WARN = 0,
1589 EC_TEMP_THRESH_HIGH,
1590 EC_TEMP_THRESH_HALT,
1592 EC_TEMP_THRESH_COUNT
1595 /* Thermal configuration for one temperature sensor. Temps are in degrees K.
1596 * Zero values will be silently ignored by the thermal task.
1598 struct ec_thermal_config {
1599 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
1600 uint32_t temp_fan_off; /* no active cooling needed */
1601 uint32_t temp_fan_max; /* max active cooling needed */
1604 /* Version 1 - get config for one sensor. */
1605 struct ec_params_thermal_get_threshold_v1 {
1606 uint32_t sensor_num;
1608 /* This returns a struct ec_thermal_config */
1610 /* Version 1 - set config for one sensor.
1611 * Use read-modify-write for best results! */
1612 struct ec_params_thermal_set_threshold_v1 {
1613 uint32_t sensor_num;
1614 struct ec_thermal_config cfg;
1616 /* This returns no data */
1618 /****************************************************************************/
1620 /* Toggle automatic fan control */
1621 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52
1623 /* Get TMP006 calibration data */
1624 #define EC_CMD_TMP006_GET_CALIBRATION 0x53
1626 struct ec_params_tmp006_get_calibration {
1630 struct ec_response_tmp006_get_calibration {
1637 /* Set TMP006 calibration data */
1638 #define EC_CMD_TMP006_SET_CALIBRATION 0x54
1640 struct ec_params_tmp006_set_calibration {
1642 uint8_t reserved[3]; /* Reserved; set 0 */
1649 /* Read raw TMP006 data */
1650 #define EC_CMD_TMP006_GET_RAW 0x55
1652 struct ec_params_tmp006_get_raw {
1656 struct ec_response_tmp006_get_raw {
1657 int32_t t; /* In 1/100 K */
1658 int32_t v; /* In nV */
1661 /*****************************************************************************/
1662 /* MKBP - Matrix KeyBoard Protocol */
1667 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for
1668 * expected response size.
1670 #define EC_CMD_MKBP_STATE 0x60
1672 /* Provide information about the matrix : number of rows and columns */
1673 #define EC_CMD_MKBP_INFO 0x61
1675 struct ec_response_mkbp_info {
1681 /* Simulate key press */
1682 #define EC_CMD_MKBP_SIMULATE_KEY 0x62
1684 struct ec_params_mkbp_simulate_key {
1690 /* Configure keyboard scanning */
1691 #define EC_CMD_MKBP_SET_CONFIG 0x64
1692 #define EC_CMD_MKBP_GET_CONFIG 0x65
1695 enum mkbp_config_flags {
1696 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */
1699 enum mkbp_config_valid {
1700 EC_MKBP_VALID_SCAN_PERIOD = 1 << 0,
1701 EC_MKBP_VALID_POLL_TIMEOUT = 1 << 1,
1702 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = 1 << 3,
1703 EC_MKBP_VALID_OUTPUT_SETTLE = 1 << 4,
1704 EC_MKBP_VALID_DEBOUNCE_DOWN = 1 << 5,
1705 EC_MKBP_VALID_DEBOUNCE_UP = 1 << 6,
1706 EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7,
1709 /* Configuration for our key scanning algorithm */
1710 struct ec_mkbp_config {
1711 uint32_t valid_mask; /* valid fields */
1712 uint8_t flags; /* some flags (enum mkbp_config_flags) */
1713 uint8_t valid_flags; /* which flags are valid */
1714 uint16_t scan_period_us; /* period between start of scans */
1715 /* revert to interrupt mode after no activity for this long */
1716 uint32_t poll_timeout_us;
1718 * minimum post-scan relax time. Once we finish a scan we check
1719 * the time until we are due to start the next one. If this time is
1720 * shorter this field, we use this instead.
1722 uint16_t min_post_scan_delay_us;
1723 /* delay between setting up output and waiting for it to settle */
1724 uint16_t output_settle_us;
1725 uint16_t debounce_down_us; /* time for debounce on key down */
1726 uint16_t debounce_up_us; /* time for debounce on key up */
1727 /* maximum depth to allow for fifo (0 = no keyscan output) */
1728 uint8_t fifo_max_depth;
1731 struct ec_params_mkbp_set_config {
1732 struct ec_mkbp_config config;
1735 struct ec_response_mkbp_get_config {
1736 struct ec_mkbp_config config;
1739 /* Run the key scan emulation */
1740 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x66
1742 enum ec_keyscan_seq_cmd {
1743 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */
1744 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */
1745 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */
1746 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */
1747 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */
1750 enum ec_collect_flags {
1752 * Indicates this scan was processed by the EC. Due to timing, some
1753 * scans may be skipped.
1755 EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0,
1758 struct ec_collect_item {
1759 uint8_t flags; /* some flags (enum ec_collect_flags) */
1762 struct ec_params_keyscan_seq_ctrl {
1763 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */
1766 uint8_t active; /* still active */
1767 uint8_t num_items; /* number of items */
1768 /* Current item being presented */
1773 * Absolute time for this scan, measured from the
1774 * start of the sequence.
1777 uint8_t scan[0]; /* keyscan data */
1780 uint8_t start_item; /* First item to return */
1781 uint8_t num_items; /* Number of items to return */
1786 struct ec_result_keyscan_seq_ctrl {
1789 uint8_t num_items; /* Number of items */
1790 /* Data for each item */
1791 struct ec_collect_item item[0];
1797 * Command for retrieving the next pending MKBP event from the EC device
1799 * The device replies with UNAVAILABLE if there aren't any pending events.
1801 #define EC_CMD_GET_NEXT_EVENT 0x67
1803 enum ec_mkbp_event {
1804 /* Keyboard matrix changed. The event data is the new matrix state. */
1805 EC_MKBP_EVENT_KEY_MATRIX = 0,
1807 /* New host event. The event data is 4 bytes of host event flags. */
1808 EC_MKBP_EVENT_HOST_EVENT = 1,
1810 /* New Sensor FIFO data. The event data is fifo_info structure. */
1811 EC_MKBP_EVENT_SENSOR_FIFO = 2,
1813 /* Number of MKBP events */
1814 EC_MKBP_EVENT_COUNT,
1817 union ec_response_get_next_data {
1818 uint8_t key_matrix[13];
1821 uint32_t host_event;
1824 struct ec_response_get_next_event {
1826 /* Followed by event data if any */
1827 union ec_response_get_next_data data;
1830 /*****************************************************************************/
1831 /* Temperature sensor commands */
1833 /* Read temperature sensor info */
1834 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x70
1836 struct ec_params_temp_sensor_get_info {
1840 struct ec_response_temp_sensor_get_info {
1841 char sensor_name[32];
1842 uint8_t sensor_type;
1845 /*****************************************************************************/
1848 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
1849 * commands accidentally sent to the wrong interface. See the ACPI section
1853 /*****************************************************************************/
1854 /* Host event commands */
1857 * Host event mask params and response structures, shared by all of the host
1858 * event commands below.
1860 struct ec_params_host_event_mask {
1864 struct ec_response_host_event_mask {
1868 /* These all use ec_response_host_event_mask */
1869 #define EC_CMD_HOST_EVENT_GET_B 0x87
1870 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x88
1871 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x89
1872 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x8d
1874 /* These all use ec_params_host_event_mask */
1875 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x8a
1876 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x8b
1877 #define EC_CMD_HOST_EVENT_CLEAR 0x8c
1878 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x8e
1879 #define EC_CMD_HOST_EVENT_CLEAR_B 0x8f
1881 /*****************************************************************************/
1882 /* Switch commands */
1884 /* Enable/disable LCD backlight */
1885 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x90
1887 struct ec_params_switch_enable_backlight {
1891 /* Enable/disable WLAN/Bluetooth */
1892 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91
1893 #define EC_VER_SWITCH_ENABLE_WIRELESS 1
1895 /* Version 0 params; no response */
1896 struct ec_params_switch_enable_wireless_v0 {
1900 /* Version 1 params */
1901 struct ec_params_switch_enable_wireless_v1 {
1902 /* Flags to enable now */
1905 /* Which flags to copy from now_flags */
1909 * Flags to leave enabled in S3, if they're on at the S0->S3
1910 * transition. (Other flags will be disabled by the S0->S3
1913 uint8_t suspend_flags;
1915 /* Which flags to copy from suspend_flags */
1916 uint8_t suspend_mask;
1919 /* Version 1 response */
1920 struct ec_response_switch_enable_wireless_v1 {
1921 /* Flags to enable now */
1924 /* Flags to leave enabled in S3 */
1925 uint8_t suspend_flags;
1928 /*****************************************************************************/
1929 /* GPIO commands. Only available on EC if write protect has been disabled. */
1931 /* Set GPIO output value */
1932 #define EC_CMD_GPIO_SET 0x92
1934 struct ec_params_gpio_set {
1939 /* Get GPIO value */
1940 #define EC_CMD_GPIO_GET 0x93
1942 /* Version 0 of input params and response */
1943 struct ec_params_gpio_get {
1946 struct ec_response_gpio_get {
1950 /* Version 1 of input params and response */
1951 struct ec_params_gpio_get_v1 {
1956 } get_value_by_name;
1963 struct ec_response_gpio_get_v1 {
1967 } get_value_by_name, get_count;
1976 enum gpio_get_subcmd {
1977 EC_GPIO_GET_BY_NAME = 0,
1978 EC_GPIO_GET_COUNT = 1,
1979 EC_GPIO_GET_INFO = 2,
1982 /*****************************************************************************/
1983 /* I2C commands. Only available when flash write protect is unlocked. */
1986 * TODO(crosbug.com/p/23570): These commands are deprecated, and will be
1987 * removed soon. Use EC_CMD_I2C_XFER instead.
1991 #define EC_CMD_I2C_READ 0x94
1993 struct ec_params_i2c_read {
1994 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
1995 uint8_t read_size; /* Either 8 or 16. */
1999 struct ec_response_i2c_read {
2004 #define EC_CMD_I2C_WRITE 0x95
2006 struct ec_params_i2c_write {
2008 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
2009 uint8_t write_size; /* Either 8 or 16. */
2014 /*****************************************************************************/
2015 /* Charge state commands. Only available when flash write protect unlocked. */
2017 /* Force charge state machine to stop charging the battery or force it to
2018 * discharge the battery.
2020 #define EC_CMD_CHARGE_CONTROL 0x96
2021 #define EC_VER_CHARGE_CONTROL 1
2023 enum ec_charge_control_mode {
2024 CHARGE_CONTROL_NORMAL = 0,
2025 CHARGE_CONTROL_IDLE,
2026 CHARGE_CONTROL_DISCHARGE,
2029 struct ec_params_charge_control {
2030 uint32_t mode; /* enum charge_control_mode */
2033 /*****************************************************************************/
2034 /* Console commands. Only available when flash write protect is unlocked. */
2036 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
2037 #define EC_CMD_CONSOLE_SNAPSHOT 0x97
2040 * Read next chunk of data from saved snapshot.
2042 * Response is null-terminated string. Empty string, if there is no more
2045 #define EC_CMD_CONSOLE_READ 0x98
2047 /*****************************************************************************/
2050 * Cut off battery power immediately or after the host has shut down.
2052 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery.
2053 * EC_RES_SUCCESS if the command was successful.
2054 * EC_RES_ERROR if the cut off command failed.
2057 #define EC_CMD_BATTERY_CUT_OFF 0x99
2059 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0)
2061 struct ec_params_battery_cutoff {
2065 /*****************************************************************************/
2066 /* USB port mux control. */
2069 * Switch USB mux or return to automatic switching.
2071 #define EC_CMD_USB_MUX 0x9a
2073 struct ec_params_usb_mux {
2077 /*****************************************************************************/
2078 /* LDOs / FETs control. */
2081 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */
2082 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */
2086 * Switch on/off a LDO.
2088 #define EC_CMD_LDO_SET 0x9b
2090 struct ec_params_ldo_set {
2098 #define EC_CMD_LDO_GET 0x9c
2100 struct ec_params_ldo_get {
2104 struct ec_response_ldo_get {
2108 /*****************************************************************************/
2114 #define EC_CMD_POWER_INFO 0x9d
2116 struct ec_response_power_info {
2117 uint32_t usb_dev_type;
2118 uint16_t voltage_ac;
2119 uint16_t voltage_system;
2120 uint16_t current_system;
2121 uint16_t usb_current_limit;
2124 /*****************************************************************************/
2125 /* I2C passthru command */
2127 #define EC_CMD_I2C_PASSTHRU 0x9e
2129 /* Read data; if not present, message is a write */
2130 #define EC_I2C_FLAG_READ (1 << 15)
2132 /* Mask for address */
2133 #define EC_I2C_ADDR_MASK 0x3ff
2135 #define EC_I2C_STATUS_NAK (1 << 0) /* Transfer was not acknowledged */
2136 #define EC_I2C_STATUS_TIMEOUT (1 << 1) /* Timeout during transfer */
2139 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
2141 struct ec_params_i2c_passthru_msg {
2142 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */
2143 uint16_t len; /* Number of bytes to read or write */
2146 struct ec_params_i2c_passthru {
2147 uint8_t port; /* I2C port number */
2148 uint8_t num_msgs; /* Number of messages */
2149 struct ec_params_i2c_passthru_msg msg[];
2150 /* Data to write for all messages is concatenated here */
2153 struct ec_response_i2c_passthru {
2154 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */
2155 uint8_t num_msgs; /* Number of messages processed */
2156 uint8_t data[]; /* Data read by messages concatenated here */
2159 /*****************************************************************************/
2160 /* Power button hang detect */
2162 #define EC_CMD_HANG_DETECT 0x9f
2164 /* Reasons to start hang detection timer */
2165 /* Power button pressed */
2166 #define EC_HANG_START_ON_POWER_PRESS (1 << 0)
2169 #define EC_HANG_START_ON_LID_CLOSE (1 << 1)
2172 #define EC_HANG_START_ON_LID_OPEN (1 << 2)
2174 /* Start of AP S3->S0 transition (booting or resuming from suspend) */
2175 #define EC_HANG_START_ON_RESUME (1 << 3)
2177 /* Reasons to cancel hang detection */
2179 /* Power button released */
2180 #define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8)
2182 /* Any host command from AP received */
2183 #define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9)
2185 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */
2186 #define EC_HANG_STOP_ON_SUSPEND (1 << 10)
2189 * If this flag is set, all the other fields are ignored, and the hang detect
2190 * timer is started. This provides the AP a way to start the hang timer
2191 * without reconfiguring any of the other hang detect settings. Note that
2192 * you must previously have configured the timeouts.
2194 #define EC_HANG_START_NOW (1 << 30)
2197 * If this flag is set, all the other fields are ignored (including
2198 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer
2199 * without reconfiguring any of the other hang detect settings.
2201 #define EC_HANG_STOP_NOW (1 << 31)
2203 struct ec_params_hang_detect {
2204 /* Flags; see EC_HANG_* */
2207 /* Timeout in msec before generating host event, if enabled */
2208 uint16_t host_event_timeout_msec;
2210 /* Timeout in msec before generating warm reboot, if enabled */
2211 uint16_t warm_reboot_timeout_msec;
2214 /*****************************************************************************/
2215 /* Commands for battery charging */
2218 * This is the single catch-all host command to exchange data regarding the
2219 * charge state machine (v2 and up).
2221 #define EC_CMD_CHARGE_STATE 0xa0
2223 /* Subcommands for this host command */
2224 enum charge_state_command {
2225 CHARGE_STATE_CMD_GET_STATE,
2226 CHARGE_STATE_CMD_GET_PARAM,
2227 CHARGE_STATE_CMD_SET_PARAM,
2228 CHARGE_STATE_NUM_CMDS
2232 * Known param numbers are defined here. Ranges are reserved for board-specific
2233 * params, which are handled by the particular implementations.
2235 enum charge_state_params {
2236 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */
2237 CS_PARAM_CHG_CURRENT, /* charger current limit */
2238 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */
2239 CS_PARAM_CHG_STATUS, /* charger-specific status */
2240 CS_PARAM_CHG_OPTION, /* charger-specific options */
2241 /* How many so far? */
2244 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
2245 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
2246 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
2248 /* Other custom param ranges go here... */
2251 struct ec_params_charge_state {
2252 uint8_t cmd; /* enum charge_state_command */
2259 uint32_t param; /* enum charge_state_param */
2263 uint32_t param; /* param to set */
2264 uint32_t value; /* value to set */
2269 struct ec_response_charge_state {
2275 int chg_input_current;
2276 int batt_state_of_charge;
2283 /* no return values */
2290 * Set maximum battery charging current.
2292 #define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1
2294 struct ec_params_current_limit {
2295 uint32_t limit; /* in mA */
2299 * Set maximum external power current.
2301 #define EC_CMD_EXT_POWER_CURRENT_LIMIT 0xa2
2303 struct ec_params_ext_power_current_limit {
2304 uint32_t limit; /* in mA */
2307 /*****************************************************************************/
2308 /* Smart battery pass-through */
2310 /* Get / Set 16-bit smart battery registers */
2311 #define EC_CMD_SB_READ_WORD 0xb0
2312 #define EC_CMD_SB_WRITE_WORD 0xb1
2314 /* Get / Set string smart battery parameters
2315 * formatted as SMBUS "block".
2317 #define EC_CMD_SB_READ_BLOCK 0xb2
2318 #define EC_CMD_SB_WRITE_BLOCK 0xb3
2320 struct ec_params_sb_rd {
2324 struct ec_response_sb_rd_word {
2328 struct ec_params_sb_wr_word {
2333 struct ec_response_sb_rd_block {
2337 struct ec_params_sb_wr_block {
2342 /*****************************************************************************/
2343 /* Battery vendor parameters
2345 * Get or set vendor-specific parameters in the battery. Implementations may
2346 * differ between boards or batteries. On a set operation, the response
2347 * contains the actual value set, which may be rounded or clipped from the
2351 #define EC_CMD_BATTERY_VENDOR_PARAM 0xb4
2353 enum ec_battery_vendor_param_mode {
2354 BATTERY_VENDOR_PARAM_MODE_GET = 0,
2355 BATTERY_VENDOR_PARAM_MODE_SET,
2358 struct ec_params_battery_vendor_param {
2364 struct ec_response_battery_vendor_param {
2368 /*****************************************************************************/
2369 /* System commands */
2372 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
2373 * necessarily reboot the EC. Rename to "image" or something similar?
2375 #define EC_CMD_REBOOT_EC 0xd2
2378 enum ec_reboot_cmd {
2379 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */
2380 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */
2381 EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */
2382 /* (command 3 was jump to RW-B) */
2383 EC_REBOOT_COLD = 4, /* Cold-reboot */
2384 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */
2385 EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */
2388 /* Flags for ec_params_reboot_ec.reboot_flags */
2389 #define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */
2390 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */
2392 struct ec_params_reboot_ec {
2393 uint8_t cmd; /* enum ec_reboot_cmd */
2394 uint8_t flags; /* See EC_REBOOT_FLAG_* */
2398 * Get information on last EC panic.
2400 * Returns variable-length platform-dependent panic information. See panic.h
2403 #define EC_CMD_GET_PANIC_INFO 0xd3
2405 /*****************************************************************************/
2409 * These are valid ONLY on the ACPI command/data port.
2413 * ACPI Read Embedded Controller
2415 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
2417 * Use the following sequence:
2419 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
2420 * - Wait for EC_LPC_CMDR_PENDING bit to clear
2421 * - Write address to EC_LPC_ADDR_ACPI_DATA
2422 * - Wait for EC_LPC_CMDR_DATA bit to set
2423 * - Read value from EC_LPC_ADDR_ACPI_DATA
2425 #define EC_CMD_ACPI_READ 0x80
2428 * ACPI Write Embedded Controller
2430 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
2432 * Use the following sequence:
2434 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
2435 * - Wait for EC_LPC_CMDR_PENDING bit to clear
2436 * - Write address to EC_LPC_ADDR_ACPI_DATA
2437 * - Wait for EC_LPC_CMDR_PENDING bit to clear
2438 * - Write value to EC_LPC_ADDR_ACPI_DATA
2440 #define EC_CMD_ACPI_WRITE 0x81
2443 * ACPI Query Embedded Controller
2445 * This clears the lowest-order bit in the currently pending host events, and
2446 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
2447 * event 0x80000000 = 32), or 0 if no event was pending.
2449 #define EC_CMD_ACPI_QUERY_EVENT 0x84
2451 /* Valid addresses in ACPI memory space, for read/write commands */
2453 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
2454 #define EC_ACPI_MEM_VERSION 0x00
2456 * Test location; writing value here updates test compliment byte to (0xff -
2459 #define EC_ACPI_MEM_TEST 0x01
2460 /* Test compliment; writes here are ignored. */
2461 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
2463 /* Keyboard backlight brightness percent (0 - 100) */
2464 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
2465 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
2466 #define EC_ACPI_MEM_FAN_DUTY 0x04
2469 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
2470 * independent thresholds attached to them. The current value of the ID
2471 * register determines which sensor is affected by the THRESHOLD and COMMIT
2472 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
2473 * as the memory-mapped sensors. The COMMIT register applies those settings.
2475 * The spec does not mandate any way to read back the threshold settings
2476 * themselves, but when a threshold is crossed the AP needs a way to determine
2477 * which sensor(s) are responsible. Each reading of the ID register clears and
2478 * returns one sensor ID that has crossed one of its threshold (in either
2479 * direction) since the last read. A value of 0xFF means "no new thresholds
2480 * have tripped". Setting or enabling the thresholds for a sensor will clear
2481 * the unread event count for that sensor.
2483 #define EC_ACPI_MEM_TEMP_ID 0x05
2484 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
2485 #define EC_ACPI_MEM_TEMP_COMMIT 0x07
2487 * Here are the bits for the COMMIT register:
2488 * bit 0 selects the threshold index for the chosen sensor (0/1)
2489 * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
2490 * Each write to the commit register affects one threshold.
2492 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
2493 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
2497 * Set the thresholds for sensor 2 to 50 C and 60 C:
2498 * write 2 to [0x05] -- select temp sensor 2
2499 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
2500 * write 0x2 to [0x07] -- enable threshold 0 with this value
2501 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
2502 * write 0x3 to [0x07] -- enable threshold 1 with this value
2504 * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
2505 * write 2 to [0x05] -- select temp sensor 2
2506 * write 0x1 to [0x07] -- disable threshold 1
2509 /* DPTF battery charging current limit */
2510 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08
2512 /* Charging limit is specified in 64 mA steps */
2513 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
2514 /* Value to disable DPTF battery charging limit */
2515 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
2517 /* Current version of ACPI memory address space */
2518 #define EC_ACPI_MEM_VERSION_CURRENT 1
2521 /*****************************************************************************/
2525 * These do not follow the normal rules for commands. See each command for
2532 * This command will work even when the EC LPC interface is busy, because the
2533 * reboot command is processed at interrupt level. Note that when the EC
2534 * reboots, the host will reboot too, so there is no response to this command.
2536 * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
2538 #define EC_CMD_REBOOT 0xd1 /* Think "die" */
2541 * Resend last response (not supported on LPC).
2543 * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
2544 * there was no previous command, or the previous command's response was too
2547 #define EC_CMD_RESEND_RESPONSE 0xdb
2550 * This header byte on a command indicate version 0. Any header byte less
2551 * than this means that we are talking to an old EC which doesn't support
2552 * versioning. In that case, we assume version 0.
2554 * Header bytes greater than this indicate a later version. For example,
2555 * EC_CMD_VERSION0 + 1 means we are using version 1.
2557 * The old EC interface must not use commands 0xdc or higher.
2559 #define EC_CMD_VERSION0 0xdc
2561 #endif /* !__ACPI__ */
2563 /*****************************************************************************/
2567 * These commands are for PD MCU communication.
2570 /* EC to PD MCU exchange status command */
2571 #define EC_CMD_PD_EXCHANGE_STATUS 0x100
2573 /* Status of EC being sent to PD */
2574 struct ec_params_pd_status {
2575 int8_t batt_soc; /* battery state of charge */
2578 /* Status of PD being sent back to EC */
2579 struct ec_response_pd_status {
2580 int8_t status; /* PD MCU status */
2581 uint32_t curr_lim_ma; /* input current limit */
2584 /* Set USB type-C port role and muxes */
2585 #define EC_CMD_USB_PD_CONTROL 0x101
2587 enum usb_pd_control_role {
2588 USB_PD_CTRL_ROLE_NO_CHANGE = 0,
2589 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */
2590 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
2591 USB_PD_CTRL_ROLE_FORCE_SINK = 3,
2592 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
2595 enum usb_pd_control_mux {
2596 USB_PD_CTRL_MUX_NO_CHANGE = 0,
2597 USB_PD_CTRL_MUX_NONE = 1,
2598 USB_PD_CTRL_MUX_USB = 2,
2599 USB_PD_CTRL_MUX_DP = 3,
2600 USB_PD_CTRL_MUX_DOCK = 4,
2601 USB_PD_CTRL_MUX_AUTO = 5,
2604 struct ec_params_usb_pd_control {
2610 /*****************************************************************************/
2614 * Some platforms have sub-processors chained to each other. For example.
2616 * AP <--> EC <--> PD MCU
2618 * The top 2 bits of the command number are used to indicate which device the
2619 * command is intended for. Device 0 is always the device receiving the
2620 * command; other device mapping is board-specific.
2622 * When a device receives a command to be passed to a sub-processor, it passes
2623 * it on with the device number set back to 0. This allows the sub-processor
2624 * to remain blissfully unaware of whether the command originated on the next
2625 * device up the chain, or was passed through from the AP.
2627 * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
2628 * AP sends command 0x4002 to the EC
2629 * EC sends command 0x0002 to the PD MCU
2630 * EC forwards PD MCU response back to the AP
2633 /* Offset and max command number for sub-device n */
2634 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
2635 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
2637 /*****************************************************************************/
2639 * Deprecated constants. These constants have been renamed for clarity. The
2640 * meaning and size has not changed. Programs that use the old names should
2641 * switch to the new names soon, as the old names may not be carried forward
2644 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
2645 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
2646 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
2648 #endif /* __CROS_EC_COMMANDS_H */