2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
18 #include <linux/device.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/slab.h>
21 #include <linux/kthread.h>
22 #include <linux/completion.h>
23 #include <linux/scatterlist.h>
28 struct spi_flash_read_message;
31 * INTERFACES between SPI master-side drivers and SPI infrastructure.
32 * (There's no SPI slave support for Linux yet...)
34 extern struct bus_type spi_bus_type;
37 * struct spi_statistics - statistics for spi transfers
38 * @lock: lock protecting this structure
40 * @messages: number of spi-messages handled
41 * @transfers: number of spi_transfers handled
42 * @errors: number of errors during spi_transfer
43 * @timedout: number of timeouts during spi_transfer
45 * @spi_sync: number of times spi_sync is used
46 * @spi_sync_immediate:
47 * number of times spi_sync is executed immediately
48 * in calling context without queuing and scheduling
49 * @spi_async: number of times spi_async is used
51 * @bytes: number of bytes transferred to/from device
52 * @bytes_tx: number of bytes sent to device
53 * @bytes_rx: number of bytes received from device
55 * @transfer_bytes_histo:
56 * transfer bytes histogramm
58 * @transfers_split_maxsize:
59 * number of transfers that have been split because of
62 struct spi_statistics {
63 spinlock_t lock; /* lock for the whole structure */
65 unsigned long messages;
66 unsigned long transfers;
68 unsigned long timedout;
70 unsigned long spi_sync;
71 unsigned long spi_sync_immediate;
72 unsigned long spi_async;
74 unsigned long long bytes;
75 unsigned long long bytes_rx;
76 unsigned long long bytes_tx;
78 #define SPI_STATISTICS_HISTO_SIZE 17
79 unsigned long transfer_bytes_histo[SPI_STATISTICS_HISTO_SIZE];
81 unsigned long transfers_split_maxsize;
84 void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
85 struct spi_transfer *xfer,
86 struct spi_master *master);
88 #define SPI_STATISTICS_ADD_TO_FIELD(stats, field, count) \
90 unsigned long flags; \
91 spin_lock_irqsave(&(stats)->lock, flags); \
92 (stats)->field += count; \
93 spin_unlock_irqrestore(&(stats)->lock, flags); \
96 #define SPI_STATISTICS_INCREMENT_FIELD(stats, field) \
97 SPI_STATISTICS_ADD_TO_FIELD(stats, field, 1)
100 * struct spi_device - Master side proxy for an SPI slave device
101 * @dev: Driver model representation of the device.
102 * @master: SPI controller used with the device.
103 * @max_speed_hz: Maximum clock rate to be used with this chip
104 * (on this board); may be changed by the device's driver.
105 * The spi_transfer.speed_hz can override this for each transfer.
106 * @chip_select: Chipselect, distinguishing chips handled by @master.
107 * @mode: The spi mode defines how data is clocked out and in.
108 * This may be changed by the device's driver.
109 * The "active low" default for chipselect mode can be overridden
110 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
111 * each word in a transfer (by specifying SPI_LSB_FIRST).
112 * @bits_per_word: Data transfers involve one or more words; word sizes
113 * like eight or 12 bits are common. In-memory wordsizes are
114 * powers of two bytes (e.g. 20 bit samples use 32 bits).
115 * This may be changed by the device's driver, or left at the
116 * default (0) indicating protocol words are eight bit bytes.
117 * The spi_transfer.bits_per_word can override this for each transfer.
118 * @irq: Negative, or the number passed to request_irq() to receive
119 * interrupts from this device.
120 * @controller_state: Controller's runtime state
121 * @controller_data: Board-specific definitions for controller, such as
122 * FIFO initialization parameters; from board_info.controller_data
123 * @modalias: Name of the driver to use with this device, or an alias
124 * for that name. This appears in the sysfs "modalias" attribute
125 * for driver coldplugging, and in uevents used for hotplugging
126 * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when
127 * when not using a GPIO line)
129 * @statistics: statistics for the spi_device
131 * A @spi_device is used to interchange data between an SPI slave
132 * (usually a discrete chip) and CPU memory.
134 * In @dev, the platform_data is used to hold information about this
135 * device that's meaningful to the device's protocol driver, but not
136 * to its controller. One example might be an identifier for a chip
137 * variant with slightly different functionality; another might be
138 * information about how this particular board wires the chip's pins.
142 struct spi_master *master;
147 #define SPI_CPHA 0x01 /* clock phase */
148 #define SPI_CPOL 0x02 /* clock polarity */
149 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
150 #define SPI_MODE_1 (0|SPI_CPHA)
151 #define SPI_MODE_2 (SPI_CPOL|0)
152 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
153 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
154 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
155 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
156 #define SPI_LOOP 0x20 /* loopback mode */
157 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
158 #define SPI_READY 0x80 /* slave pulls low to pause */
159 #define SPI_TX_DUAL 0x100 /* transmit with 2 wires */
160 #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
161 #define SPI_RX_DUAL 0x400 /* receive with 2 wires */
162 #define SPI_RX_QUAD 0x800 /* receive with 4 wires */
164 void *controller_state;
165 void *controller_data;
166 char modalias[SPI_NAME_SIZE];
167 int cs_gpio; /* chip select gpio */
170 struct spi_statistics statistics;
173 * likely need more hooks for more protocol options affecting how
174 * the controller talks to each chip, like:
175 * - memory packing (12 bit samples into low bits, others zeroed)
177 * - drop chipselect after each word
178 * - chipselect delays
183 static inline struct spi_device *to_spi_device(struct device *dev)
185 return dev ? container_of(dev, struct spi_device, dev) : NULL;
188 /* most drivers won't need to care about device refcounting */
189 static inline struct spi_device *spi_dev_get(struct spi_device *spi)
191 return (spi && get_device(&spi->dev)) ? spi : NULL;
194 static inline void spi_dev_put(struct spi_device *spi)
197 put_device(&spi->dev);
200 /* ctldata is for the bus_master driver's runtime state */
201 static inline void *spi_get_ctldata(struct spi_device *spi)
203 return spi->controller_state;
206 static inline void spi_set_ctldata(struct spi_device *spi, void *state)
208 spi->controller_state = state;
211 /* device driver data */
213 static inline void spi_set_drvdata(struct spi_device *spi, void *data)
215 dev_set_drvdata(&spi->dev, data);
218 static inline void *spi_get_drvdata(struct spi_device *spi)
220 return dev_get_drvdata(&spi->dev);
227 * struct spi_driver - Host side "protocol" driver
228 * @id_table: List of SPI devices supported by this driver
229 * @probe: Binds this driver to the spi device. Drivers can verify
230 * that the device is actually present, and may need to configure
231 * characteristics (such as bits_per_word) which weren't needed for
232 * the initial configuration done during system setup.
233 * @remove: Unbinds this driver from the spi device
234 * @shutdown: Standard shutdown callback used during system state
235 * transitions such as powerdown/halt and kexec
236 * @driver: SPI device drivers should initialize the name and owner
237 * field of this structure.
239 * This represents the kind of device driver that uses SPI messages to
240 * interact with the hardware at the other end of a SPI link. It's called
241 * a "protocol" driver because it works through messages rather than talking
242 * directly to SPI hardware (which is what the underlying SPI controller
243 * driver does to pass those messages). These protocols are defined in the
244 * specification for the device(s) supported by the driver.
246 * As a rule, those device protocols represent the lowest level interface
247 * supported by a driver, and it will support upper level interfaces too.
248 * Examples of such upper levels include frameworks like MTD, networking,
249 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
252 const struct spi_device_id *id_table;
253 int (*probe)(struct spi_device *spi);
254 int (*remove)(struct spi_device *spi);
255 void (*shutdown)(struct spi_device *spi);
256 struct device_driver driver;
259 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
261 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
264 extern int __spi_register_driver(struct module *owner, struct spi_driver *sdrv);
267 * spi_unregister_driver - reverse effect of spi_register_driver
268 * @sdrv: the driver to unregister
271 static inline void spi_unregister_driver(struct spi_driver *sdrv)
274 driver_unregister(&sdrv->driver);
277 /* use a define to avoid include chaining to get THIS_MODULE */
278 #define spi_register_driver(driver) \
279 __spi_register_driver(THIS_MODULE, driver)
282 * module_spi_driver() - Helper macro for registering a SPI driver
283 * @__spi_driver: spi_driver struct
285 * Helper macro for SPI drivers which do not do anything special in module
286 * init/exit. This eliminates a lot of boilerplate. Each module may only
287 * use this macro once, and calling it replaces module_init() and module_exit()
289 #define module_spi_driver(__spi_driver) \
290 module_driver(__spi_driver, spi_register_driver, \
291 spi_unregister_driver)
294 * struct spi_master - interface to SPI master controller
295 * @dev: device interface to this driver
296 * @list: link with the global spi_master list
297 * @bus_num: board-specific (and often SOC-specific) identifier for a
298 * given SPI controller.
299 * @num_chipselect: chipselects are used to distinguish individual
300 * SPI slaves, and are numbered from zero to num_chipselects.
301 * each slave has a chipselect signal, but it's common that not
302 * every chipselect is connected to a slave.
303 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
304 * @mode_bits: flags understood by this controller driver
305 * @bits_per_word_mask: A mask indicating which values of bits_per_word are
306 * supported by the driver. Bit n indicates that a bits_per_word n+1 is
307 * supported. If set, the SPI core will reject any transfer with an
308 * unsupported bits_per_word. If not set, this value is simply ignored,
309 * and it's up to the individual driver to perform any validation.
310 * @min_speed_hz: Lowest supported transfer speed
311 * @max_speed_hz: Highest supported transfer speed
312 * @flags: other constraints relevant to this driver
313 * @max_transfer_size: function that returns the max transfer size for
314 * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
315 * @max_message_size: function that returns the max message size for
316 * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
317 * @io_mutex: mutex for physical bus access
318 * @bus_lock_spinlock: spinlock for SPI bus locking
319 * @bus_lock_mutex: mutex for exclusion of multiple callers
320 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
321 * @setup: updates the device mode and clocking records used by a
322 * device's SPI controller; protocol code may call this. This
323 * must fail if an unrecognized or unsupported mode is requested.
324 * It's always safe to call this unless transfers are pending on
325 * the device whose settings are being modified.
326 * @transfer: adds a message to the controller's transfer queue.
327 * @cleanup: frees controller-specific state
328 * @can_dma: determine whether this master supports DMA
329 * @queued: whether this master is providing an internal message queue
330 * @kworker: thread struct for message pump
331 * @kworker_task: pointer to task for message pump kworker thread
332 * @pump_messages: work struct for scheduling work to the message pump
333 * @queue_lock: spinlock to syncronise access to message queue
334 * @queue: message queue
335 * @idling: the device is entering idle state
336 * @cur_msg: the currently in-flight message
337 * @cur_msg_prepared: spi_prepare_message was called for the currently
339 * @cur_msg_mapped: message has been mapped for DMA
340 * @xfer_completion: used by core transfer_one_message()
341 * @busy: message pump is busy
342 * @running: message pump is running
343 * @rt: whether this queue is set to run as a realtime task
344 * @auto_runtime_pm: the core should ensure a runtime PM reference is held
345 * while the hardware is prepared, using the parent
346 * device for the spidev
347 * @max_dma_len: Maximum length of a DMA transfer for the device.
348 * @prepare_transfer_hardware: a message will soon arrive from the queue
349 * so the subsystem requests the driver to prepare the transfer hardware
350 * by issuing this call
351 * @transfer_one_message: the subsystem calls the driver to transfer a single
352 * message while queuing transfers that arrive in the meantime. When the
353 * driver is finished with this message, it must call
354 * spi_finalize_current_message() so the subsystem can issue the next
356 * @unprepare_transfer_hardware: there are currently no more messages on the
357 * queue so the subsystem notifies the driver that it may relax the
358 * hardware by issuing this call
359 * @set_cs: set the logic level of the chip select line. May be called
360 * from interrupt context.
361 * @prepare_message: set up the controller to transfer a single message,
362 * for example doing DMA mapping. Called from threaded
364 * @transfer_one: transfer a single spi_transfer.
365 * - return 0 if the transfer is finished,
366 * - return 1 if the transfer is still in progress. When
367 * the driver is finished with this transfer it must
368 * call spi_finalize_current_transfer() so the subsystem
369 * can issue the next transfer. Note: transfer_one and
370 * transfer_one_message are mutually exclusive; when both
371 * are set, the generic subsystem does not call your
372 * transfer_one callback.
373 * @handle_err: the subsystem calls the driver to handle an error that occurs
374 * in the generic implementation of transfer_one_message().
375 * @unprepare_message: undo any work done by prepare_message().
376 * @spi_flash_read: to support spi-controller hardwares that provide
377 * accelerated interface to read from flash devices.
378 * @flash_read_supported: spi device supports flash read
379 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
380 * number. Any individual value may be -ENOENT for CS lines that
381 * are not GPIOs (driven by the SPI controller itself).
382 * @statistics: statistics for the spi_master
383 * @dma_tx: DMA transmit channel
384 * @dma_rx: DMA receive channel
385 * @dummy_rx: dummy receive buffer for full-duplex devices
386 * @dummy_tx: dummy transmit buffer for full-duplex devices
387 * @fw_translate_cs: If the boot firmware uses different numbering scheme
388 * what Linux expects, this optional hook can be used to translate
391 * Each SPI master controller can communicate with one or more @spi_device
392 * children. These make a small bus, sharing MOSI, MISO and SCK signals
393 * but not chip select signals. Each device may be configured to use a
394 * different clock rate, since those shared signals are ignored unless
395 * the chip is selected.
397 * The driver for an SPI controller manages access to those devices through
398 * a queue of spi_message transactions, copying data between CPU memory and
399 * an SPI slave device. For each such message it queues, it calls the
400 * message's completion function when the transaction completes.
405 struct list_head list;
407 /* other than negative (== assign one dynamically), bus_num is fully
408 * board-specific. usually that simplifies to being SOC-specific.
409 * example: one SOC has three SPI controllers, numbered 0..2,
410 * and one board's schematics might show it using SPI-2. software
411 * would normally use bus_num=2 for that controller.
415 /* chipselects will be integral to many controllers; some others
416 * might use board-specific GPIOs.
420 /* some SPI controllers pose alignment requirements on DMAable
421 * buffers; let protocol drivers know about these requirements.
425 /* spi_device.mode flags understood by this controller driver */
428 /* bitmask of supported bits_per_word for transfers */
429 u32 bits_per_word_mask;
430 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
431 #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
432 #define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
434 /* limits on transfer speed */
438 /* other constraints relevant to this driver */
440 #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
441 #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */
442 #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
443 #define SPI_MASTER_MUST_RX BIT(3) /* requires rx */
444 #define SPI_MASTER_MUST_TX BIT(4) /* requires tx */
445 #define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
448 * on some hardware transfer / message size may be constrained
449 * the limit may depend on device transfer settings
451 size_t (*max_transfer_size)(struct spi_device *spi);
452 size_t (*max_message_size)(struct spi_device *spi);
455 struct mutex io_mutex;
457 /* lock and mutex for SPI bus locking */
458 spinlock_t bus_lock_spinlock;
459 struct mutex bus_lock_mutex;
461 /* flag indicating that the SPI bus is locked for exclusive use */
464 /* Setup mode and clock, etc (spi driver may call many times).
466 * IMPORTANT: this may be called when transfers to another
467 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
468 * which could break those transfers.
470 int (*setup)(struct spi_device *spi);
472 /* bidirectional bulk transfers
474 * + The transfer() method may not sleep; its main role is
475 * just to add the message to the queue.
476 * + For now there's no remove-from-queue operation, or
477 * any other request management
478 * + To a given spi_device, message queueing is pure fifo
480 * + The master's main job is to process its message queue,
481 * selecting a chip then transferring data
482 * + If there are multiple spi_device children, the i/o queue
483 * arbitration algorithm is unspecified (round robin, fifo,
484 * priority, reservations, preemption, etc)
486 * + Chipselect stays active during the entire message
487 * (unless modified by spi_transfer.cs_change != 0).
488 * + The message transfers use clock and SPI mode parameters
489 * previously established by setup() for this device
491 int (*transfer)(struct spi_device *spi,
492 struct spi_message *mesg);
494 /* called on release() to free memory provided by spi_master */
495 void (*cleanup)(struct spi_device *spi);
498 * Used to enable core support for DMA handling, if can_dma()
499 * exists and returns true then the transfer will be mapped
500 * prior to transfer_one() being called. The driver should
501 * not modify or store xfer and dma_tx and dma_rx must be set
502 * while the device is prepared.
504 bool (*can_dma)(struct spi_master *master,
505 struct spi_device *spi,
506 struct spi_transfer *xfer);
509 * These hooks are for drivers that want to use the generic
510 * master transfer queueing mechanism. If these are used, the
511 * transfer() function above must NOT be specified by the driver.
512 * Over time we expect SPI drivers to be phased over to this API.
515 struct kthread_worker kworker;
516 struct task_struct *kworker_task;
517 struct kthread_work pump_messages;
518 spinlock_t queue_lock;
519 struct list_head queue;
520 struct spi_message *cur_msg;
525 bool auto_runtime_pm;
526 bool cur_msg_prepared;
528 struct completion xfer_completion;
531 int (*prepare_transfer_hardware)(struct spi_master *master);
532 int (*transfer_one_message)(struct spi_master *master,
533 struct spi_message *mesg);
534 int (*unprepare_transfer_hardware)(struct spi_master *master);
535 int (*prepare_message)(struct spi_master *master,
536 struct spi_message *message);
537 int (*unprepare_message)(struct spi_master *master,
538 struct spi_message *message);
539 int (*spi_flash_read)(struct spi_device *spi,
540 struct spi_flash_read_message *msg);
541 bool (*flash_read_supported)(struct spi_device *spi);
544 * These hooks are for drivers that use a generic implementation
545 * of transfer_one_message() provied by the core.
547 void (*set_cs)(struct spi_device *spi, bool enable);
548 int (*transfer_one)(struct spi_master *master, struct spi_device *spi,
549 struct spi_transfer *transfer);
550 void (*handle_err)(struct spi_master *master,
551 struct spi_message *message);
553 /* gpio chip select */
557 struct spi_statistics statistics;
559 /* DMA channels for use with core dmaengine helpers */
560 struct dma_chan *dma_tx;
561 struct dma_chan *dma_rx;
563 /* dummy data for full duplex devices */
567 int (*fw_translate_cs)(struct spi_master *master, unsigned cs);
570 static inline void *spi_master_get_devdata(struct spi_master *master)
572 return dev_get_drvdata(&master->dev);
575 static inline void spi_master_set_devdata(struct spi_master *master, void *data)
577 dev_set_drvdata(&master->dev, data);
580 static inline struct spi_master *spi_master_get(struct spi_master *master)
582 if (!master || !get_device(&master->dev))
587 static inline void spi_master_put(struct spi_master *master)
590 put_device(&master->dev);
593 /* PM calls that need to be issued by the driver */
594 extern int spi_master_suspend(struct spi_master *master);
595 extern int spi_master_resume(struct spi_master *master);
597 /* Calls the driver make to interact with the message queue */
598 extern struct spi_message *spi_get_next_queued_message(struct spi_master *master);
599 extern void spi_finalize_current_message(struct spi_master *master);
600 extern void spi_finalize_current_transfer(struct spi_master *master);
602 /* the spi driver core manages memory for the spi_master classdev */
603 extern struct spi_master *
604 spi_alloc_master(struct device *host, unsigned size);
606 extern int spi_register_master(struct spi_master *master);
607 extern int devm_spi_register_master(struct device *dev,
608 struct spi_master *master);
609 extern void spi_unregister_master(struct spi_master *master);
611 extern struct spi_master *spi_busnum_to_master(u16 busnum);
614 * SPI resource management while processing a SPI message
617 typedef void (*spi_res_release_t)(struct spi_master *master,
618 struct spi_message *msg,
622 * struct spi_res - spi resource management structure
624 * @release: release code called prior to freeing this resource
625 * @data: extra data allocated for the specific use-case
627 * this is based on ideas from devres, but focused on life-cycle
628 * management during spi_message processing
631 struct list_head entry;
632 spi_res_release_t release;
633 unsigned long long data[]; /* guarantee ull alignment */
636 extern void *spi_res_alloc(struct spi_device *spi,
637 spi_res_release_t release,
638 size_t size, gfp_t gfp);
639 extern void spi_res_add(struct spi_message *message, void *res);
640 extern void spi_res_free(void *res);
642 extern void spi_res_release(struct spi_master *master,
643 struct spi_message *message);
645 /*---------------------------------------------------------------------------*/
648 * I/O INTERFACE between SPI controller and protocol drivers
650 * Protocol drivers use a queue of spi_messages, each transferring data
651 * between the controller and memory buffers.
653 * The spi_messages themselves consist of a series of read+write transfer
654 * segments. Those segments always read the same number of bits as they
655 * write; but one or the other is easily ignored by passing a null buffer
656 * pointer. (This is unlike most types of I/O API, because SPI hardware
659 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
660 * up to the protocol driver, which guarantees the integrity of both (as
661 * well as the data buffers) for as long as the message is queued.
665 * struct spi_transfer - a read/write buffer pair
666 * @tx_buf: data to be written (dma-safe memory), or NULL
667 * @rx_buf: data to be read (dma-safe memory), or NULL
668 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
669 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
670 * @tx_nbits: number of bits used for writing. If 0 the default
671 * (SPI_NBITS_SINGLE) is used.
672 * @rx_nbits: number of bits used for reading. If 0 the default
673 * (SPI_NBITS_SINGLE) is used.
674 * @len: size of rx and tx buffers (in bytes)
675 * @speed_hz: Select a speed other than the device default for this
676 * transfer. If 0 the default (from @spi_device) is used.
677 * @bits_per_word: select a bits_per_word other than the device default
678 * for this transfer. If 0 the default (from @spi_device) is used.
679 * @cs_change: affects chipselect after this transfer completes
680 * @delay_usecs: microseconds to delay after this transfer before
681 * (optionally) changing the chipselect status, then starting
682 * the next transfer or completing this @spi_message.
683 * @transfer_list: transfers are sequenced through @spi_message.transfers
684 * @tx_sg: Scatterlist for transmit, currently not for client use
685 * @rx_sg: Scatterlist for receive, currently not for client use
687 * SPI transfers always write the same number of bytes as they read.
688 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
689 * In some cases, they may also want to provide DMA addresses for
690 * the data being transferred; that may reduce overhead, when the
691 * underlying driver uses dma.
693 * If the transmit buffer is null, zeroes will be shifted out
694 * while filling @rx_buf. If the receive buffer is null, the data
695 * shifted in will be discarded. Only "len" bytes shift out (or in).
696 * It's an error to try to shift out a partial word. (For example, by
697 * shifting out three bytes with word size of sixteen or twenty bits;
698 * the former uses two bytes per word, the latter uses four bytes.)
700 * In-memory data values are always in native CPU byte order, translated
701 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
702 * for example when bits_per_word is sixteen, buffers are 2N bytes long
703 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
705 * When the word size of the SPI transfer is not a power-of-two multiple
706 * of eight bits, those in-memory words include extra bits. In-memory
707 * words are always seen by protocol drivers as right-justified, so the
708 * undefined (rx) or unused (tx) bits are always the most significant bits.
710 * All SPI transfers start with the relevant chipselect active. Normally
711 * it stays selected until after the last transfer in a message. Drivers
712 * can affect the chipselect signal using cs_change.
714 * (i) If the transfer isn't the last one in the message, this flag is
715 * used to make the chipselect briefly go inactive in the middle of the
716 * message. Toggling chipselect in this way may be needed to terminate
717 * a chip command, letting a single spi_message perform all of group of
718 * chip transactions together.
720 * (ii) When the transfer is the last one in the message, the chip may
721 * stay selected until the next transfer. On multi-device SPI busses
722 * with nothing blocking messages going to other devices, this is just
723 * a performance hint; starting a message to another device deselects
724 * this one. But in other cases, this can be used to ensure correctness.
725 * Some devices need protocol transactions to be built from a series of
726 * spi_message submissions, where the content of one message is determined
727 * by the results of previous messages and where the whole transaction
728 * ends when the chipselect goes intactive.
730 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
731 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
732 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
733 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
735 * The code that submits an spi_message (and its spi_transfers)
736 * to the lower layers is responsible for managing its memory.
737 * Zero-initialize every field you don't set up explicitly, to
738 * insulate against future API updates. After you submit a message
739 * and its transfers, ignore them until its completion callback.
741 struct spi_transfer {
742 /* it's ok if tx_buf == rx_buf (right?)
743 * for MicroWire, one buffer must be null
744 * buffers must work with dma_*map_single() calls, unless
745 * spi_message.is_dma_mapped reports a pre-existing mapping
753 struct sg_table tx_sg;
754 struct sg_table rx_sg;
756 unsigned cs_change:1;
759 #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
760 #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
761 #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
766 struct list_head transfer_list;
770 * struct spi_message - one multi-segment SPI transaction
771 * @transfers: list of transfer segments in this transaction
772 * @spi: SPI device to which the transaction is queued
773 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
774 * addresses for each transfer buffer
775 * @complete: called to report transaction completions
776 * @context: the argument to complete() when it's called
777 * @frame_length: the total number of bytes in the message
778 * @actual_length: the total number of bytes that were transferred in all
779 * successful segments
780 * @status: zero for success, else negative errno
781 * @queue: for use by whichever driver currently owns the message
782 * @state: for use by whichever driver currently owns the message
783 * @resources: for resource management when the spi message is processed
785 * A @spi_message is used to execute an atomic sequence of data transfers,
786 * each represented by a struct spi_transfer. The sequence is "atomic"
787 * in the sense that no other spi_message may use that SPI bus until that
788 * sequence completes. On some systems, many such sequences can execute as
789 * as single programmed DMA transfer. On all systems, these messages are
790 * queued, and might complete after transactions to other devices. Messages
791 * sent to a given spi_device are always executed in FIFO order.
793 * The code that submits an spi_message (and its spi_transfers)
794 * to the lower layers is responsible for managing its memory.
795 * Zero-initialize every field you don't set up explicitly, to
796 * insulate against future API updates. After you submit a message
797 * and its transfers, ignore them until its completion callback.
800 struct list_head transfers;
802 struct spi_device *spi;
804 unsigned is_dma_mapped:1;
806 /* REVISIT: we might want a flag affecting the behavior of the
807 * last transfer ... allowing things like "read 16 bit length L"
808 * immediately followed by "read L bytes". Basically imposing
809 * a specific message scheduling algorithm.
811 * Some controller drivers (message-at-a-time queue processing)
812 * could provide that as their default scheduling algorithm. But
813 * others (with multi-message pipelines) could need a flag to
814 * tell them about such special cases.
817 /* completion is reported through a callback */
818 void (*complete)(void *context);
820 unsigned frame_length;
821 unsigned actual_length;
824 /* for optional use by whatever driver currently owns the
825 * spi_message ... between calls to spi_async and then later
826 * complete(), that's the spi_master controller driver.
828 struct list_head queue;
831 /* list of spi_res reources when the spi message is processed */
832 struct list_head resources;
835 static inline void spi_message_init_no_memset(struct spi_message *m)
837 INIT_LIST_HEAD(&m->transfers);
838 INIT_LIST_HEAD(&m->resources);
841 static inline void spi_message_init(struct spi_message *m)
843 memset(m, 0, sizeof *m);
844 spi_message_init_no_memset(m);
848 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
850 list_add_tail(&t->transfer_list, &m->transfers);
854 spi_transfer_del(struct spi_transfer *t)
856 list_del(&t->transfer_list);
860 * spi_message_init_with_transfers - Initialize spi_message and append transfers
861 * @m: spi_message to be initialized
862 * @xfers: An array of spi transfers
863 * @num_xfers: Number of items in the xfer array
865 * This function initializes the given spi_message and adds each spi_transfer in
866 * the given array to the message.
869 spi_message_init_with_transfers(struct spi_message *m,
870 struct spi_transfer *xfers, unsigned int num_xfers)
875 for (i = 0; i < num_xfers; ++i)
876 spi_message_add_tail(&xfers[i], m);
879 /* It's fine to embed message and transaction structures in other data
880 * structures so long as you don't free them while they're in use.
883 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
885 struct spi_message *m;
887 m = kzalloc(sizeof(struct spi_message)
888 + ntrans * sizeof(struct spi_transfer),
892 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
894 INIT_LIST_HEAD(&m->transfers);
895 for (i = 0; i < ntrans; i++, t++)
896 spi_message_add_tail(t, m);
901 static inline void spi_message_free(struct spi_message *m)
906 extern int spi_setup(struct spi_device *spi);
907 extern int spi_async(struct spi_device *spi, struct spi_message *message);
908 extern int spi_async_locked(struct spi_device *spi,
909 struct spi_message *message);
912 spi_max_message_size(struct spi_device *spi)
914 struct spi_master *master = spi->master;
915 if (!master->max_message_size)
917 return master->max_message_size(spi);
921 spi_max_transfer_size(struct spi_device *spi)
923 struct spi_master *master = spi->master;
924 size_t tr_max = SIZE_MAX;
925 size_t msg_max = spi_max_message_size(spi);
927 if (master->max_transfer_size)
928 tr_max = master->max_transfer_size(spi);
930 /* transfer size limit must not be greater than messsage size limit */
931 return min(tr_max, msg_max);
934 /*---------------------------------------------------------------------------*/
936 /* SPI transfer replacement methods which make use of spi_res */
938 struct spi_replaced_transfers;
939 typedef void (*spi_replaced_release_t)(struct spi_master *master,
940 struct spi_message *msg,
941 struct spi_replaced_transfers *res);
943 * struct spi_replaced_transfers - structure describing the spi_transfer
944 * replacements that have occurred
945 * so that they can get reverted
946 * @release: some extra release code to get executed prior to
947 * relasing this structure
948 * @extradata: pointer to some extra data if requested or NULL
949 * @replaced_transfers: transfers that have been replaced and which need
951 * @replaced_after: the transfer after which the @replaced_transfers
952 * are to get re-inserted
953 * @inserted: number of transfers inserted
954 * @inserted_transfers: array of spi_transfers of array-size @inserted,
955 * that have been replacing replaced_transfers
957 * note: that @extradata will point to @inserted_transfers[@inserted]
958 * if some extra allocation is requested, so alignment will be the same
959 * as for spi_transfers
961 struct spi_replaced_transfers {
962 spi_replaced_release_t release;
964 struct list_head replaced_transfers;
965 struct list_head *replaced_after;
967 struct spi_transfer inserted_transfers[];
970 extern struct spi_replaced_transfers *spi_replace_transfers(
971 struct spi_message *msg,
972 struct spi_transfer *xfer_first,
975 spi_replaced_release_t release,
976 size_t extradatasize,
979 /*---------------------------------------------------------------------------*/
981 /* SPI transfer transformation methods */
983 extern int spi_split_transfers_maxsize(struct spi_master *master,
984 struct spi_message *msg,
988 /*---------------------------------------------------------------------------*/
990 /* All these synchronous SPI transfer routines are utilities layered
991 * over the core async transfer primitive. Here, "synchronous" means
992 * they will sleep uninterruptibly until the async transfer completes.
995 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
996 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
997 extern int spi_bus_lock(struct spi_master *master);
998 extern int spi_bus_unlock(struct spi_master *master);
1001 * spi_sync_transfer - synchronous SPI data transfer
1002 * @spi: device with which data will be exchanged
1003 * @xfers: An array of spi_transfers
1004 * @num_xfers: Number of items in the xfer array
1005 * Context: can sleep
1007 * Does a synchronous SPI data transfer of the given spi_transfer array.
1009 * For more specific semantics see spi_sync().
1011 * Return: Return: zero on success, else a negative error code.
1014 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
1015 unsigned int num_xfers)
1017 struct spi_message msg;
1019 spi_message_init_with_transfers(&msg, xfers, num_xfers);
1021 return spi_sync(spi, &msg);
1025 * spi_write - SPI synchronous write
1026 * @spi: device to which data will be written
1028 * @len: data buffer size
1029 * Context: can sleep
1031 * This function writes the buffer @buf.
1032 * Callable only from contexts that can sleep.
1034 * Return: zero on success, else a negative error code.
1037 spi_write(struct spi_device *spi, const void *buf, size_t len)
1039 struct spi_transfer t = {
1044 return spi_sync_transfer(spi, &t, 1);
1048 * spi_read - SPI synchronous read
1049 * @spi: device from which data will be read
1051 * @len: data buffer size
1052 * Context: can sleep
1054 * This function reads the buffer @buf.
1055 * Callable only from contexts that can sleep.
1057 * Return: zero on success, else a negative error code.
1060 spi_read(struct spi_device *spi, void *buf, size_t len)
1062 struct spi_transfer t = {
1067 return spi_sync_transfer(spi, &t, 1);
1070 /* this copies txbuf and rxbuf data; for small transfers only! */
1071 extern int spi_write_then_read(struct spi_device *spi,
1072 const void *txbuf, unsigned n_tx,
1073 void *rxbuf, unsigned n_rx);
1076 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
1077 * @spi: device with which data will be exchanged
1078 * @cmd: command to be written before data is read back
1079 * Context: can sleep
1081 * Callable only from contexts that can sleep.
1083 * Return: the (unsigned) eight bit number returned by the
1084 * device, or else a negative error code.
1086 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
1091 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
1093 /* return negative errno or unsigned value */
1094 return (status < 0) ? status : result;
1098 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
1099 * @spi: device with which data will be exchanged
1100 * @cmd: command to be written before data is read back
1101 * Context: can sleep
1103 * The number is returned in wire-order, which is at least sometimes
1106 * Callable only from contexts that can sleep.
1108 * Return: the (unsigned) sixteen bit number returned by the
1109 * device, or else a negative error code.
1111 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
1116 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
1118 /* return negative errno or unsigned value */
1119 return (status < 0) ? status : result;
1123 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1124 * @spi: device with which data will be exchanged
1125 * @cmd: command to be written before data is read back
1126 * Context: can sleep
1128 * This function is similar to spi_w8r16, with the exception that it will
1129 * convert the read 16 bit data word from big-endian to native endianness.
1131 * Callable only from contexts that can sleep.
1133 * Return: the (unsigned) sixteen bit number returned by the device in cpu
1134 * endianness, or else a negative error code.
1136 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
1142 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
1146 return be16_to_cpu(result);
1150 * struct spi_flash_read_message - flash specific information for
1151 * spi-masters that provide accelerated flash read interfaces
1152 * @buf: buffer to read data
1153 * @from: offset within the flash from where data is to be read
1154 * @len: length of data to be read
1155 * @retlen: actual length of data read
1156 * @read_opcode: read_opcode to be used to communicate with flash
1157 * @addr_width: number of address bytes
1158 * @dummy_bytes: number of dummy bytes
1159 * @opcode_nbits: number of lines to send opcode
1160 * @addr_nbits: number of lines to send address
1161 * @data_nbits: number of lines for data
1162 * @rx_sg: Scatterlist for receive data read from flash
1163 * @cur_msg_mapped: message has been mapped for DMA
1165 struct spi_flash_read_message {
1176 struct sg_table rx_sg;
1177 bool cur_msg_mapped;
1180 /* SPI core interface for flash read support */
1181 static inline bool spi_flash_read_supported(struct spi_device *spi)
1183 return spi->master->spi_flash_read &&
1184 (!spi->master->flash_read_supported ||
1185 spi->master->flash_read_supported(spi));
1188 int spi_flash_read(struct spi_device *spi,
1189 struct spi_flash_read_message *msg);
1191 /*---------------------------------------------------------------------------*/
1194 * INTERFACE between board init code and SPI infrastructure.
1196 * No SPI driver ever sees these SPI device table segments, but
1197 * it's how the SPI core (or adapters that get hotplugged) grows
1198 * the driver model tree.
1200 * As a rule, SPI devices can't be probed. Instead, board init code
1201 * provides a table listing the devices which are present, with enough
1202 * information to bind and set up the device's driver. There's basic
1203 * support for nonstatic configurations too; enough to handle adding
1204 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1208 * struct spi_board_info - board-specific template for a SPI device
1209 * @modalias: Initializes spi_device.modalias; identifies the driver.
1210 * @platform_data: Initializes spi_device.platform_data; the particular
1211 * data stored there is driver-specific.
1212 * @controller_data: Initializes spi_device.controller_data; some
1213 * controllers need hints about hardware setup, e.g. for DMA.
1214 * @irq: Initializes spi_device.irq; depends on how the board is wired.
1215 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
1216 * from the chip datasheet and board-specific signal quality issues.
1217 * @bus_num: Identifies which spi_master parents the spi_device; unused
1218 * by spi_new_device(), and otherwise depends on board wiring.
1219 * @chip_select: Initializes spi_device.chip_select; depends on how
1220 * the board is wired.
1221 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
1222 * wiring (some devices support both 3WIRE and standard modes), and
1223 * possibly presence of an inverter in the chipselect path.
1225 * When adding new SPI devices to the device tree, these structures serve
1226 * as a partial device template. They hold information which can't always
1227 * be determined by drivers. Information that probe() can establish (such
1228 * as the default transfer wordsize) is not included here.
1230 * These structures are used in two places. Their primary role is to
1231 * be stored in tables of board-specific device descriptors, which are
1232 * declared early in board initialization and then used (much later) to
1233 * populate a controller's device tree after the that controller's driver
1234 * initializes. A secondary (and atypical) role is as a parameter to
1235 * spi_new_device() call, which happens after those controller drivers
1236 * are active in some dynamic board configuration models.
1238 struct spi_board_info {
1239 /* the device name and module name are coupled, like platform_bus;
1240 * "modalias" is normally the driver name.
1242 * platform_data goes to spi_device.dev.platform_data,
1243 * controller_data goes to spi_device.controller_data,
1246 char modalias[SPI_NAME_SIZE];
1247 const void *platform_data;
1248 void *controller_data;
1251 /* slower signaling on noisy or low voltage boards */
1255 /* bus_num is board specific and matches the bus_num of some
1256 * spi_master that will probably be registered later.
1258 * chip_select reflects how this chip is wired to that master;
1259 * it's less than num_chipselect.
1264 /* mode becomes spi_device.mode, and is essential for chips
1265 * where the default of SPI_CS_HIGH = 0 is wrong.
1269 /* ... may need additional spi_device chip config data here.
1270 * avoid stuff protocol drivers can set; but include stuff
1271 * needed to behave without being bound to a driver:
1272 * - quirks like clock rate mattering when not selected
1278 spi_register_board_info(struct spi_board_info const *info, unsigned n);
1280 /* board init code may ignore whether SPI is configured or not */
1282 spi_register_board_info(struct spi_board_info const *info, unsigned n)
1287 /* If you're hotplugging an adapter with devices (parport, usb, etc)
1288 * use spi_new_device() to describe each device. You can also call
1289 * spi_unregister_device() to start making that device vanish, but
1290 * normally that would be handled by spi_unregister_master().
1292 * You can also use spi_alloc_device() and spi_add_device() to use a two
1293 * stage registration sequence for each spi_device. This gives the caller
1294 * some more control over the spi_device structure before it is registered,
1295 * but requires that caller to initialize fields that would otherwise
1296 * be defined using the board info.
1298 extern struct spi_device *
1299 spi_alloc_device(struct spi_master *master);
1302 spi_add_device(struct spi_device *spi);
1304 extern struct spi_device *
1305 spi_new_device(struct spi_master *, struct spi_board_info *);
1307 extern void spi_unregister_device(struct spi_device *spi);
1309 extern const struct spi_device_id *
1310 spi_get_device_id(const struct spi_device *sdev);
1313 spi_transfer_is_last(struct spi_master *master, struct spi_transfer *xfer)
1315 return list_is_last(&xfer->transfer_list, &master->cur_msg->transfers);
1318 #endif /* __LINUX_SPI_H */