4 * Copyright (c) 2005-2008 Analog Devices Inc.
6 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * Licensed under the GPL-2 or later.
13 #include <asm/blackfin.h>
14 #include <asm/mach-common/bits/mpu.h>
16 void flush_cache(unsigned long addr, unsigned long size)
18 void *start_addr, *end_addr;
21 /* no need to flush stuff in on chip memory (L1/L2/etc...) */
22 if (addr >= 0xE0000000)
25 start_addr = (void *)addr;
26 end_addr = (void *)(addr + size);
27 istatus = icache_status();
28 dstatus = dcache_status();
32 blackfin_icache_dcache_flush_range(start_addr, end_addr);
34 blackfin_icache_flush_range(start_addr, end_addr);
36 blackfin_dcache_flush_range(start_addr, end_addr);
39 void icache_enable(void)
41 bfin_write_IMEM_CONTROL(IMC | ENICPLB);
45 void icache_disable(void)
47 bfin_write_IMEM_CONTROL(0);
51 int icache_status(void)
53 return bfin_read_IMEM_CONTROL() & IMC;
56 void dcache_enable(void)
58 bfin_write_DMEM_CONTROL(ACACHE_BCACHE | ENDCPLB | PORT_PREF0);
62 void dcache_disable(void)
64 bfin_write_DMEM_CONTROL(0);
68 int dcache_status(void)
70 return bfin_read_DMEM_CONTROL() & ACACHE_BCACHE;