1 /*==========================================================================
5 // HAL misc board support code for Atmel AT91sam7s
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12 // Copyright (C) 2003 Nick Garnett <nickg@calivar.com>
13 // Copyright (C) 2006 eCosCentric Ltd
14 // Copyright (C) 2006 Andrew Lunn <andrew.lunn@ascom.ch>
16 // eCos is free software; you can redistribute it and/or modify it under
17 // the terms of the GNU General Public License as published by the Free
18 // Software Foundation; either version 2 or (at your option) any later version.
20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
25 // You should have received a copy of the GNU General Public License along
26 // with eCos; if not, write to the Free Software Foundation, Inc.,
27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
29 // As a special exception, if other files instantiate templates or use macros
30 // or inline functions from this file, or you compile this file and link it
31 // with other works to produce a work based on this file, this file does not
32 // by itself cause the resulting work to be covered by the GNU General Public
33 // License. However the source code for this file must still be made available
34 // in accordance with section (3) of the GNU General Public License.
36 // This exception does not invalidate any other reasons why a work based on
37 // this file might be covered by the GNU General Public License.
38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
44 // Contributors: gthomas, jskov, nickg, tkoeller, Oliver Munz, Andrew Lunn
46 // Purpose: HAL board support
47 // Description: Implementations of HAL board interfaces
49 //####DESCRIPTIONEND####
51 //========================================================================*/
53 #include <pkgconf/system.h>
54 #include <pkgconf/hal.h>
56 #include <cyg/infra/cyg_type.h> // base types
57 #include <cyg/infra/cyg_trac.h> // tracing macros
58 #include <cyg/infra/cyg_ass.h> // assertion macros
60 #include <cyg/hal/hal_io.h> // IO macros
61 #include <cyg/hal/hal_arch.h> // Register state info
62 #include <cyg/hal/hal_diag.h>
63 #include <cyg/hal/hal_intr.h> // necessary?
64 #include <cyg/hal/hal_cache.h>
65 #include <cyg/hal/hal_if.h> // calling interface
66 #include <cyg/hal/hal_misc.h> // helper functions
67 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
68 #include <cyg/hal/drv_api.h> // HAL ISR support
71 extern void hal_at91_led(int val);
74 hal_at91_set_leds (int val)
79 // -------------------------------------------------------------------------
82 void hal_plf_hardware_init (void)
84 /* Enable the Serial devices to driver the serial port pins */
85 HAL_ARM_AT91_PIO_CFG(AT91_USART_RXD0);
86 HAL_ARM_AT91_PIO_CFG(AT91_USART_TXD0);
87 HAL_ARM_AT91_PIO_CFG(AT91_DBG_DTXD);
88 HAL_ARM_AT91_PIO_CFG(AT91_DBG_DRXD);
90 #if !defined(CYGHWR_HAL_ARM_AT91SAM7S_at91sam7s32)
91 /* Enable the Serial devices to driver the serial port pins */
92 HAL_ARM_AT91_PIO_CFG(AT91_USART_RXD1);
93 HAL_ARM_AT91_PIO_CFG(AT91_USART_TXD1);
96 /* Setup the Reset controller. Allow user resets */
97 HAL_WRITE_UINT32(AT91_RST+AT91_RST_RMR,
102 #ifdef CYGBLD_HAL_ARM_AT91_SERIAL_UART
103 /* Enable peripheral clocks for USART 0 and 1 if they are to be used */
104 HAL_WRITE_UINT32(AT91_PMC+AT91_PMC_PCER,
109 #ifdef CYGBLD_HAL_ARM_AT91_TIMER_TC
110 /* Enable peripheral clocks for TC 0 and 1 if they are to be used */
111 HAL_WRITE_UINT32(AT91_PMC+AT91_PMC_PCER,
116 #ifndef CYGPKG_IO_WATCHDOG
117 /* Disable the watchdog. The eCos philosophy is that the watchdog is
118 disabled unless the watchdog driver is used to enable it.
119 Whoever if we disable it here we cannot re-enable it in the
120 watchdog driver, hence the conditional compilation. */
121 HAL_WRITE_UINT32(AT91_WDTC + AT91_WDTC_WDMR, AT91_WDTC_WDMR_DIS);
124 /* Perform some platform specific bits to get the Ethernet hardware
125 setup. Specifically if a specific phy is used and does not start in
126 the correct mode a function needs to be supplied as part of the plf
127 to do the necessary initializations.
129 #ifdef CYGPKG_DEVS_ETH_ARM_AT91
130 #ifdef HAL_PLF_ETH_INIT
136 // Calculate the baud value to be programmed into the serial port baud
137 // rate generators. This function will determine what the clock speed
138 // is that is driving the generator so it can be used in situations
139 // when the application dynamically changes the clock speed.
141 hal_at91_us_baud(cyg_uint32 baud_rate)
144 cyg_uint32 main_clock = 0;
145 cyg_uint32 baud_value = 0;
147 HAL_READ_UINT32((AT91_PMC+AT91_PMC_MCKR), val);
148 switch (val & 0x03) {
150 case AT91_PMC_MCKR_SLOW_CLK:
151 main_clock = CYGNUM_HAL_ARM_AT91_SLOW_CLOCK;
155 case AT91_PMC_MCKR_MAIN_CLK:
156 main_clock = CYGNUM_HAL_ARM_AT91_CLOCK_OSC_MAIN;
159 case AT91_PMC_MCKR_PLL_CLK:
160 HAL_READ_UINT32((AT91_PMC+AT91_PMC_PLLR), pll);
161 main_clock = CYGNUM_HAL_ARM_AT91_CLOCK_OSC_MAIN *
162 (((pll & 0x7FF0000) >> 16) + 1) / (pll & 0xFF);
167 val = (val & 0x1C) >> 2;
168 main_clock = main_clock >> val;
170 /* Define the baud rate divisor register, (round) */
171 baud_value = (main_clock/(8*baud_rate)+1)/2;
176 //--------------------------------------------------------------------------
177 // EOF at91sam7s_misc.c