1 #ifndef CYGONCE_HAL_PLATFORM_INC
2 #define CYGONCE_HAL_PLATFORM_INC
3 ##=============================================================================
7 ## SH/CQ7750 board assembler header file
9 ##=============================================================================
10 #####ECOSGPLCOPYRIGHTBEGIN####
11 ## -------------------------------------------
12 ## This file is part of eCos, the Embedded Configurable Operating System.
13 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
15 ## eCos is free software; you can redistribute it and/or modify it under
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21 ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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26 ## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 ## As a special exception, if other files instantiate templates or use macros
29 ## or inline functions from this file, or you compile this file and link it
30 ## with other works to produce a work based on this file, this file does not
31 ## by itself cause the resulting work to be covered by the GNU General Public
32 ## License. However the source code for this file must still be made available
33 ## in accordance with section (3) of the GNU General Public License.
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39 ## at http://sources.redhat.com/ecos/ecos-license/
40 ## -------------------------------------------
41 #####ECOSGPLCOPYRIGHTEND####
42 ##=============================================================================
43 #######DESCRIPTIONBEGIN####
46 ## Contributors:Ryozaburo Suzuki
48 ## Purpose: SH/CQ7750 board definitions.
49 ## Description: This file contains various definitions and macros that are
50 ## useful for writing assembly code for the SH/CQ7750 board.
52 ## #include <cyg/hal/platform.inc>
56 ######DESCRIPTIONEND####
58 ##=============================================================================
60 #include <pkgconf/hal.h>
62 #include <cyg/hal/sh_offsets.inc>
63 #include <cyg/hal/sh_regs.h>
65 #------------------------------------------------------------------------------
66 # Hardware initialization.
68 .macro hal_hardware_init
69 // Set up the Bus State Controller
70 mova BSC_settings_table,r0
72 1: mov.l @r3+,r0 // Address (or zero)
77 mov.l @r3+,r0 // byte or word or long?
86 mov.l r1,@r2 // delay slot
89 mov.b r1,@r2 // delay slot
92 mov.w r1,@r2 // delay slot
98 .long CYGARC_REG_FRQCR
99 .long CYGARC_REG_FRQCR_INIT
103 .long CYGARC_REG_BCR1
107 .long CYGARC_REG_BCR2
111 .long CYGARC_REG_WCR1
115 .long CYGARC_REG_WCR2
119 .long CYGARC_REG_WCR3
127 .long CYGARC_REG_RTCNT
131 .long CYGARC_REG_RTCOR
135 .long CYGARC_REG_RFCR
139 .long CYGARC_REG_RTCSR
165 #------------------------------------------------------------------------------
166 # Monitor initialization.
168 #ifndef CYGPKG_HAL_SH_MON_DEFINED
170 #if defined(CYG_HAL_STARTUP_ROM) || \
171 ( defined(CYG_HAL_STARTUP_RAM) && \
172 !defined(CYGSEM_HAL_USE_ROM_MONITOR))
174 # If we are starting up from ROM, or we are starting in
175 # RAM and NOT using a ROM monitor, initialize the VSR table.
178 mov.l $hal_vsr_table,r3
179 # Write exception vectors
180 mov.l $cyg_hal_default_exception_vsr,r4
181 mov #CYGNUM_HAL_VSR_EXCEPTION_COUNT,r5
186 # Write interrupt vector
187 mov.l $cyg_hal_default_interrupt_vsr,r4
188 mov.l $hal_vsr_table,r3
189 add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3
195 SYM_PTR_REF(cyg_hal_default_exception_vsr)
196 SYM_PTR_REF(cyg_hal_default_interrupt_vsr)
197 SYM_PTR_REF(hal_vsr_table)
201 #elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR)
203 # Initialize the VSR table entries
204 # We only take control of the interrupt vector,
205 # the rest are left to the ROM for now...
208 # Write interrupt vector
209 mov.l $hal_vsr_table,r3
210 mov.l $cyg_hal_default_interrupt_vsr,r4
211 add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3
217 SYM_PTR_REF(cyg_hal_default_interrupt_vsr)
218 SYM_PTR_REF(hal_vsr_table)
230 #define CYGPKG_HAL_SH_MON_DEFINED
232 #endif // CYGPKG_HAL_SH_MON_DEFINED
234 #endif // CYGONCE_HAL_PLATFORM_INC