1 #ifndef CYGONCE_HAL_PLF_INTR_H
2 #define CYGONCE_HAL_PLF_INTR_H
4 //==========================================================================
8 // Platform specific Interrupt and clock support
10 //==========================================================================
11 //####ECOSGPLCOPYRIGHTBEGIN####
12 // -------------------------------------------
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41 // -------------------------------------------
42 //####ECOSGPLCOPYRIGHTEND####
43 //==========================================================================
44 //#####DESCRIPTIONBEGIN####
47 // Contributors: jskov
49 // Purpose: Define Interrupt support
50 // Description: The macros defined here provide the HAL APIs for handling
51 // interrupts and the clock for the SE77x9 board.
53 // #include <cyg/hal/plf_intr.h>
57 //####DESCRIPTIONEND####
59 //==========================================================================
61 #include <pkgconf/hal.h>
62 #include <cyg/hal/hal_io.h>
64 //----------------------------------------------------------------------------
65 // External interrupts
66 #define CYGNUM_HAL_INTERRUPT_EXTERNALS_BASE CYGNUM_HAL_INTERRUPT_LVL0
67 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ8 CYGNUM_HAL_INTERRUPT_LVL0
68 #define CYGNUM_HAL_INTERRUPT_KEYBOARD CYGNUM_HAL_INTERRUPT_LVL1
69 #define CYGNUM_HAL_INTERRUPT_PCMCIA2 CYGNUM_HAL_INTERRUPT_LVL2
70 #define CYGNUM_HAL_INTERRUPT_COM2 CYGNUM_HAL_INTERRUPT_LVL3
71 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ6 CYGNUM_HAL_INTERRUPT_LVL4
72 #define CYGNUM_HAL_INTERRUPT_MOUSE CYGNUM_HAL_INTERRUPT_LVL5
73 #define CYGNUM_HAL_INTERRUPT_PCMCIA1 CYGNUM_HAL_INTERRUPT_LVL6
74 #define CYGNUM_HAL_INTERRUPT_COM1 CYGNUM_HAL_INTERRUPT_LVL7
75 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ4 CYGNUM_HAL_INTERRUPT_LVL8
76 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ3 CYGNUM_HAL_INTERRUPT_LVL9
77 #define CYGNUM_HAL_INTERRUPT_PARALLEL CYGNUM_HAL_INTERRUPT_LVL10
78 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ2 CYGNUM_HAL_INTERRUPT_LVL11
79 #define CYGNUM_HAL_INTERRUPT_LAN CYGNUM_HAL_INTERRUPT_LVL12
80 #define CYGNUM_HAL_INTERRUPT_IDE CYGNUM_HAL_INTERRUPT_LVL13
81 #define CYGNUM_HAL_INTERRUPT_PCMCIA0 CYGNUM_HAL_INTERRUPT_LVL14
83 //----------------------------------------------------------------------------
84 // Interrupt controller
85 #define CYGARC_REG_INTC_A 0xb1400000
86 #define CYGARC_REG_INTC_B 0xb1400002
87 #define CYGARC_REG_INTC_C 0xb1400004
88 #define CYGARC_REG_INTC_D 0xb1400006
89 #define CYGARC_REG_INTC_E 0xb1400008
90 #define CYGARC_REG_INTC_F 0xb140000a
91 #define CYGARC_REG_INTC_G 0xb140000c
93 //----------------------------------------------------------------------------
94 // Interrupt configuration extention macros
96 // It appears that masks do not appear linear in the INTC like on the SE7751.
97 // The below magic values determined from the INTC's startup values.
99 // 0xb1400000: 0x02a0 0x0005 0x008c 0xe030 0x0d91 0xf0b0 0x7640 0x0000
102 _mask_vec(int level, cyg_uint32 reg, int shift, int lvl)
106 HAL_READ_UINT16(reg, msk);
107 msk &= ~(0x000f << shift);
108 if (level) msk |= lvl << shift;
109 HAL_WRITE_UINT16(reg, msk);
112 #define CYGPRI_HAL_INTERRUPT_UPDATE_LEVEL_PLF(vec, level) \
113 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ8: \
114 _mask_vec(level, CYGARC_REG_INTC_F, 3, 0xf); \
116 case CYGNUM_HAL_INTERRUPT_KEYBOARD: \
117 _mask_vec(level, CYGARC_REG_INTC_D, 3, 0xe); \
119 case CYGNUM_HAL_INTERRUPT_PCMCIA2: \
120 _mask_vec(level, CYGARC_REG_INTC_E, 2, 0xd); \
122 case CYGNUM_HAL_INTERRUPT_COM2: \
123 _mask_vec(level, CYGARC_REG_INTC_C, 0, 0xc); \
125 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ6: \
126 _mask_vec(level, CYGARC_REG_INTC_F, 1, 0xb); \
128 case CYGNUM_HAL_INTERRUPT_MOUSE: \
129 _mask_vec(level, CYGARC_REG_INTC_A, 1, 0xa); \
131 case CYGNUM_HAL_INTERRUPT_PCMCIA1: \
132 _mask_vec(level, CYGARC_REG_INTC_E, 1, 0x9); \
134 case CYGNUM_HAL_INTERRUPT_COM1: \
135 _mask_vec(level, CYGARC_REG_INTC_C, 1, 0x8); \
137 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ4: \
138 _mask_vec(level, CYGARC_REG_INTC_G, 3, 0x7); \
140 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ3: \
141 _mask_vec(level, CYGARC_REG_INTC_G, 2, 0x6); \
143 case CYGNUM_HAL_INTERRUPT_PARALLEL: \
144 _mask_vec(level, CYGARC_REG_INTC_B, 0, 0x5); \
146 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ2: \
147 _mask_vec(level, CYGARC_REG_INTC_G, 1, 0x4); \
149 case CYGNUM_HAL_INTERRUPT_LAN: \
150 _mask_vec(level, CYGARC_REG_INTC_D, 1, 0x3); \
152 case CYGNUM_HAL_INTERRUPT_IDE: \
153 _mask_vec(level, CYGARC_REG_INTC_A, 2, 0x2); \
155 case CYGNUM_HAL_INTERRUPT_PCMCIA0: \
156 _mask_vec(level, CYGARC_REG_INTC_E, 0, 0x1); \
159 //----------------------------------------------------------------------------
161 // Block interrupts and cause an exception. This forces a reset.
162 #define HAL_PLATFORM_RESET() \
163 asm volatile ("ldc %0,sr;trapa #0x00;" : : "r" (CYGARC_REG_SR_BL))
165 #define HAL_PLATFORM_RESET_ENTRY 0x80000000
167 //--------------------------------------------------------------------------
168 #endif // ifndef CYGONCE_HAL_PLF_INTR_H