sound/soc/codecs/rt5645.c

   1 /*
   2  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2013 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/gpio.h>
  21 #include <linux/gpio/consumer.h>
  22 #include <linux/acpi.h>
  23 #include <linux/dmi.h>
  24 #include <sound/core.h>
  25 #include <sound/pcm.h>
  26 #include <sound/pcm_params.h>
  27 #include <sound/jack.h>
  28 #include <sound/soc.h>
  29 #include <sound/soc-dapm.h>
  30 #include <sound/initval.h>
  31 #include <sound/tlv.h>
  32
  33 #include "rl6231.h"
  34 #include "rt5645.h"
  35
  36 #define RT5645_DEVICE_ID 0x6308
  37 #define RT5650_DEVICE_ID 0x6419
  38
  39 #define RT5645_PR_RANGE_BASE (0xff + 1)
  40 #define RT5645_PR_SPACING 0x100
  41
  42 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  43
  44 static const struct regmap_range_cfg rt5645_ranges[] = {
  45         {
  46                 .name = "PR",
  47                 .range_min = RT5645_PR_BASE,
  48                 .range_max = RT5645_PR_BASE + 0xf8,
  49                 .selector_reg = RT5645_PRIV_INDEX,
  50                 .selector_mask = 0xff,
  51                 .selector_shift = 0x0,
  52                 .window_start = RT5645_PRIV_DATA,
  53                 .window_len = 0x1,
  54         },
  55 };
  56
  57 static const struct reg_default init_list[] = {
  58         {RT5645_PR_BASE + 0x3d, 0x3600},
  59         {RT5645_PR_BASE + 0x1c, 0xfd20},
  60         {RT5645_PR_BASE + 0x20, 0x611f},
  61         {RT5645_PR_BASE + 0x21, 0x4040},
  62         {RT5645_PR_BASE + 0x23, 0x0004},
  63 };
  64 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
  65
  66 static const struct reg_default rt5650_init_list[] = {
  67         {0xf6,  0x0100},
  68 };
  69
  70 static const struct reg_default rt5645_reg[] = {
  71         { 0x00, 0x0000 },
  72         { 0x01, 0xc8c8 },
  73         { 0x02, 0xc8c8 },
  74         { 0x03, 0xc8c8 },
  75         { 0x0a, 0x0002 },
  76         { 0x0b, 0x2827 },
  77         { 0x0c, 0xe000 },
  78         { 0x0d, 0x0000 },
  79         { 0x0e, 0x0000 },
  80         { 0x0f, 0x0808 },
  81         { 0x14, 0x3333 },
  82         { 0x16, 0x4b00 },
  83         { 0x18, 0x018b },
  84         { 0x19, 0xafaf },
  85         { 0x1a, 0xafaf },
  86         { 0x1b, 0x0001 },
  87         { 0x1c, 0x2f2f },
  88         { 0x1d, 0x2f2f },
  89         { 0x1e, 0x0000 },
  90         { 0x20, 0x0000 },
  91         { 0x27, 0x7060 },
  92         { 0x28, 0x7070 },
  93         { 0x29, 0x8080 },
  94         { 0x2a, 0x5656 },
  95         { 0x2b, 0x5454 },
  96         { 0x2c, 0xaaa0 },
  97         { 0x2d, 0x0000 },
  98         { 0x2f, 0x1002 },
  99         { 0x31, 0x5000 },
 100         { 0x32, 0x0000 },
 101         { 0x33, 0x0000 },
 102         { 0x34, 0x0000 },
 103         { 0x35, 0x0000 },
 104         { 0x3b, 0x0000 },
 105         { 0x3c, 0x007f },
 106         { 0x3d, 0x0000 },
 107         { 0x3e, 0x007f },
 108         { 0x3f, 0x0000 },
 109         { 0x40, 0x001f },
 110         { 0x41, 0x0000 },
 111         { 0x42, 0x001f },
 112         { 0x45, 0x6000 },
 113         { 0x46, 0x003e },
 114         { 0x47, 0x003e },
 115         { 0x48, 0xf807 },
 116         { 0x4a, 0x0004 },
 117         { 0x4d, 0x0000 },
 118         { 0x4e, 0x0000 },
 119         { 0x4f, 0x01ff },
 120         { 0x50, 0x0000 },
 121         { 0x51, 0x0000 },
 122         { 0x52, 0x01ff },
 123         { 0x53, 0xf000 },
 124         { 0x56, 0x0111 },
 125         { 0x57, 0x0064 },
 126         { 0x58, 0xef0e },
 127         { 0x59, 0xf0f0 },
 128         { 0x5a, 0xef0e },
 129         { 0x5b, 0xf0f0 },
 130         { 0x5c, 0xef0e },
 131         { 0x5d, 0xf0f0 },
 132         { 0x5e, 0xf000 },
 133         { 0x5f, 0x0000 },
 134         { 0x61, 0x0300 },
 135         { 0x62, 0x0000 },
 136         { 0x63, 0x00c2 },
 137         { 0x64, 0x0000 },
 138         { 0x65, 0x0000 },
 139         { 0x66, 0x0000 },
 140         { 0x6a, 0x0000 },
 141         { 0x6c, 0x0aaa },
 142         { 0x70, 0x8000 },
 143         { 0x71, 0x8000 },
 144         { 0x72, 0x8000 },
 145         { 0x73, 0x7770 },
 146         { 0x74, 0x3e00 },
 147         { 0x75, 0x2409 },
 148         { 0x76, 0x000a },
 149         { 0x77, 0x0c00 },
 150         { 0x78, 0x0000 },
 151         { 0x79, 0x0123 },
 152         { 0x80, 0x0000 },
 153         { 0x81, 0x0000 },
 154         { 0x82, 0x0000 },
 155         { 0x83, 0x0000 },
 156         { 0x84, 0x0000 },
 157         { 0x85, 0x0000 },
 158         { 0x8a, 0x0000 },
 159         { 0x8e, 0x0004 },
 160         { 0x8f, 0x1100 },
 161         { 0x90, 0x0646 },
 162         { 0x91, 0x0c06 },
 163         { 0x93, 0x0000 },
 164         { 0x94, 0x0200 },
 165         { 0x95, 0x0000 },
 166         { 0x9a, 0x2184 },
 167         { 0x9b, 0x010a },
 168         { 0x9c, 0x0aea },
 169         { 0x9d, 0x000c },
 170         { 0x9e, 0x0400 },
 171         { 0xa0, 0xa0a8 },
 172         { 0xa1, 0x0059 },
 173         { 0xa2, 0x0001 },
 174         { 0xae, 0x6000 },
 175         { 0xaf, 0x0000 },
 176         { 0xb0, 0x6000 },
 177         { 0xb1, 0x0000 },
 178         { 0xb2, 0x0000 },
 179         { 0xb3, 0x001f },
 180         { 0xb4, 0x020c },
 181         { 0xb5, 0x1f00 },
 182         { 0xb6, 0x0000 },
 183         { 0xbb, 0x0000 },
 184         { 0xbc, 0x0000 },
 185         { 0xbd, 0x0000 },
 186         { 0xbe, 0x0000 },
 187         { 0xbf, 0x3100 },
 188         { 0xc0, 0x0000 },
 189         { 0xc1, 0x0000 },
 190         { 0xc2, 0x0000 },
 191         { 0xc3, 0x2000 },
 192         { 0xcd, 0x0000 },
 193         { 0xce, 0x0000 },
 194         { 0xcf, 0x1813 },
 195         { 0xd0, 0x0690 },
 196         { 0xd1, 0x1c17 },
 197         { 0xd3, 0xb320 },
 198         { 0xd4, 0x0000 },
 199         { 0xd6, 0x0400 },
 200         { 0xd9, 0x0809 },
 201         { 0xda, 0x0000 },
 202         { 0xdb, 0x0003 },
 203         { 0xdc, 0x0049 },
 204         { 0xdd, 0x001b },
 205         { 0xdf, 0x0008 },
 206         { 0xe0, 0x4000 },
 207         { 0xe6, 0x8000 },
 208         { 0xe7, 0x0200 },
 209         { 0xec, 0xb300 },
 210         { 0xed, 0x0000 },
 211         { 0xf0, 0x001f },
 212         { 0xf1, 0x020c },
 213         { 0xf2, 0x1f00 },
 214         { 0xf3, 0x0000 },
 215         { 0xf4, 0x4000 },
 216         { 0xf8, 0x0000 },
 217         { 0xf9, 0x0000 },
 218         { 0xfa, 0x2060 },
 219         { 0xfb, 0x4040 },
 220         { 0xfc, 0x0000 },
 221         { 0xfd, 0x0002 },
 222         { 0xfe, 0x10ec },
 223         { 0xff, 0x6308 },
 224 };
 225
 226 static int rt5645_reset(struct snd_soc_codec *codec)
 227 {
 228         return snd_soc_write(codec, RT5645_RESET, 0);
 229 }
 230
 231 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 232 {
 233         int i;
 234
 235         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 236                 if (reg >= rt5645_ranges[i].range_min &&
 237                         reg <= rt5645_ranges[i].range_max) {
 238                         return true;
 239                 }
 240         }
 241
 242         switch (reg) {
 243         case RT5645_RESET:
 244         case RT5645_PRIV_DATA:
 245         case RT5645_IN1_CTRL1:
 246         case RT5645_IN1_CTRL2:
 247         case RT5645_IN1_CTRL3:
 248         case RT5645_A_JD_CTRL1:
 249         case RT5645_ADC_EQ_CTRL1:
 250         case RT5645_EQ_CTRL1:
 251         case RT5645_ALC_CTRL_1:
 252         case RT5645_IRQ_CTRL2:
 253         case RT5645_IRQ_CTRL3:
 254         case RT5645_INT_IRQ_ST:
 255         case RT5645_IL_CMD:
 256         case RT5650_4BTN_IL_CMD1:
 257         case RT5645_VENDOR_ID:
 258         case RT5645_VENDOR_ID1:
 259         case RT5645_VENDOR_ID2:
 260                 return true;
 261         default:
 262                 return false;
 263         }
 264 }
 265
 266 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 267 {
 268         int i;
 269
 270         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 271                 if (reg >= rt5645_ranges[i].range_min &&
 272                         reg <= rt5645_ranges[i].range_max) {
 273                         return true;
 274                 }
 275         }
 276
 277         switch (reg) {
 278         case RT5645_RESET:
 279         case RT5645_SPK_VOL:
 280         case RT5645_HP_VOL:
 281         case RT5645_LOUT1:
 282         case RT5645_IN1_CTRL1:
 283         case RT5645_IN1_CTRL2:
 284         case RT5645_IN1_CTRL3:
 285         case RT5645_IN2_CTRL:
 286         case RT5645_INL1_INR1_VOL:
 287         case RT5645_SPK_FUNC_LIM:
 288         case RT5645_ADJ_HPF_CTRL:
 289         case RT5645_DAC1_DIG_VOL:
 290         case RT5645_DAC2_DIG_VOL:
 291         case RT5645_DAC_CTRL:
 292         case RT5645_STO1_ADC_DIG_VOL:
 293         case RT5645_MONO_ADC_DIG_VOL:
 294         case RT5645_ADC_BST_VOL1:
 295         case RT5645_ADC_BST_VOL2:
 296         case RT5645_STO1_ADC_MIXER:
 297         case RT5645_MONO_ADC_MIXER:
 298         case RT5645_AD_DA_MIXER:
 299         case RT5645_STO_DAC_MIXER:
 300         case RT5645_MONO_DAC_MIXER:
 301         case RT5645_DIG_MIXER:
 302         case RT5650_A_DAC_SOUR:
 303         case RT5645_DIG_INF1_DATA:
 304         case RT5645_PDM_OUT_CTRL:
 305         case RT5645_REC_L1_MIXER:
 306         case RT5645_REC_L2_MIXER:
 307         case RT5645_REC_R1_MIXER:
 308         case RT5645_REC_R2_MIXER:
 309         case RT5645_HPMIXL_CTRL:
 310         case RT5645_HPOMIXL_CTRL:
 311         case RT5645_HPMIXR_CTRL:
 312         case RT5645_HPOMIXR_CTRL:
 313         case RT5645_HPO_MIXER:
 314         case RT5645_SPK_L_MIXER:
 315         case RT5645_SPK_R_MIXER:
 316         case RT5645_SPO_MIXER:
 317         case RT5645_SPO_CLSD_RATIO:
 318         case RT5645_OUT_L1_MIXER:
 319         case RT5645_OUT_R1_MIXER:
 320         case RT5645_OUT_L_GAIN1:
 321         case RT5645_OUT_L_GAIN2:
 322         case RT5645_OUT_R_GAIN1:
 323         case RT5645_OUT_R_GAIN2:
 324         case RT5645_LOUT_MIXER:
 325         case RT5645_HAPTIC_CTRL1:
 326         case RT5645_HAPTIC_CTRL2:
 327         case RT5645_HAPTIC_CTRL3:
 328         case RT5645_HAPTIC_CTRL4:
 329         case RT5645_HAPTIC_CTRL5:
 330         case RT5645_HAPTIC_CTRL6:
 331         case RT5645_HAPTIC_CTRL7:
 332         case RT5645_HAPTIC_CTRL8:
 333         case RT5645_HAPTIC_CTRL9:
 334         case RT5645_HAPTIC_CTRL10:
 335         case RT5645_PWR_DIG1:
 336         case RT5645_PWR_DIG2:
 337         case RT5645_PWR_ANLG1:
 338         case RT5645_PWR_ANLG2:
 339         case RT5645_PWR_MIXER:
 340         case RT5645_PWR_VOL:
 341         case RT5645_PRIV_INDEX:
 342         case RT5645_PRIV_DATA:
 343         case RT5645_I2S1_SDP:
 344         case RT5645_I2S2_SDP:
 345         case RT5645_ADDA_CLK1:
 346         case RT5645_ADDA_CLK2:
 347         case RT5645_DMIC_CTRL1:
 348         case RT5645_DMIC_CTRL2:
 349         case RT5645_TDM_CTRL_1:
 350         case RT5645_TDM_CTRL_2:
 351         case RT5645_TDM_CTRL_3:
 352         case RT5645_GLB_CLK:
 353         case RT5645_PLL_CTRL1:
 354         case RT5645_PLL_CTRL2:
 355         case RT5645_ASRC_1:
 356         case RT5645_ASRC_2:
 357         case RT5645_ASRC_3:
 358         case RT5645_ASRC_4:
 359         case RT5645_DEPOP_M1:
 360         case RT5645_DEPOP_M2:
 361         case RT5645_DEPOP_M3:
 362         case RT5645_MICBIAS:
 363         case RT5645_A_JD_CTRL1:
 364         case RT5645_VAD_CTRL4:
 365         case RT5645_CLSD_OUT_CTRL:
 366         case RT5645_ADC_EQ_CTRL1:
 367         case RT5645_ADC_EQ_CTRL2:
 368         case RT5645_EQ_CTRL1:
 369         case RT5645_EQ_CTRL2:
 370         case RT5645_ALC_CTRL_1:
 371         case RT5645_ALC_CTRL_2:
 372         case RT5645_ALC_CTRL_3:
 373         case RT5645_ALC_CTRL_4:
 374         case RT5645_ALC_CTRL_5:
 375         case RT5645_JD_CTRL:
 376         case RT5645_IRQ_CTRL1:
 377         case RT5645_IRQ_CTRL2:
 378         case RT5645_IRQ_CTRL3:
 379         case RT5645_INT_IRQ_ST:
 380         case RT5645_GPIO_CTRL1:
 381         case RT5645_GPIO_CTRL2:
 382         case RT5645_GPIO_CTRL3:
 383         case RT5645_BASS_BACK:
 384         case RT5645_MP3_PLUS1:
 385         case RT5645_MP3_PLUS2:
 386         case RT5645_ADJ_HPF1:
 387         case RT5645_ADJ_HPF2:
 388         case RT5645_HP_CALIB_AMP_DET:
 389         case RT5645_SV_ZCD1:
 390         case RT5645_SV_ZCD2:
 391         case RT5645_IL_CMD:
 392         case RT5645_IL_CMD2:
 393         case RT5645_IL_CMD3:
 394         case RT5650_4BTN_IL_CMD1:
 395         case RT5650_4BTN_IL_CMD2:
 396         case RT5645_DRC1_HL_CTRL1:
 397         case RT5645_DRC2_HL_CTRL1:
 398         case RT5645_ADC_MONO_HP_CTRL1:
 399         case RT5645_ADC_MONO_HP_CTRL2:
 400         case RT5645_DRC2_CTRL1:
 401         case RT5645_DRC2_CTRL2:
 402         case RT5645_DRC2_CTRL3:
 403         case RT5645_DRC2_CTRL4:
 404         case RT5645_DRC2_CTRL5:
 405         case RT5645_JD_CTRL3:
 406         case RT5645_JD_CTRL4:
 407         case RT5645_GEN_CTRL1:
 408         case RT5645_GEN_CTRL2:
 409         case RT5645_GEN_CTRL3:
 410         case RT5645_VENDOR_ID:
 411         case RT5645_VENDOR_ID1:
 412         case RT5645_VENDOR_ID2:
 413                 return true;
 414         default:
 415                 return false;
 416         }
 417 }
 418
 419 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 420 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
 421 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 422 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
 423 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 424
 425 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 426 static unsigned int bst_tlv[] = {
 427         TLV_DB_RANGE_HEAD(7),
 428         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 429         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 430         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 431         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 432         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 433         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 434         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
 435 };
 436
 437 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 438         /* Speaker Output Volume */
 439         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 440                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 441         SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 442                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 443
 444         /* Headphone Output Volume */
 445         SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
 446                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 447         SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
 448                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 449
 450         /* OUTPUT Control */
 451         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 452                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 453         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 454                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 455         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 456                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 457
 458         /* DAC Digital Volume */
 459         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 460                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 461         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 462                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 463         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 464                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 465
 466         /* IN1/IN2 Control */
 467         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 468                 RT5645_BST_SFT1, 8, 0, bst_tlv),
 469         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 470                 RT5645_BST_SFT2, 8, 0, bst_tlv),
 471
 472         /* INL/INR Volume Control */
 473         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 474                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 475
 476         /* ADC Digital Volume Control */
 477         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 478                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 479         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 480                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 481         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 482                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 483         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 484                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 485
 486         /* ADC Boost Volume Control */
 487         SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
 488                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 489                 adc_bst_tlv),
 490         SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
 491                 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
 492                 adc_bst_tlv),
 493
 494         /* I2S2 function select */
 495         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 496                 1, 1),
 497 };
 498
 499 /**
 500  * set_dmic_clk - Set parameter of dmic.
 501  *
 502  * @w: DAPM widget.
 503  * @kcontrol: The kcontrol of this widget.
 504  * @event: Event id.
 505  *
 506  */
 507 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 508         struct snd_kcontrol *kcontrol, int event)
 509 {
 510         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 511         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
 512         int idx = -EINVAL;
 513
 514         idx = rl6231_calc_dmic_clk(rt5645->sysclk);
 515
 516         if (idx < 0)
 517                 dev_err(codec->dev, "Failed to set DMIC clock\n");
 518         else
 519                 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
 520                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 521         return idx;
 522 }
 523
 524 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 525                          struct snd_soc_dapm_widget *sink)
 526 {
 527         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 528         unsigned int val;
 529
 530         val = snd_soc_read(codec, RT5645_GLB_CLK);
 531         val &= RT5645_SCLK_SRC_MASK;
 532         if (val == RT5645_SCLK_SRC_PLL1)
 533                 return 1;
 534         else
 535                 return 0;
 536 }
 537
 538 static int is_using_asrc(struct snd_soc_dapm_widget *source,
 539                          struct snd_soc_dapm_widget *sink)
 540 {
 541         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 542         unsigned int reg, shift, val;
 543
 544         switch (source->shift) {
 545         case 0:
 546                 reg = RT5645_ASRC_3;
 547                 shift = 0;
 548                 break;
 549         case 1:
 550                 reg = RT5645_ASRC_3;
 551                 shift = 4;
 552                 break;
 553         case 3:
 554                 reg = RT5645_ASRC_2;
 555                 shift = 0;
 556                 break;
 557         case 8:
 558                 reg = RT5645_ASRC_2;
 559                 shift = 4;
 560                 break;
 561         case 9:
 562                 reg = RT5645_ASRC_2;
 563                 shift = 8;
 564                 break;
 565         case 10:
 566                 reg = RT5645_ASRC_2;
 567                 shift = 12;
 568                 break;
 569         default:
 570                 return 0;
 571         }
 572
 573         val = (snd_soc_read(codec, reg) >> shift) & 0xf;
 574         switch (val) {
 575         case 1:
 576         case 2:
 577         case 3:
 578         case 4:
 579                 return 1;
 580         default:
 581                 return 0;
 582         }
 583
 584 }
 585
 586 /**
 587  * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
 588  * @codec: SoC audio codec device.
 589  * @filter_mask: mask of filters.
 590  * @clk_src: clock source
 591  *
 592  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
 593  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
 594  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
 595  * ASRC function will track i2s clock and generate a corresponding system clock
 596  * for codec. This function provides an API to select the clock source for a
 597  * set of filters specified by the mask. And the codec driver will turn on ASRC
 598  * for these filters if ASRC is selected as their clock source.
 599  */
 600 int rt5645_sel_asrc_clk_src(struct snd_soc_codec *codec,
 601                 unsigned int filter_mask, unsigned int clk_src)
 602 {
 603         unsigned int asrc2_mask = 0;
 604         unsigned int asrc2_value = 0;
 605         unsigned int asrc3_mask = 0;
 606         unsigned int asrc3_value = 0;
 607
 608         switch (clk_src) {
 609         case RT5645_CLK_SEL_SYS:
 610         case RT5645_CLK_SEL_I2S1_ASRC:
 611         case RT5645_CLK_SEL_I2S2_ASRC:
 612         case RT5645_CLK_SEL_SYS2:
 613                 break;
 614
 615         default:
 616                 return -EINVAL;
 617         }
 618
 619         if (filter_mask & RT5645_DA_STEREO_FILTER) {
 620                 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
 621                 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
 622                         | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
 623         }
 624
 625         if (filter_mask & RT5645_DA_MONO_L_FILTER) {
 626                 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
 627                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
 628                         | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
 629         }
 630
 631         if (filter_mask & RT5645_DA_MONO_R_FILTER) {
 632                 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
 633                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
 634                         | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
 635         }
 636
 637         if (filter_mask & RT5645_AD_STEREO_FILTER) {
 638                 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
 639                 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
 640                         | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
 641         }
 642
 643         if (filter_mask & RT5645_AD_MONO_L_FILTER) {
 644                 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
 645                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
 646                         | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
 647         }
 648
 649         if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
 650                 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
 651                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
 652                         | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
 653         }
 654
 655         if (asrc2_mask)
 656                 snd_soc_update_bits(codec, RT5645_ASRC_2,
 657                         asrc2_mask, asrc2_value);
 658
 659         if (asrc3_mask)
 660                 snd_soc_update_bits(codec, RT5645_ASRC_3,
 661                         asrc3_mask, asrc3_value);
 662
 663         return 0;
 664 }
 665 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
 666
 667 /* Digital Mixer */
 668 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
 669         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
 670                         RT5645_M_ADC_L1_SFT, 1, 1),
 671         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
 672                         RT5645_M_ADC_L2_SFT, 1, 1),
 673 };
 674
 675 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
 676         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
 677                         RT5645_M_ADC_R1_SFT, 1, 1),
 678         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
 679                         RT5645_M_ADC_R2_SFT, 1, 1),
 680 };
 681
 682 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
 683         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
 684                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
 685         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
 686                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
 687 };
 688
 689 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
 690         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
 691                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
 692         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
 693                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
 694 };
 695
 696 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
 697         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
 698                         RT5645_M_ADCMIX_L_SFT, 1, 1),
 699         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
 700                         RT5645_M_DAC1_L_SFT, 1, 1),
 701 };
 702
 703 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
 704         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
 705                         RT5645_M_ADCMIX_R_SFT, 1, 1),
 706         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
 707                         RT5645_M_DAC1_R_SFT, 1, 1),
 708 };
 709
 710 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
 711         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
 712                         RT5645_M_DAC_L1_SFT, 1, 1),
 713         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
 714                         RT5645_M_DAC_L2_SFT, 1, 1),
 715         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
 716                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
 717 };
 718
 719 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
 720         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
 721                         RT5645_M_DAC_R1_SFT, 1, 1),
 722         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
 723                         RT5645_M_DAC_R2_SFT, 1, 1),
 724         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
 725                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
 726 };
 727
 728 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
 729         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
 730                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
 731         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
 732                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
 733         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
 734                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
 735 };
 736
 737 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
 738         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
 739                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
 740         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
 741                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
 742         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
 743                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
 744 };
 745
 746 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
 747         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
 748                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
 749         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
 750                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
 751         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
 752                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
 753 };
 754
 755 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
 756         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
 757                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
 758         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
 759                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
 760         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
 761                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
 762 };
 763
 764 /* Analog Input Mixer */
 765 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
 766         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
 767                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
 768         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
 769                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
 770         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
 771                         RT5645_M_BST2_RM_L_SFT, 1, 1),
 772         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
 773                         RT5645_M_BST1_RM_L_SFT, 1, 1),
 774         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
 775                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
 776 };
 777
 778 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
 779         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
 780                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
 781         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
 782                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
 783         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
 784                         RT5645_M_BST2_RM_R_SFT, 1, 1),
 785         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
 786                         RT5645_M_BST1_RM_R_SFT, 1, 1),
 787         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
 788                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
 789 };
 790
 791 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
 792         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
 793                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
 794         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
 795                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
 796         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
 797                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
 798         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
 799                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
 800 };
 801
 802 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
 803         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
 804                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
 805         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
 806                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
 807         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
 808                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
 809         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
 810                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
 811 };
 812
 813 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
 814         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
 815                         RT5645_M_BST1_OM_L_SFT, 1, 1),
 816         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
 817                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
 818         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
 819                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
 820         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
 821                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
 822 };
 823
 824 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
 825         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
 826                         RT5645_M_BST2_OM_R_SFT, 1, 1),
 827         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
 828                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
 829         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
 830                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
 831         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
 832                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
 833 };
 834
 835 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
 836         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
 837                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
 838         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
 839                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
 840         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
 841                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
 842         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
 843                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
 844 };
 845
 846 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
 847         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
 848                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
 849         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
 850                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
 851 };
 852
 853 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
 854         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
 855                         RT5645_M_DAC1_HM_SFT, 1, 1),
 856         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
 857                         RT5645_M_HPVOL_HM_SFT, 1, 1),
 858 };
 859
 860 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
 861         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
 862                         RT5645_M_DAC1_HV_SFT, 1, 1),
 863         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
 864                         RT5645_M_DAC2_HV_SFT, 1, 1),
 865         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
 866                         RT5645_M_IN_HV_SFT, 1, 1),
 867         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
 868                         RT5645_M_BST1_HV_SFT, 1, 1),
 869 };
 870
 871 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
 872         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
 873                         RT5645_M_DAC1_HV_SFT, 1, 1),
 874         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
 875                         RT5645_M_DAC2_HV_SFT, 1, 1),
 876         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
 877                         RT5645_M_IN_HV_SFT, 1, 1),
 878         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
 879                         RT5645_M_BST2_HV_SFT, 1, 1),
 880 };
 881
 882 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
 883         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
 884                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
 885         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
 886                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
 887         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
 888                         RT5645_M_OV_L_LM_SFT, 1, 1),
 889         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
 890                         RT5645_M_OV_R_LM_SFT, 1, 1),
 891 };
 892
 893 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
 894 static const char * const rt5645_dac1_src[] = {
 895         "IF1 DAC", "IF2 DAC", "IF3 DAC"
 896 };
 897
 898 static SOC_ENUM_SINGLE_DECL(
 899         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
 900         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
 901
 902 static const struct snd_kcontrol_new rt5645_dac1l_mux =
 903         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
 904
 905 static SOC_ENUM_SINGLE_DECL(
 906         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
 907         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
 908
 909 static const struct snd_kcontrol_new rt5645_dac1r_mux =
 910         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
 911
 912 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
 913 static const char * const rt5645_dac12_src[] = {
 914         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
 915 };
 916
 917 static SOC_ENUM_SINGLE_DECL(
 918         rt5645_dac2l_enum, RT5645_DAC_CTRL,
 919         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
 920
 921 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
 922         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
 923
 924 static const char * const rt5645_dacr2_src[] = {
 925         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
 926 };
 927
 928 static SOC_ENUM_SINGLE_DECL(
 929         rt5645_dac2r_enum, RT5645_DAC_CTRL,
 930         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
 931
 932 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
 933         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
 934
 935
 936 /* INL/R source */
 937 static const char * const rt5645_inl_src[] = {
 938         "IN2P", "MonoP"
 939 };
 940
 941 static SOC_ENUM_SINGLE_DECL(
 942         rt5645_inl_enum, RT5645_INL1_INR1_VOL,
 943         RT5645_INL_SEL_SFT, rt5645_inl_src);
 944
 945 static const struct snd_kcontrol_new rt5645_inl_mux =
 946         SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
 947
 948 static const char * const rt5645_inr_src[] = {
 949         "IN2N", "MonoN"
 950 };
 951
 952 static SOC_ENUM_SINGLE_DECL(
 953         rt5645_inr_enum, RT5645_INL1_INR1_VOL,
 954         RT5645_INR_SEL_SFT, rt5645_inr_src);
 955
 956 static const struct snd_kcontrol_new rt5645_inr_mux =
 957         SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
 958
 959 /* Stereo1 ADC source */
 960 /* MX-27 [12] */
 961 static const char * const rt5645_stereo_adc1_src[] = {
 962         "DAC MIX", "ADC"
 963 };
 964
 965 static SOC_ENUM_SINGLE_DECL(
 966         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
 967         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
 968
 969 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
 970         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
 971
 972 /* MX-27 [11] */
 973 static const char * const rt5645_stereo_adc2_src[] = {
 974         "DAC MIX", "DMIC"
 975 };
 976
 977 static SOC_ENUM_SINGLE_DECL(
 978         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
 979         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
 980
 981 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
 982         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
 983
 984 /* MX-27 [8] */
 985 static const char * const rt5645_stereo_dmic_src[] = {
 986         "DMIC1", "DMIC2"
 987 };
 988
 989 static SOC_ENUM_SINGLE_DECL(
 990         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
 991         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
 992
 993 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
 994         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
 995
 996 /* Mono ADC source */
 997 /* MX-28 [12] */
 998 static const char * const rt5645_mono_adc_l1_src[] = {
 999         "Mono DAC MIXL", "ADC"
1000 };
1001
1002 static SOC_ENUM_SINGLE_DECL(
1003         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1004         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1005
1006 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1007         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1008 /* MX-28 [11] */
1009 static const char * const rt5645_mono_adc_l2_src[] = {
1010         "Mono DAC MIXL", "DMIC"
1011 };
1012
1013 static SOC_ENUM_SINGLE_DECL(
1014         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1015         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1016
1017 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1018         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1019
1020 /* MX-28 [8] */
1021 static const char * const rt5645_mono_dmic_src[] = {
1022         "DMIC1", "DMIC2"
1023 };
1024
1025 static SOC_ENUM_SINGLE_DECL(
1026         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1027         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1028
1029 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1030         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1031 /* MX-28 [1:0] */
1032 static SOC_ENUM_SINGLE_DECL(
1033         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1034         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1035
1036 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1037         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1038 /* MX-28 [4] */
1039 static const char * const rt5645_mono_adc_r1_src[] = {
1040         "Mono DAC MIXR", "ADC"
1041 };
1042
1043 static SOC_ENUM_SINGLE_DECL(
1044         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1045         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1046
1047 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1048         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1049 /* MX-28 [3] */
1050 static const char * const rt5645_mono_adc_r2_src[] = {
1051         "Mono DAC MIXR", "DMIC"
1052 };
1053
1054 static SOC_ENUM_SINGLE_DECL(
1055         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1056         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1057
1058 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1059         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1060
1061 /* MX-77 [9:8] */
1062 static const char * const rt5645_if1_adc_in_src[] = {
1063         "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1064         "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1065 };
1066
1067 static SOC_ENUM_SINGLE_DECL(
1068         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1069         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1070
1071 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1072         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1073
1074 /* MX-78 [4:0] */
1075 static const char * const rt5650_if1_adc_in_src[] = {
1076         "IF_ADC1/IF_ADC2/DAC_REF/Null",
1077         "IF_ADC1/IF_ADC2/Null/DAC_REF",
1078         "IF_ADC1/DAC_REF/IF_ADC2/Null",
1079         "IF_ADC1/DAC_REF/Null/IF_ADC2",
1080         "IF_ADC1/Null/DAC_REF/IF_ADC2",
1081         "IF_ADC1/Null/IF_ADC2/DAC_REF",
1082
1083         "IF_ADC2/IF_ADC1/DAC_REF/Null",
1084         "IF_ADC2/IF_ADC1/Null/DAC_REF",
1085         "IF_ADC2/DAC_REF/IF_ADC1/Null",
1086         "IF_ADC2/DAC_REF/Null/IF_ADC1",
1087         "IF_ADC2/Null/DAC_REF/IF_ADC1",
1088         "IF_ADC2/Null/IF_ADC1/DAC_REF",
1089
1090         "DAC_REF/IF_ADC1/IF_ADC2/Null",
1091         "DAC_REF/IF_ADC1/Null/IF_ADC2",
1092         "DAC_REF/IF_ADC2/IF_ADC1/Null",
1093         "DAC_REF/IF_ADC2/Null/IF_ADC1",
1094         "DAC_REF/Null/IF_ADC1/IF_ADC2",
1095         "DAC_REF/Null/IF_ADC2/IF_ADC1",
1096
1097         "Null/IF_ADC1/IF_ADC2/DAC_REF",
1098         "Null/IF_ADC1/DAC_REF/IF_ADC2",
1099         "Null/IF_ADC2/IF_ADC1/DAC_REF",
1100         "Null/IF_ADC2/DAC_REF/IF_ADC1",
1101         "Null/DAC_REF/IF_ADC1/IF_ADC2",
1102         "Null/DAC_REF/IF_ADC2/IF_ADC1",
1103 };
1104
1105 static SOC_ENUM_SINGLE_DECL(
1106         rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1107         0, rt5650_if1_adc_in_src);
1108
1109 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1110         SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1111
1112 /* MX-78 [15:14][13:12][11:10] */
1113 static const char * const rt5645_tdm_adc_swap_select[] = {
1114         "L/R", "R/L", "L/L", "R/R"
1115 };
1116
1117 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1118         RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1119
1120 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1121         SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1122
1123 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1124         RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1125
1126 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1127         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1128
1129 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1130         RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1131
1132 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1133         SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1134
1135 /* MX-77 [7:6][5:4][3:2] */
1136 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1137         RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1138
1139 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1140         SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1141
1142 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1143         RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1144
1145 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1146         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1147
1148 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1149         RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1150
1151 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1152         SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1153
1154 /* MX-79 [14:12][10:8][6:4][2:0] */
1155 static const char * const rt5645_tdm_dac_swap_select[] = {
1156         "Slot0", "Slot1", "Slot2", "Slot3"
1157 };
1158
1159 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1160         RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1161
1162 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1163         SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1164
1165 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1166         RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1167
1168 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1169         SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1170
1171 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1172         RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1173
1174 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1175         SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1176
1177 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1178         RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1179
1180 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1181         SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1182
1183 /* MX-7a [14:12][10:8][6:4][2:0] */
1184 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1185         RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1186
1187 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1188         SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1189
1190 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1191         RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1192
1193 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1194         SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1195
1196 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1197         RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1198
1199 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1200         SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1201
1202 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1203         RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1204
1205 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1206         SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1207
1208 /* MX-2d [3] [2] */
1209 static const char * const rt5650_a_dac1_src[] = {
1210         "DAC1", "Stereo DAC Mixer"
1211 };
1212
1213 static SOC_ENUM_SINGLE_DECL(
1214         rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1215         RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1216
1217 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1218         SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1219
1220 static SOC_ENUM_SINGLE_DECL(
1221         rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1222         RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1223
1224 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1225         SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1226
1227 /* MX-2d [1] [0] */
1228 static const char * const rt5650_a_dac2_src[] = {
1229         "Stereo DAC Mixer", "Mono DAC Mixer"
1230 };
1231
1232 static SOC_ENUM_SINGLE_DECL(
1233         rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1234         RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1235
1236 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1237         SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1238
1239 static SOC_ENUM_SINGLE_DECL(
1240         rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1241         RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1242
1243 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1244         SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1245
1246 /* MX-2F [13:12] */
1247 static const char * const rt5645_if2_adc_in_src[] = {
1248         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1249 };
1250
1251 static SOC_ENUM_SINGLE_DECL(
1252         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1253         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1254
1255 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1256         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1257
1258 /* MX-2F [1:0] */
1259 static const char * const rt5645_if3_adc_in_src[] = {
1260         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1261 };
1262
1263 static SOC_ENUM_SINGLE_DECL(
1264         rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
1265         RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
1266
1267 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
1268         SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
1269
1270 /* MX-31 [15] [13] [11] [9] */
1271 static const char * const rt5645_pdm_src[] = {
1272         "Mono DAC", "Stereo DAC"
1273 };
1274
1275 static SOC_ENUM_SINGLE_DECL(
1276         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1277         RT5645_PDM1_L_SFT, rt5645_pdm_src);
1278
1279 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1280         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1281
1282 static SOC_ENUM_SINGLE_DECL(
1283         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1284         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1285
1286 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1287         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1288
1289 /* MX-9D [9:8] */
1290 static const char * const rt5645_vad_adc_src[] = {
1291         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1292 };
1293
1294 static SOC_ENUM_SINGLE_DECL(
1295         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1296         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1297
1298 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1299         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1300
1301 static const struct snd_kcontrol_new spk_l_vol_control =
1302         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1303                 RT5645_L_MUTE_SFT, 1, 1);
1304
1305 static const struct snd_kcontrol_new spk_r_vol_control =
1306         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1307                 RT5645_R_MUTE_SFT, 1, 1);
1308
1309 static const struct snd_kcontrol_new hp_l_vol_control =
1310         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1311                 RT5645_L_MUTE_SFT, 1, 1);
1312
1313 static const struct snd_kcontrol_new hp_r_vol_control =
1314         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1315                 RT5645_R_MUTE_SFT, 1, 1);
1316
1317 static const struct snd_kcontrol_new pdm1_l_vol_control =
1318         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1319                 RT5645_M_PDM1_L, 1, 1);
1320
1321 static const struct snd_kcontrol_new pdm1_r_vol_control =
1322         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1323                 RT5645_M_PDM1_R, 1, 1);
1324
1325 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1326 {
1327         static int hp_amp_power_count;
1328         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1329
1330         if (on) {
1331                 if (hp_amp_power_count <= 0) {
1332                         /* depop parameters */
1333                         snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1334                                 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1335                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1336                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1337                                 RT5645_HP_DCC_INT1, 0x9f01);
1338                         mdelay(150);
1339                         /* headphone amp power on */
1340                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1341                                 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1342                         snd_soc_update_bits(codec, RT5645_PWR_VOL,
1343                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1344                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1345                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1346                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1347                                 RT5645_PWR_HA,
1348                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1349                                 RT5645_PWR_HA);
1350                         mdelay(5);
1351                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1352                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1353                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1354
1355                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1356                                 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1357                                 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1358                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1359                                 0x14, 0x1aaa);
1360                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1361                                 0x24, 0x0430);
1362                 }
1363                 hp_amp_power_count++;
1364         } else {
1365                 hp_amp_power_count--;
1366                 if (hp_amp_power_count <= 0) {
1367                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1368                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1369                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1370                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1371                         /* headphone amp power down */
1372                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1373                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1374                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1375                                 RT5645_PWR_HA, 0);
1376                         snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1377                                 RT5645_DEPOP_MASK, 0);
1378                 }
1379         }
1380 }
1381
1382 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1383         struct snd_kcontrol *kcontrol, int event)
1384 {
1385         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1386         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1387
1388         switch (event) {
1389         case SND_SOC_DAPM_POST_PMU:
1390                 hp_amp_power(codec, 1);
1391                 /* headphone unmute sequence */
1392                 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1393                         snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1394                 } else {
1395                         snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1396                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1397                                 RT5645_CP_FQ3_MASK,
1398                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1399                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1400                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1401                 }
1402                 regmap_write(rt5645->regmap,
1403                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1404                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1405                         RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1406                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1407                         RT5645_RSTN_MASK, RT5645_RSTN_EN);
1408                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1409                         RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1410                         RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1411                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1412                 msleep(40);
1413                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1414                         RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1415                         RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1416                         RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1417                 break;
1418
1419         case SND_SOC_DAPM_PRE_PMD:
1420                 /* headphone mute sequence */
1421                 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1422                         snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1423                 } else {
1424                         snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1425                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1426                                 RT5645_CP_FQ3_MASK,
1427                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1428                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1429                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1430                 }
1431                 regmap_write(rt5645->regmap,
1432                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1433                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1434                         RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1435                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1436                         RT5645_RSTP_MASK, RT5645_RSTP_EN);
1437                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1438                         RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1439                         RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1440                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1441                 msleep(30);
1442                 hp_amp_power(codec, 0);
1443                 break;
1444
1445         default:
1446                 return 0;
1447         }
1448
1449         return 0;
1450 }
1451
1452 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1453         struct snd_kcontrol *kcontrol, int event)
1454 {
1455         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1456
1457         switch (event) {
1458         case SND_SOC_DAPM_POST_PMU:
1459                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1460                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1461                         RT5645_PWR_CLS_D_L,
1462                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1463                         RT5645_PWR_CLS_D_L);
1464                 break;
1465
1466         case SND_SOC_DAPM_PRE_PMD:
1467                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1468                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1469                         RT5645_PWR_CLS_D_L, 0);
1470                 break;
1471
1472         default:
1473                 return 0;
1474         }
1475
1476         return 0;
1477 }
1478
1479 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1480         struct snd_kcontrol *kcontrol, int event)
1481 {
1482         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1483
1484         switch (event) {
1485         case SND_SOC_DAPM_POST_PMU:
1486                 hp_amp_power(codec, 1);
1487                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1488                         RT5645_PWR_LM, RT5645_PWR_LM);
1489                 snd_soc_update_bits(codec, RT5645_LOUT1,
1490                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1491                 break;
1492
1493         case SND_SOC_DAPM_PRE_PMD:
1494                 snd_soc_update_bits(codec, RT5645_LOUT1,
1495                         RT5645_L_MUTE | RT5645_R_MUTE,
1496                         RT5645_L_MUTE | RT5645_R_MUTE);
1497                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1498                         RT5645_PWR_LM, 0);
1499                 hp_amp_power(codec, 0);
1500                 break;
1501
1502         default:
1503                 return 0;
1504         }
1505
1506         return 0;
1507 }
1508
1509 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1510         struct snd_kcontrol *kcontrol, int event)
1511 {
1512         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1513
1514         switch (event) {
1515         case SND_SOC_DAPM_POST_PMU:
1516                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1517                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1518                 break;
1519
1520         case SND_SOC_DAPM_PRE_PMD:
1521                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1522                         RT5645_PWR_BST2_P, 0);
1523                 break;
1524
1525         default:
1526                 return 0;
1527         }
1528
1529         return 0;
1530 }
1531
1532 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1533         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1534                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1535         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1536                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1537
1538         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1539                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1540         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1541                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1542
1543         /* ASRC */
1544         SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1545                               11, 0, NULL, 0),
1546         SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1547                               12, 0, NULL, 0),
1548         SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1549                               10, 0, NULL, 0),
1550         SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1551                               9, 0, NULL, 0),
1552         SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1553                               8, 0, NULL, 0),
1554         SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1555                               7, 0, NULL, 0),
1556         SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1557                               5, 0, NULL, 0),
1558         SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1559                               4, 0, NULL, 0),
1560         SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1561                               3, 0, NULL, 0),
1562         SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1563                               1, 0, NULL, 0),
1564         SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1565                               0, 0, NULL, 0),
1566
1567         /* Input Side */
1568         /* micbias */
1569         SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1570                         RT5645_PWR_MB1_BIT, 0),
1571         SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1572                         RT5645_PWR_MB2_BIT, 0),
1573         /* Input Lines */
1574         SND_SOC_DAPM_INPUT("DMIC L1"),
1575         SND_SOC_DAPM_INPUT("DMIC R1"),
1576         SND_SOC_DAPM_INPUT("DMIC L2"),
1577         SND_SOC_DAPM_INPUT("DMIC R2"),
1578
1579         SND_SOC_DAPM_INPUT("IN1P"),
1580         SND_SOC_DAPM_INPUT("IN1N"),
1581         SND_SOC_DAPM_INPUT("IN2P"),
1582         SND_SOC_DAPM_INPUT("IN2N"),
1583
1584         SND_SOC_DAPM_INPUT("Haptic Generator"),
1585
1586         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1587         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1588         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1589                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1590         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1591                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1592         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1593                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1594         /* Boost */
1595         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1596                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1597         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1598                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1599                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1600         /* Input Volume */
1601         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1602                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1603         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1604                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1605         /* REC Mixer */
1606         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1607                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1608         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1609                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1610         /* ADCs */
1611         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1612         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1613
1614         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1615                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1616         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1617                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1618
1619         /* ADC Mux */
1620         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1621                 &rt5645_sto1_dmic_mux),
1622         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1623                 &rt5645_sto_adc2_mux),
1624         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1625                 &rt5645_sto_adc2_mux),
1626         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1627                 &rt5645_sto_adc1_mux),
1628         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1629                 &rt5645_sto_adc1_mux),
1630         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1631                 &rt5645_mono_dmic_l_mux),
1632         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1633                 &rt5645_mono_dmic_r_mux),
1634         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1635                 &rt5645_mono_adc_l2_mux),
1636         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1637                 &rt5645_mono_adc_l1_mux),
1638         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1639                 &rt5645_mono_adc_r1_mux),
1640         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1641                 &rt5645_mono_adc_r2_mux),
1642         /* ADC Mixer */
1643
1644         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1645                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1646         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1647                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1648                 NULL, 0),
1649         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1650                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1651                 NULL, 0),
1652         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1653                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1654         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1655                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1656                 NULL, 0),
1657         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1658                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1659         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1660                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1661                 NULL, 0),
1662
1663         /* ADC PGA */
1664         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1665         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1666         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1667         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1668         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1669         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1670         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1671         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1672         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1673         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1674
1675         /* IF1 2 Mux */
1676         SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
1677                 0, 0, &rt5645_if1_adc1_in_mux),
1678         SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
1679                 0, 0, &rt5645_if1_adc2_in_mux),
1680         SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
1681                 0, 0, &rt5645_if1_adc3_in_mux),
1682         SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
1683                 0, 0, &rt5645_if1_adc_in_mux),
1684
1685         SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
1686                 0, 0, &rt5650_if1_adc1_in_mux),
1687         SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
1688                 0, 0, &rt5650_if1_adc2_in_mux),
1689         SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
1690                 0, 0, &rt5650_if1_adc3_in_mux),
1691         SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
1692                 0, 0, &rt5650_if1_adc_in_mux),
1693
1694         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1695                 0, 0, &rt5645_if2_adc_in_mux),
1696
1697         /* Digital Interface */
1698         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1699                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1700         SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
1701         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1702         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1703         SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1704         SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
1705                 &rt5645_if1_dac0_tdm_sel_mux),
1706         SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
1707                 &rt5645_if1_dac1_tdm_sel_mux),
1708         SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
1709                 &rt5645_if1_dac2_tdm_sel_mux),
1710         SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
1711                 &rt5645_if1_dac3_tdm_sel_mux),
1712         SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
1713                 &rt5650_if1_dac0_tdm_sel_mux),
1714         SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
1715                 &rt5650_if1_dac1_tdm_sel_mux),
1716         SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
1717                 &rt5650_if1_dac2_tdm_sel_mux),
1718         SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
1719                 &rt5650_if1_dac3_tdm_sel_mux),
1720         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1721         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1722         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1723         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1724                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1725         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1726         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1727         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1728         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1729
1730         /* Digital Interface Select */
1731         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1732                 0, 0, &rt5645_vad_adc_mux),
1733
1734         /* Audio Interface */
1735         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1736         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1737         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1738         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1739
1740         /* Output Side */
1741         /* DAC mixer before sound effect  */
1742         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1743                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1744         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1745                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1746
1747         /* DAC2 channel Mux */
1748         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1749         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1750         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1751                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1752         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1753                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1754
1755         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1756         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1757
1758         /* DAC Mixer */
1759         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1760                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1761         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1762                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1763         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1764                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1765         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1766                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1767         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1768                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1769         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1770                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1771         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1772                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1773         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1774                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1775         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1776                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1777
1778         /* DACs */
1779         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1780                 0),
1781         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1782                 0),
1783         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1784                 0),
1785         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1786                 0),
1787         /* OUT Mixer */
1788         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1789                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1790         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1791                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1792         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1793                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1794         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1795                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1796         /* Ouput Volume */
1797         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1798                 &spk_l_vol_control),
1799         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1800                 &spk_r_vol_control),
1801         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1802                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1803         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1804                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1805         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1806                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1807         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1808                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1809         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1810         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1811         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1812         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1813         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1814
1815         /* HPO/LOUT/Mono Mixer */
1816         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1817                 ARRAY_SIZE(rt5645_spo_l_mix)),
1818         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1819                 ARRAY_SIZE(rt5645_spo_r_mix)),
1820         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1821                 ARRAY_SIZE(rt5645_hpo_mix)),
1822         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1823                 ARRAY_SIZE(rt5645_lout_mix)),
1824
1825         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1826                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1827         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1828                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1829         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1830                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1831
1832         /* PDM */
1833         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1834                 0, NULL, 0),
1835         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1836         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1837
1838         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1839         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1840
1841         /* Output Lines */
1842         SND_SOC_DAPM_OUTPUT("HPOL"),
1843         SND_SOC_DAPM_OUTPUT("HPOR"),
1844         SND_SOC_DAPM_OUTPUT("LOUTL"),
1845         SND_SOC_DAPM_OUTPUT("LOUTR"),
1846         SND_SOC_DAPM_OUTPUT("PDM1L"),
1847         SND_SOC_DAPM_OUTPUT("PDM1R"),
1848         SND_SOC_DAPM_OUTPUT("SPOL"),
1849         SND_SOC_DAPM_OUTPUT("SPOR"),
1850 };
1851
1852 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
1853         SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
1854                 0, 0, &rt5650_a_dac1_l_mux),
1855         SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
1856                 0, 0, &rt5650_a_dac1_r_mux),
1857         SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
1858                 0, 0, &rt5650_a_dac2_l_mux),
1859         SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
1860                 0, 0, &rt5650_a_dac2_r_mux),
1861 };
1862
1863 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1864         { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1865         { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1866         { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1867         { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1868         { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1869         { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
1870
1871         { "I2S1", NULL, "I2S1 ASRC" },
1872         { "I2S2", NULL, "I2S2 ASRC" },
1873
1874         { "IN1P", NULL, "LDO2" },
1875         { "IN2P", NULL, "LDO2" },
1876
1877         { "DMIC1", NULL, "DMIC L1" },
1878         { "DMIC1", NULL, "DMIC R1" },
1879         { "DMIC2", NULL, "DMIC L2" },
1880         { "DMIC2", NULL, "DMIC R2" },
1881
1882         { "BST1", NULL, "IN1P" },
1883         { "BST1", NULL, "IN1N" },
1884         { "BST1", NULL, "JD Power" },
1885         { "BST1", NULL, "Mic Det Power" },
1886         { "BST2", NULL, "IN2P" },
1887         { "BST2", NULL, "IN2N" },
1888
1889         { "INL VOL", NULL, "IN2P" },
1890         { "INR VOL", NULL, "IN2N" },
1891
1892         { "RECMIXL", "HPOL Switch", "HPOL" },
1893         { "RECMIXL", "INL Switch", "INL VOL" },
1894         { "RECMIXL", "BST2 Switch", "BST2" },
1895         { "RECMIXL", "BST1 Switch", "BST1" },
1896         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1897
1898         { "RECMIXR", "HPOR Switch", "HPOR" },
1899         { "RECMIXR", "INR Switch", "INR VOL" },
1900         { "RECMIXR", "BST2 Switch", "BST2" },
1901         { "RECMIXR", "BST1 Switch", "BST1" },
1902         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1903
1904         { "ADC L", NULL, "RECMIXL" },
1905         { "ADC L", NULL, "ADC L power" },
1906         { "ADC R", NULL, "RECMIXR" },
1907         { "ADC R", NULL, "ADC R power" },
1908
1909         {"DMIC L1", NULL, "DMIC CLK"},
1910         {"DMIC L1", NULL, "DMIC1 Power"},
1911         {"DMIC R1", NULL, "DMIC CLK"},
1912         {"DMIC R1", NULL, "DMIC1 Power"},
1913         {"DMIC L2", NULL, "DMIC CLK"},
1914         {"DMIC L2", NULL, "DMIC2 Power"},
1915         {"DMIC R2", NULL, "DMIC CLK"},
1916         {"DMIC R2", NULL, "DMIC2 Power"},
1917
1918         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1919         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1920         { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
1921
1922         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1923         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1924         { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
1925
1926         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1927         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1928         { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
1929
1930         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1931         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1932         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1933         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1934
1935         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1936         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1937         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1938         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1939
1940         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1941         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1942         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1943         { "Mono ADC L1 Mux", "ADC", "ADC L" },
1944
1945         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1946         { "Mono ADC R1 Mux", "ADC", "ADC R" },
1947         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1948         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1949
1950         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1951         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1952         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1953         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1954
1955         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1956         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1957         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1958
1959         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1960         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1961         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1962
1963         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1964         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1965         { "Mono ADC MIXL", NULL, "adc mono left filter" },
1966         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1967
1968         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1969         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1970         { "Mono ADC MIXR", NULL, "adc mono right filter" },
1971         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1972
1973         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1974         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1975         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1976
1977         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1978         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1979         { "IF_ADC2", NULL, "Mono ADC MIXL" },
1980         { "IF_ADC2", NULL, "Mono ADC MIXR" },
1981         { "VAD_ADC", NULL, "VAD ADC Mux" },
1982
1983         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1984         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1985         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1986
1987         { "IF1 ADC", NULL, "I2S1" },
1988         { "IF2 ADC", NULL, "I2S2" },
1989         { "IF2 ADC", NULL, "IF2 ADC Mux" },
1990
1991         { "AIF2TX", NULL, "IF2 ADC" },
1992
1993         { "IF1 DAC0", NULL, "AIF1RX" },
1994         { "IF1 DAC1", NULL, "AIF1RX" },
1995         { "IF1 DAC2", NULL, "AIF1RX" },
1996         { "IF1 DAC3", NULL, "AIF1RX" },
1997         { "IF2 DAC", NULL, "AIF2RX" },
1998
1999         { "IF1 DAC0", NULL, "I2S1" },
2000         { "IF1 DAC1", NULL, "I2S1" },
2001         { "IF1 DAC2", NULL, "I2S1" },
2002         { "IF1 DAC3", NULL, "I2S1" },
2003         { "IF2 DAC", NULL, "I2S2" },
2004
2005         { "IF2 DAC L", NULL, "IF2 DAC" },
2006         { "IF2 DAC R", NULL, "IF2 DAC" },
2007
2008         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2009         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2010
2011         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2012         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2013         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2014         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2015         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2016         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2017
2018         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2019         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2020         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2021         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2022         { "DAC L2 Volume", NULL, "dac mono left filter" },
2023
2024         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2025         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2026         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2027         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2028         { "DAC R2 Volume", NULL, "dac mono right filter" },
2029
2030         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2031         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2032         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2033         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2034         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2035         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2036         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2037         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2038
2039         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2040         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2041         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2042         { "Mono DAC MIXL", NULL, "dac mono left filter" },
2043         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2044         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2045         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2046         { "Mono DAC MIXR", NULL, "dac mono right filter" },
2047
2048         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2049         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2050         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2051         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2052         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2053         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2054
2055         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2056         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2057         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2058         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2059
2060         { "SPK MIXL", "BST1 Switch", "BST1" },
2061         { "SPK MIXL", "INL Switch", "INL VOL" },
2062         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2063         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2064         { "SPK MIXR", "BST2 Switch", "BST2" },
2065         { "SPK MIXR", "INR Switch", "INR VOL" },
2066         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2067         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2068
2069         { "OUT MIXL", "BST1 Switch", "BST1" },
2070         { "OUT MIXL", "INL Switch", "INL VOL" },
2071         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2072         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2073
2074         { "OUT MIXR", "BST2 Switch", "BST2" },
2075         { "OUT MIXR", "INR Switch", "INR VOL" },
2076         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2077         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2078
2079         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2080         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2081         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2082         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2083         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2084         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2085         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2086         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2087         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2088         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2089
2090         { "DAC 2", NULL, "DAC L2" },
2091         { "DAC 2", NULL, "DAC R2" },
2092         { "DAC 1", NULL, "DAC L1" },
2093         { "DAC 1", NULL, "DAC R1" },
2094         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2095         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2096         { "HPOVOL", NULL, "HPOVOL L" },
2097         { "HPOVOL", NULL, "HPOVOL R" },
2098         { "HPO MIX", "DAC1 Switch", "DAC 1" },
2099         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2100
2101         { "SPKVOL L", "Switch", "SPK MIXL" },
2102         { "SPKVOL R", "Switch", "SPK MIXR" },
2103
2104         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2105         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2106         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2107         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2108         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2109         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2110
2111         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2112         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2113         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2114         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2115
2116         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2117         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2118         { "PDM1 L Mux", NULL, "PDM1 Power" },
2119         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2120         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2121         { "PDM1 R Mux", NULL, "PDM1 Power" },
2122
2123         { "HP amp", NULL, "HPO MIX" },
2124         { "HP amp", NULL, "JD Power" },
2125         { "HP amp", NULL, "Mic Det Power" },
2126         { "HP amp", NULL, "LDO2" },
2127         { "HPOL", NULL, "HP amp" },
2128         { "HPOR", NULL, "HP amp" },
2129
2130         { "LOUT amp", NULL, "LOUT MIX" },
2131         { "LOUTL", NULL, "LOUT amp" },
2132         { "LOUTR", NULL, "LOUT amp" },
2133
2134         { "PDM1 L", "Switch", "PDM1 L Mux" },
2135         { "PDM1 R", "Switch", "PDM1 R Mux" },
2136
2137         { "PDM1L", NULL, "PDM1 L" },
2138         { "PDM1R", NULL, "PDM1 R" },
2139
2140         { "SPK amp", NULL, "SPOL MIX" },
2141         { "SPK amp", NULL, "SPOR MIX" },
2142         { "SPOL", NULL, "SPK amp" },
2143         { "SPOR", NULL, "SPK amp" },
2144 };
2145
2146 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2147         { "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2148         { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2149         { "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2150         { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2151
2152         { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2153         { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2154         { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2155         { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2156
2157         { "DAC L1", NULL, "A DAC1 L Mux" },
2158         { "DAC R1", NULL, "A DAC1 R Mux" },
2159         { "DAC L2", NULL, "A DAC2 L Mux" },
2160         { "DAC R2", NULL, "A DAC2 R Mux" },
2161
2162         { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2163         { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2164         { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2165         { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2166
2167         { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2168         { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2169         { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2170         { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2171
2172         { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2173         { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2174         { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2175         { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2176
2177         { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2178         { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2179         { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2180
2181         { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2182         { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2183         { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2184         { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2185         { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2186         { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2187
2188         { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2189         { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2190         { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2191         { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2192         { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2193         { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2194
2195         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2196         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2197         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2198         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2199         { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2200         { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2201
2202         { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2203         { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2204         { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2205         { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2206         { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2207         { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2208         { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2209
2210         { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2211         { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2212         { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2213         { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2214
2215         { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2216         { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2217         { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2218         { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2219
2220         { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2221         { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2222         { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2223         { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2224
2225         { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2226         { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2227         { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2228         { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2229
2230         { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2231         { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2232
2233         { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2234         { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2235 };
2236
2237 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2238         { "DAC L1", NULL, "Stereo DAC MIXL" },
2239         { "DAC R1", NULL, "Stereo DAC MIXR" },
2240         { "DAC L2", NULL, "Mono DAC MIXL" },
2241         { "DAC R2", NULL, "Mono DAC MIXR" },
2242
2243         { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2244         { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2245         { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2246         { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2247
2248         { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2249         { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2250         { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2251         { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2252
2253         { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2254         { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2255         { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2256         { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2257
2258         { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2259         { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2260         { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2261
2262         { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2263         { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2264         { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2265         { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2266         { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2267
2268         { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2269         { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2270         { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2271         { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2272
2273         { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2274         { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2275         { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2276         { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2277
2278         { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2279         { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2280         { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2281         { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2282
2283         { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2284         { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2285         { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2286         { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2287
2288         { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2289         { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2290
2291         { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2292         { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2293 };
2294
2295 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2296         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2297 {
2298         struct snd_soc_codec *codec = dai->codec;
2299         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2300         unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2301         int pre_div, bclk_ms, frame_size;
2302
2303         rt5645->lrck[dai->id] = params_rate(params);
2304         pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2305         if (pre_div < 0) {
2306                 dev_err(codec->dev, "Unsupported clock setting\n");
2307                 return -EINVAL;
2308         }
2309         frame_size = snd_soc_params_to_frame_size(params);
2310         if (frame_size < 0) {
2311                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2312                 return -EINVAL;
2313         }
2314
2315         switch (rt5645->codec_type) {
2316         case CODEC_TYPE_RT5650:
2317                 dl_sft = 4;
2318                 break;
2319         default:
2320                 dl_sft = 2;
2321                 break;
2322         }
2323
2324         bclk_ms = frame_size > 32;
2325         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2326
2327         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2328                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2329         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2330                                 bclk_ms, pre_div, dai->id);
2331
2332         switch (params_width(params)) {
2333         case 16:
2334                 break;
2335         case 20:
2336                 val_len = 0x1;
2337                 break;
2338         case 24:
2339                 val_len = 0x2;
2340                 break;
2341         case 8:
2342                 val_len = 0x3;
2343                 break;
2344         default:
2345                 return -EINVAL;
2346         }
2347
2348         switch (dai->id) {
2349         case RT5645_AIF1:
2350                 mask_clk = RT5645_I2S_PD1_MASK;
2351                 val_clk = pre_div << RT5645_I2S_PD1_SFT;
2352                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2353                         (0x3 << dl_sft), (val_len << dl_sft));
2354                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2355                 break;
2356         case  RT5645_AIF2:
2357                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2358                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2359                         pre_div << RT5645_I2S_PD2_SFT;
2360                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2361                         (0x3 << dl_sft), (val_len << dl_sft));
2362                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2363                 break;
2364         default:
2365                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2366                 return -EINVAL;
2367         }
2368
2369         return 0;
2370 }
2371
2372 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2373 {
2374         struct snd_soc_codec *codec = dai->codec;
2375         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2376         unsigned int reg_val = 0, pol_sft;
2377
2378         switch (rt5645->codec_type) {
2379         case CODEC_TYPE_RT5650:
2380                 pol_sft = 8;
2381                 break;
2382         default:
2383                 pol_sft = 7;
2384                 break;
2385         }
2386
2387         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2388         case SND_SOC_DAIFMT_CBM_CFM:
2389                 rt5645->master[dai->id] = 1;
2390                 break;
2391         case SND_SOC_DAIFMT_CBS_CFS:
2392                 reg_val |= RT5645_I2S_MS_S;
2393                 rt5645->master[dai->id] = 0;
2394                 break;
2395         default:
2396                 return -EINVAL;
2397         }
2398
2399         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2400         case SND_SOC_DAIFMT_NB_NF:
2401                 break;
2402         case SND_SOC_DAIFMT_IB_NF:
2403                 reg_val |= (1 << pol_sft);
2404                 break;
2405         default:
2406                 return -EINVAL;
2407         }
2408
2409         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2410         case SND_SOC_DAIFMT_I2S:
2411                 break;
2412         case SND_SOC_DAIFMT_LEFT_J:
2413                 reg_val |= RT5645_I2S_DF_LEFT;
2414                 break;
2415         case SND_SOC_DAIFMT_DSP_A:
2416                 reg_val |= RT5645_I2S_DF_PCM_A;
2417                 break;
2418         case SND_SOC_DAIFMT_DSP_B:
2419                 reg_val |= RT5645_I2S_DF_PCM_B;
2420                 break;
2421         default:
2422                 return -EINVAL;
2423         }
2424         switch (dai->id) {
2425         case RT5645_AIF1:
2426                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2427                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2428                         RT5645_I2S_DF_MASK, reg_val);
2429                 break;
2430         case RT5645_AIF2:
2431                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2432                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2433                         RT5645_I2S_DF_MASK, reg_val);
2434                 break;
2435         default:
2436                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2437                 return -EINVAL;
2438         }
2439         return 0;
2440 }
2441
2442 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2443                 int clk_id, unsigned int freq, int dir)
2444 {
2445         struct snd_soc_codec *codec = dai->codec;
2446         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2447         unsigned int reg_val = 0;
2448
2449         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2450                 return 0;
2451
2452         switch (clk_id) {
2453         case RT5645_SCLK_S_MCLK:
2454                 reg_val |= RT5645_SCLK_SRC_MCLK;
2455                 break;
2456         case RT5645_SCLK_S_PLL1:
2457                 reg_val |= RT5645_SCLK_SRC_PLL1;
2458                 break;
2459         case RT5645_SCLK_S_RCCLK:
2460                 reg_val |= RT5645_SCLK_SRC_RCCLK;
2461                 break;
2462         default:
2463                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2464                 return -EINVAL;
2465         }
2466         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2467                 RT5645_SCLK_SRC_MASK, reg_val);
2468         rt5645->sysclk = freq;
2469         rt5645->sysclk_src = clk_id;
2470
2471         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2472
2473         return 0;
2474 }
2475
2476 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2477                         unsigned int freq_in, unsigned int freq_out)
2478 {
2479         struct snd_soc_codec *codec = dai->codec;
2480         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2481         struct rl6231_pll_code pll_code;
2482         int ret;
2483
2484         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2485             freq_out == rt5645->pll_out)
2486                 return 0;
2487
2488         if (!freq_in || !freq_out) {
2489                 dev_dbg(codec->dev, "PLL disabled\n");
2490
2491                 rt5645->pll_in = 0;
2492                 rt5645->pll_out = 0;
2493                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2494                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2495                 return 0;
2496         }
2497
2498         switch (source) {
2499         case RT5645_PLL1_S_MCLK:
2500                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2501                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2502                 break;
2503         case RT5645_PLL1_S_BCLK1:
2504         case RT5645_PLL1_S_BCLK2:
2505                 switch (dai->id) {
2506                 case RT5645_AIF1:
2507                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2508                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2509                         break;
2510                 case  RT5645_AIF2:
2511                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2512                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2513                         break;
2514                 default:
2515                         dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2516                         return -EINVAL;
2517                 }
2518                 break;
2519         default:
2520                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2521                 return -EINVAL;
2522         }
2523
2524         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2525         if (ret < 0) {
2526                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2527                 return ret;
2528         }
2529
2530         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2531                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2532                 pll_code.n_code, pll_code.k_code);
2533
2534         snd_soc_write(codec, RT5645_PLL_CTRL1,
2535                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2536         snd_soc_write(codec, RT5645_PLL_CTRL2,
2537                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2538                 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2539
2540         rt5645->pll_in = freq_in;
2541         rt5645->pll_out = freq_out;
2542         rt5645->pll_src = source;
2543
2544         return 0;
2545 }
2546
2547 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2548                         unsigned int rx_mask, int slots, int slot_width)
2549 {
2550         struct snd_soc_codec *codec = dai->codec;
2551         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2552         unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2553         unsigned int mask, val = 0;
2554
2555         switch (rt5645->codec_type) {
2556         case CODEC_TYPE_RT5650:
2557                 en_sft = 15;
2558                 i_slot_sft = 10;
2559                 o_slot_sft = 8;
2560                 i_width_sht = 6;
2561                 o_width_sht = 4;
2562                 mask = 0x8ff0;
2563                 break;
2564         default:
2565                 en_sft = 14;
2566                 i_slot_sft = o_slot_sft = 12;
2567                 i_width_sht = o_width_sht = 10;
2568                 mask = 0x7c00;
2569                 break;
2570         }
2571         if (rx_mask || tx_mask) {
2572                 val |= (1 << en_sft);
2573                 if (rt5645->codec_type == CODEC_TYPE_RT5645)
2574                         snd_soc_update_bits(codec, RT5645_BASS_BACK,
2575                                 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
2576         }
2577
2578         switch (slots) {
2579         case 4:
2580                 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
2581                 break;
2582         case 6:
2583                 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
2584                 break;
2585         case 8:
2586                 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
2587                 break;
2588         case 2:
2589         default:
2590                 break;
2591         }
2592
2593         switch (slot_width) {
2594         case 20:
2595                 val |= (1 << i_width_sht) | (1 << o_width_sht);
2596                 break;
2597         case 24:
2598                 val |= (2 << i_width_sht) | (2 << o_width_sht);
2599                 break;
2600         case 32:
2601                 val |= (3 << i_width_sht) | (3 << o_width_sht);
2602                 break;
2603         case 16:
2604         default:
2605                 break;
2606         }
2607
2608         snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, mask, val);
2609
2610         return 0;
2611 }
2612
2613 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2614                         enum snd_soc_bias_level level)
2615 {
2616         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2617
2618         switch (level) {
2619         case SND_SOC_BIAS_PREPARE:
2620                 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
2621                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2622                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2623                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
2624                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2625                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
2626                         mdelay(10);
2627                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2628                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2629                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2630                         snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2631                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2632                 }
2633                 break;
2634
2635         case SND_SOC_BIAS_STANDBY:
2636                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2637                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
2638                         RT5645_PWR_BG | RT5645_PWR_VREF2,
2639                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
2640                         RT5645_PWR_BG | RT5645_PWR_VREF2);
2641                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2642                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
2643                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
2644                 break;
2645
2646         case SND_SOC_BIAS_OFF:
2647                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2648                 if (!rt5645->en_button_func)
2649                         snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2650                                         RT5645_DIG_GATE_CTRL, 0);
2651                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2652                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2653                                 RT5645_PWR_BG | RT5645_PWR_VREF2 |
2654                                 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
2655                 break;
2656
2657         default:
2658                 break;
2659         }
2660         codec->dapm.bias_level = level;
2661
2662         return 0;
2663 }
2664
2665 static void rt5645_enable_push_button_irq(struct snd_soc_codec *codec,
2666         bool enable)
2667 {
2668         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2669
2670         if (enable) {
2671                 snd_soc_dapm_force_enable_pin_unlocked(&codec->dapm,
2672                                                         "ADC L power");
2673                 snd_soc_dapm_force_enable_pin_unlocked(&codec->dapm,
2674                                                         "ADC R power");
2675                 snd_soc_dapm_force_enable_pin_unlocked(&codec->dapm,
2676                                                         "LDO2");
2677                 snd_soc_dapm_force_enable_pin_unlocked(&codec->dapm,
2678                                                         "Mic Det Power");
2679                 snd_soc_dapm_sync_unlocked(&codec->dapm);
2680                 snd_soc_update_bits(codec,
2681                                         RT5645_INT_IRQ_ST, 0x8, 0x8);
2682                 snd_soc_update_bits(codec,
2683                                         RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
2684                 snd_soc_read(codec, RT5650_4BTN_IL_CMD1);
2685                 pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
2686                         snd_soc_read(codec, RT5650_4BTN_IL_CMD1));
2687         } else {
2688                 snd_soc_update_bits(codec, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
2689                 snd_soc_update_bits(codec, RT5645_INT_IRQ_ST, 0x8, 0x0);
2690                 snd_soc_dapm_disable_pin_unlocked(&codec->dapm,
2691                                                         "ADC L power");
2692                 snd_soc_dapm_disable_pin_unlocked(&codec->dapm,
2693                                                         "ADC R power");
2694                 if (rt5645->pdata.jd_mode == 0)
2695                         snd_soc_dapm_disable_pin_unlocked(&codec->dapm,
2696                                                                 "LDO2");
2697                 snd_soc_dapm_disable_pin_unlocked(&codec->dapm,
2698                                                         "Mic Det Power");
2699                 snd_soc_dapm_sync_unlocked(&codec->dapm);
2700         }
2701 }
2702
2703 static int rt5645_jack_detect(struct snd_soc_codec *codec, int jack_insert)
2704 {
2705         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2706         unsigned int val;
2707
2708         if (jack_insert) {
2709                 if (codec->component.card->instantiated) {
2710                         snd_soc_dapm_force_enable_pin(&codec->dapm,
2711                                 "micbias1");
2712                         snd_soc_dapm_force_enable_pin(&codec->dapm,
2713                                 "micbias2");
2714                         snd_soc_dapm_force_enable_pin(&codec->dapm,
2715                                 "LDO2");
2716                         snd_soc_dapm_force_enable_pin(&codec->dapm,
2717                                 "Mic Det Power");
2718                         snd_soc_dapm_sync(&codec->dapm);
2719                 } else {
2720                         /* Power up necessary bits for JD if dapm is
2721                            not ready yet */
2722                         snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
2723                                 RT5645_PWR_MB1 | RT5645_PWR_MB2,
2724                                 RT5645_PWR_MB1 | RT5645_PWR_MB2);
2725                         snd_soc_update_bits(codec, RT5645_PWR_MIXER,
2726                                 RT5645_PWR_LDO2, RT5645_PWR_LDO2);
2727                         snd_soc_update_bits(codec, RT5645_PWR_VOL,
2728                                 RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
2729                 }
2730
2731                 snd_soc_write(codec, RT5645_IN1_CTRL1, 0x0006);
2732                 snd_soc_write(codec, RT5645_JD_CTRL3, 0x00b0);
2733
2734                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2735                         RT5645_CBJ_MN_JD, 0);
2736                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2737                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2738
2739                 msleep(400);
2740                 val = snd_soc_read(codec, RT5645_IN1_CTRL3) & 0x7;
2741                 dev_dbg(codec->dev, "val = %d\n", val);
2742
2743                 if (codec->component.card->instantiated) {
2744                         snd_soc_dapm_disable_pin(&codec->dapm, "micbias1");
2745                         snd_soc_dapm_disable_pin(&codec->dapm, "micbias2");
2746                         if (rt5645->pdata.jd_mode == 0)
2747                                 snd_soc_dapm_disable_pin(&codec->dapm, "LDO2");
2748                         snd_soc_dapm_disable_pin(&codec->dapm,
2749                                 "Mic Det Power");
2750                         snd_soc_dapm_sync(&codec->dapm);
2751                 } else {
2752                         snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
2753                                 RT5645_PWR_MB1 | RT5645_PWR_MB2, 0);
2754                         if (rt5645->pdata.jd_mode == 0)
2755                                 snd_soc_update_bits(codec, RT5645_PWR_MIXER,
2756                                         RT5645_PWR_LDO2, 0);
2757                         snd_soc_update_bits(codec, RT5645_PWR_VOL,
2758                                 RT5645_PWR_MIC_DET, 0);
2759                 }
2760
2761                 if (val == 1 || val == 2) {
2762                         rt5645->jack_type = SND_JACK_HEADSET;
2763                         if (rt5645->en_button_func) {
2764                                 msleep(100);
2765                                 rt5645_enable_push_button_irq(codec, true);
2766                         }
2767                 } else {
2768                         rt5645->jack_type = SND_JACK_HEADPHONE;
2769                 }
2770
2771         } else { /* jack out */
2772                 rt5645->jack_type = 0;
2773                 if (rt5645->en_button_func)
2774                         rt5645_enable_push_button_irq(codec, false);
2775         }
2776
2777         return rt5645->jack_type;
2778 }
2779
2780 static int rt5645_irq_detection(struct rt5645_priv *rt5645);
2781
2782 int rt5645_set_jack_detect(struct snd_soc_codec *codec,
2783         struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
2784         struct snd_soc_jack *btn_jack)
2785 {
2786         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2787
2788         rt5645->hp_jack = hp_jack;
2789         rt5645->mic_jack = mic_jack;
2790         rt5645->btn_jack = btn_jack;
2791         if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
2792                 rt5645->en_button_func = true;
2793                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2794                                 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
2795                 regmap_update_bits(rt5645->regmap, RT5645_DEPOP_M1,
2796                                 RT5645_HP_CB_MASK, RT5645_HP_CB_PU);
2797                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
2798                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2799         }
2800         rt5645_irq_detection(rt5645);
2801
2802         return 0;
2803 }
2804 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
2805
2806 static void rt5645_jack_detect_work(struct work_struct *work)
2807 {
2808         struct rt5645_priv *rt5645 =
2809                 container_of(work, struct rt5645_priv, jack_detect_work.work);
2810
2811         rt5645_irq_detection(rt5645);
2812 }
2813
2814 static irqreturn_t rt5645_irq(int irq, void *data)
2815 {
2816         struct rt5645_priv *rt5645 = data;
2817
2818         queue_delayed_work(system_power_efficient_wq,
2819                            &rt5645->jack_detect_work, msecs_to_jiffies(250));
2820
2821         return IRQ_HANDLED;
2822 }
2823
2824 static int rt5645_button_detect(struct snd_soc_codec *codec)
2825 {
2826         int btn_type, val;
2827
2828         val = snd_soc_read(codec, RT5650_4BTN_IL_CMD1);
2829         pr_debug("val=0x%x\n", val);
2830         btn_type = val & 0xfff0;
2831         snd_soc_write(codec, RT5650_4BTN_IL_CMD1, val);
2832
2833         return btn_type;
2834 }
2835
2836 static int rt5645_irq_detection(struct rt5645_priv *rt5645)
2837 {
2838         int val, btn_type, gpio_state = 0, report = 0;
2839
2840         switch (rt5645->pdata.jd_mode) {
2841         case 0: /* Not using rt5645 JD */
2842                 if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
2843                         gpio_state = gpio_get_value(rt5645->pdata.hp_det_gpio);
2844                         dev_dbg(rt5645->codec->dev, "gpio = %d(%d)\n",
2845                                 rt5645->pdata.hp_det_gpio, gpio_state);
2846                 }
2847                 if ((rt5645->pdata.gpio_hp_det_active_high && gpio_state) ||
2848                         (!rt5645->pdata.gpio_hp_det_active_high &&
2849                          !gpio_state)) {
2850                         report = rt5645_jack_detect(rt5645->codec, 1);
2851                 } else {
2852                         report = rt5645_jack_detect(rt5645->codec, 0);
2853                 }
2854                 snd_soc_jack_report(rt5645->hp_jack,
2855                                     report, SND_JACK_HEADPHONE);
2856                 snd_soc_jack_report(rt5645->mic_jack,
2857                                     report, SND_JACK_MICROPHONE);
2858                 return report;
2859         case 1: /* 2 port */
2860                 val = snd_soc_read(rt5645->codec, RT5645_A_JD_CTRL1) & 0x0070;
2861                 break;
2862         default: /* 1 port */
2863                 val = snd_soc_read(rt5645->codec, RT5645_A_JD_CTRL1) & 0x0020;
2864                 break;
2865
2866         }
2867
2868         switch (val) {
2869         /* jack in */
2870         case 0x30: /* 2 port */
2871         case 0x0: /* 1 port or 2 port */
2872                 if (rt5645->jack_type == 0) {
2873                         report = rt5645_jack_detect(rt5645->codec, 1);
2874                         /* for push button and jack out */
2875                         break;
2876                 }
2877                 btn_type = 0;
2878                 if (snd_soc_read(rt5645->codec, RT5645_INT_IRQ_ST) & 0x4) {
2879                         /* button pressed */
2880                         report = SND_JACK_HEADSET;
2881                         btn_type = rt5645_button_detect(rt5645->codec);
2882                         /* rt5650 can report three kinds of button behavior,
2883                            one click, double click and hold. However,
2884                            currently we will report button pressed/released
2885                            event. So all the three button behaviors are
2886                            treated as button pressed. */
2887                         switch (btn_type) {
2888                         case 0x8000:
2889                         case 0x4000:
2890                         case 0x2000:
2891                                 report |= SND_JACK_BTN_0;
2892                                 break;
2893                         case 0x1000:
2894                         case 0x0800:
2895                         case 0x0400:
2896                                 report |= SND_JACK_BTN_1;
2897                                 break;
2898                         case 0x0200:
2899                         case 0x0100:
2900                         case 0x0080:
2901                                 report |= SND_JACK_BTN_2;
2902                                 break;
2903                         case 0x0040:
2904                         case 0x0020:
2905                         case 0x0010:
2906                                 report |= SND_JACK_BTN_3;
2907                                 break;
2908                         case 0x0000: /* unpressed */
2909                                 break;
2910                         default:
2911                                 dev_err(rt5645->codec->dev,
2912                                         "Unexpected button code 0x%04x\n",
2913                                         btn_type);
2914                                 break;
2915                         }
2916                 }
2917                 if (btn_type == 0)/* button release */
2918                         report =  rt5645->jack_type;
2919
2920                 break;
2921         /* jack out */
2922         case 0x70: /* 2 port */
2923         case 0x10: /* 2 port */
2924         case 0x20: /* 1 port */
2925                 report = 0;
2926                 snd_soc_update_bits(rt5645->codec,
2927                                     RT5645_INT_IRQ_ST, 0x1, 0x0);
2928                 rt5645_jack_detect(rt5645->codec, 0);
2929                 break;
2930         default:
2931                 break;
2932         }
2933
2934         snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
2935         snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
2936         if (rt5645->en_button_func)
2937                 snd_soc_jack_report(rt5645->btn_jack,
2938                         report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
2939                                 SND_JACK_BTN_2 | SND_JACK_BTN_3);
2940
2941         return report;
2942 }
2943
2944 static int rt5645_probe(struct snd_soc_codec *codec)
2945 {
2946         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2947
2948         rt5645->codec = codec;
2949
2950         switch (rt5645->codec_type) {
2951         case CODEC_TYPE_RT5645:
2952                 snd_soc_dapm_add_routes(&codec->dapm,
2953                         rt5645_specific_dapm_routes,
2954                         ARRAY_SIZE(rt5645_specific_dapm_routes));
2955                 break;
2956         case CODEC_TYPE_RT5650:
2957                 snd_soc_dapm_new_controls(&codec->dapm,
2958                         rt5650_specific_dapm_widgets,
2959                         ARRAY_SIZE(rt5650_specific_dapm_widgets));
2960                 snd_soc_dapm_add_routes(&codec->dapm,
2961                         rt5650_specific_dapm_routes,
2962                         ARRAY_SIZE(rt5650_specific_dapm_routes));
2963                 break;
2964         }
2965
2966         rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2967
2968         snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2969
2970         /* for JD function */
2971         if (rt5645->pdata.en_jd_func) {
2972                 snd_soc_dapm_force_enable_pin(&codec->dapm, "JD Power");
2973                 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
2974                 snd_soc_dapm_sync(&codec->dapm);
2975         }
2976
2977         return 0;
2978 }
2979
2980 static int rt5645_remove(struct snd_soc_codec *codec)
2981 {
2982         rt5645_reset(codec);
2983         return 0;
2984 }
2985
2986 #ifdef CONFIG_PM
2987 static int rt5645_suspend(struct snd_soc_codec *codec)
2988 {
2989         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2990
2991         regcache_cache_only(rt5645->regmap, true);
2992         regcache_mark_dirty(rt5645->regmap);
2993
2994         return 0;
2995 }
2996
2997 static int rt5645_resume(struct snd_soc_codec *codec)
2998 {
2999         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3000
3001         regcache_cache_only(rt5645->regmap, false);
3002         regcache_sync(rt5645->regmap);
3003
3004         return 0;
3005 }
3006 #else
3007 #define rt5645_suspend NULL
3008 #define rt5645_resume NULL
3009 #endif
3010
3011 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3012 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3013                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3014
3015 static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3016         .hw_params = rt5645_hw_params,
3017         .set_fmt = rt5645_set_dai_fmt,
3018         .set_sysclk = rt5645_set_dai_sysclk,
3019         .set_tdm_slot = rt5645_set_tdm_slot,
3020         .set_pll = rt5645_set_dai_pll,
3021 };
3022
3023 static struct snd_soc_dai_driver rt5645_dai[] = {
3024         {
3025                 .name = "rt5645-aif1",
3026                 .id = RT5645_AIF1,
3027                 .playback = {
3028                         .stream_name = "AIF1 Playback",
3029                         .channels_min = 1,
3030                         .channels_max = 2,
3031                         .rates = RT5645_STEREO_RATES,
3032                         .formats = RT5645_FORMATS,
3033                 },
3034                 .capture = {
3035                         .stream_name = "AIF1 Capture",
3036                         .channels_min = 1,
3037                         .channels_max = 2,
3038                         .rates = RT5645_STEREO_RATES,
3039                         .formats = RT5645_FORMATS,
3040                 },
3041                 .ops = &rt5645_aif_dai_ops,
3042         },
3043         {
3044                 .name = "rt5645-aif2",
3045                 .id = RT5645_AIF2,
3046                 .playback = {
3047                         .stream_name = "AIF2 Playback",
3048                         .channels_min = 1,
3049                         .channels_max = 2,
3050                         .rates = RT5645_STEREO_RATES,
3051                         .formats = RT5645_FORMATS,
3052                 },
3053                 .capture = {
3054                         .stream_name = "AIF2 Capture",
3055                         .channels_min = 1,
3056                         .channels_max = 2,
3057                         .rates = RT5645_STEREO_RATES,
3058                         .formats = RT5645_FORMATS,
3059                 },
3060                 .ops = &rt5645_aif_dai_ops,
3061         },
3062 };
3063
3064 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
3065         .probe = rt5645_probe,
3066         .remove = rt5645_remove,
3067         .suspend = rt5645_suspend,
3068         .resume = rt5645_resume,
3069         .set_bias_level = rt5645_set_bias_level,
3070         .idle_bias_off = true,
3071         .controls = rt5645_snd_controls,
3072         .num_controls = ARRAY_SIZE(rt5645_snd_controls),
3073         .dapm_widgets = rt5645_dapm_widgets,
3074         .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
3075         .dapm_routes = rt5645_dapm_routes,
3076         .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
3077 };
3078
3079 static const struct regmap_config rt5645_regmap = {
3080         .reg_bits = 8,
3081         .val_bits = 16,
3082         .use_single_rw = true,
3083         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3084                                                RT5645_PR_SPACING),
3085         .volatile_reg = rt5645_volatile_register,
3086         .readable_reg = rt5645_readable_register,
3087
3088         .cache_type = REGCACHE_RBTREE,
3089         .reg_defaults = rt5645_reg,
3090         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3091         .ranges = rt5645_ranges,
3092         .num_ranges = ARRAY_SIZE(rt5645_ranges),
3093 };
3094
3095 static const struct i2c_device_id rt5645_i2c_id[] = {
3096         { "rt5645", 0 },
3097         { "rt5650", 0 },
3098         { }
3099 };
3100 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3101
3102 #ifdef CONFIG_ACPI
3103 static struct acpi_device_id rt5645_acpi_match[] = {
3104         { "10EC5645", 0 },
3105         { "10EC5650", 0 },
3106         {},
3107 };
3108 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3109 #endif
3110
3111 static struct rt5645_platform_data *rt5645_pdata;
3112
3113 static struct rt5645_platform_data strago_platform_data = {
3114         .dmic_en = true,
3115         .dmic1_data_pin = -1,
3116         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3117         .en_jd_func = true,
3118         .jd_mode = 3,
3119 };
3120
3121 static int strago_quirk_cb(const struct dmi_system_id *id)
3122 {
3123         rt5645_pdata = &strago_platform_data;
3124
3125         return 1;
3126 }
3127
3128 static struct dmi_system_id dmi_platform_intel_braswell[] = {
3129         {
3130                 .ident = "Intel Strago",
3131                 .callback = strago_quirk_cb,
3132                 .matches = {
3133                         DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3134                 },
3135         },
3136         { }
3137 };
3138
3139 static int rt5645_i2c_probe(struct i2c_client *i2c,
3140                     const struct i2c_device_id *id)
3141 {
3142         struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
3143         struct rt5645_priv *rt5645;
3144         int ret;
3145         unsigned int val;
3146         struct gpio_desc *gpiod;
3147
3148         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3149                                 GFP_KERNEL);
3150         if (rt5645 == NULL)
3151                 return -ENOMEM;
3152
3153         rt5645->i2c = i2c;
3154         i2c_set_clientdata(i2c, rt5645);
3155
3156         if (pdata) {
3157                 rt5645->pdata = *pdata;
3158         } else {
3159                 if (dmi_check_system(dmi_platform_intel_braswell)) {
3160                         rt5645->pdata = *rt5645_pdata;
3161                         gpiod = devm_gpiod_get_index(&i2c->dev, "rt5645", 0);
3162
3163                         if (IS_ERR(gpiod) || gpiod_direction_input(gpiod)) {
3164                                 rt5645->pdata.hp_det_gpio = -1;
3165                                 dev_err(&i2c->dev, "failed to initialize gpiod\n");
3166                         } else {
3167                                 rt5645->pdata.hp_det_gpio = desc_to_gpio(gpiod);
3168                                 rt5645->pdata.gpio_hp_det_active_high
3169                                                 = !gpiod_is_active_low(gpiod);
3170                         }
3171                 }
3172         }
3173
3174         rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
3175         if (IS_ERR(rt5645->regmap)) {
3176                 ret = PTR_ERR(rt5645->regmap);
3177                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3178                         ret);
3179                 return ret;
3180         }
3181
3182         regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
3183
3184         switch (val) {
3185         case RT5645_DEVICE_ID:
3186                 rt5645->codec_type = CODEC_TYPE_RT5645;
3187                 break;
3188         case RT5650_DEVICE_ID:
3189                 rt5645->codec_type = CODEC_TYPE_RT5650;
3190                 break;
3191         default:
3192                 dev_err(&i2c->dev,
3193                         "Device with ID register %x is not rt5645 or rt5650\n",
3194                         val);
3195                 return -ENODEV;
3196         }
3197
3198         regmap_write(rt5645->regmap, RT5645_RESET, 0);
3199
3200         ret = regmap_register_patch(rt5645->regmap, init_list,
3201                                     ARRAY_SIZE(init_list));
3202         if (ret != 0)
3203                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3204
3205         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
3206                 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
3207                                     ARRAY_SIZE(rt5650_init_list));
3208                 if (ret != 0)
3209                         dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
3210                                            ret);
3211         }
3212
3213         if (rt5645->pdata.in2_diff)
3214                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
3215                                         RT5645_IN_DF2, RT5645_IN_DF2);
3216
3217         if (rt5645->pdata.dmic_en) {
3218                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3219                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
3220
3221                 switch (rt5645->pdata.dmic1_data_pin) {
3222                 case RT5645_DMIC_DATA_IN2N:
3223                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3224                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
3225                         break;
3226
3227                 case RT5645_DMIC_DATA_GPIO5:
3228                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3229                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
3230                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3231                                 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
3232                         break;
3233
3234                 case RT5645_DMIC_DATA_GPIO11:
3235                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3236                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
3237                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3238                                 RT5645_GP11_PIN_MASK,
3239                                 RT5645_GP11_PIN_DMIC1_SDA);
3240                         break;
3241
3242                 default:
3243                         break;
3244                 }
3245
3246                 switch (rt5645->pdata.dmic2_data_pin) {
3247                 case RT5645_DMIC_DATA_IN2P:
3248                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3249                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
3250                         break;
3251
3252                 case RT5645_DMIC_DATA_GPIO6:
3253                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3254                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
3255                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3256                                 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
3257                         break;
3258
3259                 case RT5645_DMIC_DATA_GPIO10:
3260                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3261                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
3262                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3263                                 RT5645_GP10_PIN_MASK,
3264                                 RT5645_GP10_PIN_DMIC2_SDA);
3265                         break;
3266
3267                 case RT5645_DMIC_DATA_GPIO12:
3268                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3269                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
3270                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3271                                 RT5645_GP12_PIN_MASK,
3272                                 RT5645_GP12_PIN_DMIC2_SDA);
3273                         break;
3274
3275                 default:
3276                         break;
3277                 }
3278
3279         }
3280
3281         if (rt5645->pdata.en_jd_func) {
3282                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3283                         RT5645_IRQ_CLK_GATE_CTRL, RT5645_IRQ_CLK_GATE_CTRL);
3284                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3285                         RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
3286                 regmap_update_bits(rt5645->regmap, RT5645_JD_CTRL3,
3287                         RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL,
3288                         RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL);
3289                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3290                         RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
3291         }
3292
3293         if (rt5645->pdata.jd_mode) {
3294                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3295                                    RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
3296                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3297                                    RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
3298                 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
3299                                    RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
3300                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3301                                    RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
3302                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3303                                    RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3304                 switch (rt5645->pdata.jd_mode) {
3305                 case 1:
3306                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3307                                            RT5645_JD1_MODE_MASK,
3308                                            RT5645_JD1_MODE_0);
3309                         break;
3310                 case 2:
3311                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3312                                            RT5645_JD1_MODE_MASK,
3313                                            RT5645_JD1_MODE_1);
3314                         break;
3315                 case 3:
3316                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3317                                            RT5645_JD1_MODE_MASK,
3318                                            RT5645_JD1_MODE_2);
3319                         break;
3320                 default:
3321                         break;
3322                 }
3323         }
3324
3325         if (rt5645->i2c->irq) {
3326                 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
3327                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
3328                         | IRQF_ONESHOT, "rt5645", rt5645);
3329                 if (ret)
3330                         dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
3331         }
3332
3333         if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
3334                 ret = gpio_request(rt5645->pdata.hp_det_gpio, "rt5645");
3335                 if (ret)
3336                         dev_err(&i2c->dev, "Fail gpio_request hp_det_gpio\n");
3337
3338                 ret = gpio_direction_input(rt5645->pdata.hp_det_gpio);
3339                 if (ret)
3340                         dev_err(&i2c->dev, "Fail gpio_direction hp_det_gpio\n");
3341         }
3342
3343         INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
3344
3345         return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
3346                                       rt5645_dai, ARRAY_SIZE(rt5645_dai));
3347 }
3348
3349 static int rt5645_i2c_remove(struct i2c_client *i2c)
3350 {
3351         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
3352
3353         if (i2c->irq)
3354                 free_irq(i2c->irq, rt5645);
3355
3356         cancel_delayed_work_sync(&rt5645->jack_detect_work);
3357
3358         if (gpio_is_valid(rt5645->pdata.hp_det_gpio))
3359                 gpio_free(rt5645->pdata.hp_det_gpio);
3360
3361         snd_soc_unregister_codec(&i2c->dev);
3362
3363         return 0;
3364 }
3365
3366 static struct i2c_driver rt5645_i2c_driver = {
3367         .driver = {
3368                 .name = "rt5645",
3369                 .owner = THIS_MODULE,
3370                 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
3371         },
3372         .probe = rt5645_i2c_probe,
3373         .remove   = rt5645_i2c_remove,
3374         .id_table = rt5645_i2c_id,
3375 };
3376 module_i2c_driver(rt5645_i2c_driver);
3377
3378 MODULE_DESCRIPTION("ASoC RT5645 driver");
3379 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3380 MODULE_LICENSE("GPL v2");