sound/soc/codecs/wm8993.c

   1 /*
   2  * wm8993.c -- WM8993 ALSA SoC audio driver
   3  *
   4  * Copyright 2009 Wolfson Microelectronics plc
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/pm.h>
  18 #include <linux/i2c.h>
  19 #include <linux/spi/spi.h>
  20 #include <sound/core.h>
  21 #include <sound/pcm.h>
  22 #include <sound/pcm_params.h>
  23 #include <sound/tlv.h>
  24 #include <sound/soc.h>
  25 #include <sound/soc-dapm.h>
  26 #include <sound/initval.h>
  27 #include <sound/wm8993.h>
  28
  29 #include "wm8993.h"
  30 #include "wm_hubs.h"
  31
  32 static u16 wm8993_reg_defaults[WM8993_REGISTER_COUNT] = {
  33         0x8993,     /* R0   - Software Reset */
  34         0x0000,     /* R1   - Power Management (1) */
  35         0x6000,     /* R2   - Power Management (2) */
  36         0x0000,     /* R3   - Power Management (3) */
  37         0x4050,     /* R4   - Audio Interface (1) */
  38         0x4000,     /* R5   - Audio Interface (2) */
  39         0x01C8,     /* R6   - Clocking 1 */
  40         0x0000,     /* R7   - Clocking 2 */
  41         0x0000,     /* R8   - Audio Interface (3) */
  42         0x0040,     /* R9   - Audio Interface (4) */
  43         0x0004,     /* R10  - DAC CTRL */
  44         0x00C0,     /* R11  - Left DAC Digital Volume */
  45         0x00C0,     /* R12  - Right DAC Digital Volume */
  46         0x0000,     /* R13  - Digital Side Tone */
  47         0x0300,     /* R14  - ADC CTRL */
  48         0x00C0,     /* R15  - Left ADC Digital Volume */
  49         0x00C0,     /* R16  - Right ADC Digital Volume */
  50         0x0000,     /* R17 */
  51         0x0000,     /* R18  - GPIO CTRL 1 */
  52         0x0010,     /* R19  - GPIO1 */
  53         0x0000,     /* R20  - IRQ_DEBOUNCE */
  54         0x0000,     /* R21 */
  55         0x8000,     /* R22  - GPIOCTRL 2 */
  56         0x0800,     /* R23  - GPIO_POL */
  57         0x008B,     /* R24  - Left Line Input 1&2 Volume */
  58         0x008B,     /* R25  - Left Line Input 3&4 Volume */
  59         0x008B,     /* R26  - Right Line Input 1&2 Volume */
  60         0x008B,     /* R27  - Right Line Input 3&4 Volume */
  61         0x006D,     /* R28  - Left Output Volume */
  62         0x006D,     /* R29  - Right Output Volume */
  63         0x0066,     /* R30  - Line Outputs Volume */
  64         0x0020,     /* R31  - HPOUT2 Volume */
  65         0x0079,     /* R32  - Left OPGA Volume */
  66         0x0079,     /* R33  - Right OPGA Volume */
  67         0x0003,     /* R34  - SPKMIXL Attenuation */
  68         0x0003,     /* R35  - SPKMIXR Attenuation */
  69         0x0011,     /* R36  - SPKOUT Mixers */
  70         0x0100,     /* R37  - SPKOUT Boost */
  71         0x0079,     /* R38  - Speaker Volume Left */
  72         0x0079,     /* R39  - Speaker Volume Right */
  73         0x0000,     /* R40  - Input Mixer2 */
  74         0x0000,     /* R41  - Input Mixer3 */
  75         0x0000,     /* R42  - Input Mixer4 */
  76         0x0000,     /* R43  - Input Mixer5 */
  77         0x0000,     /* R44  - Input Mixer6 */
  78         0x0000,     /* R45  - Output Mixer1 */
  79         0x0000,     /* R46  - Output Mixer2 */
  80         0x0000,     /* R47  - Output Mixer3 */
  81         0x0000,     /* R48  - Output Mixer4 */
  82         0x0000,     /* R49  - Output Mixer5 */
  83         0x0000,     /* R50  - Output Mixer6 */
  84         0x0000,     /* R51  - HPOUT2 Mixer */
  85         0x0000,     /* R52  - Line Mixer1 */
  86         0x0000,     /* R53  - Line Mixer2 */
  87         0x0000,     /* R54  - Speaker Mixer */
  88         0x0000,     /* R55  - Additional Control */
  89         0x0000,     /* R56  - AntiPOP1 */
  90         0x0000,     /* R57  - AntiPOP2 */
  91         0x0000,     /* R58  - MICBIAS */
  92         0x0000,     /* R59 */
  93         0x0000,     /* R60  - FLL Control 1 */
  94         0x0000,     /* R61  - FLL Control 2 */
  95         0x0000,     /* R62  - FLL Control 3 */
  96         0x2EE0,     /* R63  - FLL Control 4 */
  97         0x0002,     /* R64  - FLL Control 5 */
  98         0x2287,     /* R65  - Clocking 3 */
  99         0x025F,     /* R66  - Clocking 4 */
 100         0x0000,     /* R67  - MW Slave Control */
 101         0x0000,     /* R68 */
 102         0x0002,     /* R69  - Bus Control 1 */
 103         0x0000,     /* R70  - Write Sequencer 0 */
 104         0x0000,     /* R71  - Write Sequencer 1 */
 105         0x0000,     /* R72  - Write Sequencer 2 */
 106         0x0000,     /* R73  - Write Sequencer 3 */
 107         0x0000,     /* R74  - Write Sequencer 4 */
 108         0x0000,     /* R75  - Write Sequencer 5 */
 109         0x1F25,     /* R76  - Charge Pump 1 */
 110         0x0000,     /* R77 */
 111         0x0000,     /* R78 */
 112         0x0000,     /* R79 */
 113         0x0000,     /* R80 */
 114         0x0000,     /* R81  - Class W 0 */
 115         0x0000,     /* R82 */
 116         0x0000,     /* R83 */
 117         0x0000,     /* R84  - DC Servo 0 */
 118         0x054A,     /* R85  - DC Servo 1 */
 119         0x0000,     /* R86 */
 120         0x0000,     /* R87  - DC Servo 3 */
 121         0x0000,     /* R88  - DC Servo Readback 0 */
 122         0x0000,     /* R89  - DC Servo Readback 1 */
 123         0x0000,     /* R90  - DC Servo Readback 2 */
 124         0x0000,     /* R91 */
 125         0x0000,     /* R92 */
 126         0x0000,     /* R93 */
 127         0x0000,     /* R94 */
 128         0x0000,     /* R95 */
 129         0x0100,     /* R96  - Analogue HP 0 */
 130         0x0000,     /* R97 */
 131         0x0000,     /* R98  - EQ1 */
 132         0x000C,     /* R99  - EQ2 */
 133         0x000C,     /* R100 - EQ3 */
 134         0x000C,     /* R101 - EQ4 */
 135         0x000C,     /* R102 - EQ5 */
 136         0x000C,     /* R103 - EQ6 */
 137         0x0FCA,     /* R104 - EQ7 */
 138         0x0400,     /* R105 - EQ8 */
 139         0x00D8,     /* R106 - EQ9 */
 140         0x1EB5,     /* R107 - EQ10 */
 141         0xF145,     /* R108 - EQ11 */
 142         0x0B75,     /* R109 - EQ12 */
 143         0x01C5,     /* R110 - EQ13 */
 144         0x1C58,     /* R111 - EQ14 */
 145         0xF373,     /* R112 - EQ15 */
 146         0x0A54,     /* R113 - EQ16 */
 147         0x0558,     /* R114 - EQ17 */
 148         0x168E,     /* R115 - EQ18 */
 149         0xF829,     /* R116 - EQ19 */
 150         0x07AD,     /* R117 - EQ20 */
 151         0x1103,     /* R118 - EQ21 */
 152         0x0564,     /* R119 - EQ22 */
 153         0x0559,     /* R120 - EQ23 */
 154         0x4000,     /* R121 - EQ24 */
 155         0x0000,     /* R122 - Digital Pulls */
 156         0x0F08,     /* R123 - DRC Control 1 */
 157         0x0000,     /* R124 - DRC Control 2 */
 158         0x0080,     /* R125 - DRC Control 3 */
 159         0x0000,     /* R126 - DRC Control 4 */
 160 };
 161
 162 static struct {
 163         int ratio;
 164         int clk_sys_rate;
 165 } clk_sys_rates[] = {
 166         { 64,   0 },
 167         { 128,  1 },
 168         { 192,  2 },
 169         { 256,  3 },
 170         { 384,  4 },
 171         { 512,  5 },
 172         { 768,  6 },
 173         { 1024, 7 },
 174         { 1408, 8 },
 175         { 1536, 9 },
 176 };
 177
 178 static struct {
 179         int rate;
 180         int sample_rate;
 181 } sample_rates[] = {
 182         { 8000,  0  },
 183         { 11025, 1  },
 184         { 12000, 1  },
 185         { 16000, 2  },
 186         { 22050, 3  },
 187         { 24000, 3  },
 188         { 32000, 4  },
 189         { 44100, 5  },
 190         { 48000, 5  },
 191 };
 192
 193 static struct {
 194         int div; /* *10 due to .5s */
 195         int bclk_div;
 196 } bclk_divs[] = {
 197         { 10,  0  },
 198         { 15,  1  },
 199         { 20,  2  },
 200         { 30,  3  },
 201         { 40,  4  },
 202         { 55,  5  },
 203         { 60,  6  },
 204         { 80,  7  },
 205         { 110, 8  },
 206         { 120, 9  },
 207         { 160, 10 },
 208         { 220, 11 },
 209         { 240, 12 },
 210         { 320, 13 },
 211         { 440, 14 },
 212         { 480, 15 },
 213 };
 214
 215 struct wm8993_priv {
 216         u16 reg_cache[WM8993_REGISTER_COUNT];
 217         struct wm8993_platform_data pdata;
 218         struct snd_soc_codec codec;
 219         int master;
 220         int sysclk_source;
 221         int tdm_slots;
 222         int tdm_width;
 223         unsigned int mclk_rate;
 224         unsigned int sysclk_rate;
 225         unsigned int fs;
 226         unsigned int bclk;
 227         int class_w_users;
 228         unsigned int fll_fref;
 229         unsigned int fll_fout;
 230         int fll_src;
 231 };
 232
 233 static unsigned int wm8993_read_hw(struct snd_soc_codec *codec, u8 reg)
 234 {
 235         struct i2c_msg xfer[2];
 236         u16 data;
 237         int ret;
 238         struct i2c_client *i2c = codec->control_data;
 239
 240         /* Write register */
 241         xfer[0].addr = i2c->addr;
 242         xfer[0].flags = 0;
 243         xfer[0].len = 1;
 244         xfer[0].buf = &reg;
 245
 246         /* Read data */
 247         xfer[1].addr = i2c->addr;
 248         xfer[1].flags = I2C_M_RD;
 249         xfer[1].len = 2;
 250         xfer[1].buf = (u8 *)&data;
 251
 252         ret = i2c_transfer(i2c->adapter, xfer, 2);
 253         if (ret != 2) {
 254                 dev_err(codec->dev, "Failed to read 0x%x: %d\n", reg, ret);
 255                 return 0;
 256         }
 257
 258         return (data >> 8) | ((data & 0xff) << 8);
 259 }
 260
 261 static int wm8993_volatile(unsigned int reg)
 262 {
 263         switch (reg) {
 264         case WM8993_SOFTWARE_RESET:
 265         case WM8993_DC_SERVO_0:
 266         case WM8993_DC_SERVO_READBACK_0:
 267         case WM8993_DC_SERVO_READBACK_1:
 268         case WM8993_DC_SERVO_READBACK_2:
 269                 return 1;
 270         default:
 271                 return 0;
 272         }
 273 }
 274
 275 static unsigned int wm8993_read(struct snd_soc_codec *codec,
 276                                 unsigned int reg)
 277 {
 278         u16 *reg_cache = codec->reg_cache;
 279
 280         BUG_ON(reg > WM8993_MAX_REGISTER);
 281
 282         if (wm8993_volatile(reg))
 283                 return wm8993_read_hw(codec, reg);
 284         else
 285                 return reg_cache[reg];
 286 }
 287
 288 static int wm8993_write(struct snd_soc_codec *codec, unsigned int reg,
 289                         unsigned int value)
 290 {
 291         u16 *reg_cache = codec->reg_cache;
 292         u8 data[3];
 293         int ret;
 294
 295         BUG_ON(reg > WM8993_MAX_REGISTER);
 296
 297         /* data is
 298          *   D15..D9 WM8993 register offset
 299          *   D8...D0 register data
 300          */
 301         data[0] = reg;
 302         data[1] = value >> 8;
 303         data[2] = value & 0x00ff;
 304
 305         if (!wm8993_volatile(reg))
 306                 reg_cache[reg] = value;
 307
 308         ret = codec->hw_write(codec->control_data, data, 3);
 309
 310         if (ret == 3)
 311                 return 0;
 312         if (ret < 0)
 313                 return ret;
 314         return -EIO;
 315 }
 316
 317 struct _fll_div {
 318         u16 fll_fratio;
 319         u16 fll_outdiv;
 320         u16 fll_clk_ref_div;
 321         u16 n;
 322         u16 k;
 323 };
 324
 325 /* The size in bits of the FLL divide multiplied by 10
 326  * to allow rounding later */
 327 #define FIXED_FLL_SIZE ((1 << 16) * 10)
 328
 329 static struct {
 330         unsigned int min;
 331         unsigned int max;
 332         u16 fll_fratio;
 333         int ratio;
 334 } fll_fratios[] = {
 335         {       0,    64000, 4, 16 },
 336         {   64000,   128000, 3,  8 },
 337         {  128000,   256000, 2,  4 },
 338         {  256000,  1000000, 1,  2 },
 339         { 1000000, 13500000, 0,  1 },
 340 };
 341
 342 static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
 343                        unsigned int Fout)
 344 {
 345         u64 Kpart;
 346         unsigned int K, Ndiv, Nmod, target;
 347         unsigned int div;
 348         int i;
 349
 350         /* Fref must be <=13.5MHz */
 351         div = 1;
 352         fll_div->fll_clk_ref_div = 0;
 353         while ((Fref / div) > 13500000) {
 354                 div *= 2;
 355                 fll_div->fll_clk_ref_div++;
 356
 357                 if (div > 8) {
 358                         pr_err("Can't scale %dMHz input down to <=13.5MHz\n",
 359                                Fref);
 360                         return -EINVAL;
 361                 }
 362         }
 363
 364         pr_debug("Fref=%u Fout=%u\n", Fref, Fout);
 365
 366         /* Apply the division for our remaining calculations */
 367         Fref /= div;
 368
 369         /* Fvco should be 90-100MHz; don't check the upper bound */
 370         div = 0;
 371         target = Fout * 2;
 372         while (target < 90000000) {
 373                 div++;
 374                 target *= 2;
 375                 if (div > 7) {
 376                         pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n",
 377                                Fout);
 378                         return -EINVAL;
 379                 }
 380         }
 381         fll_div->fll_outdiv = div;
 382
 383         pr_debug("Fvco=%dHz\n", target);
 384
 385         /* Find an appropraite FLL_FRATIO and factor it out of the target */
 386         for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
 387                 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
 388                         fll_div->fll_fratio = fll_fratios[i].fll_fratio;
 389                         target /= fll_fratios[i].ratio;
 390                         break;
 391                 }
 392         }
 393         if (i == ARRAY_SIZE(fll_fratios)) {
 394                 pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref);
 395                 return -EINVAL;
 396         }
 397
 398         /* Now, calculate N.K */
 399         Ndiv = target / Fref;
 400
 401         fll_div->n = Ndiv;
 402         Nmod = target % Fref;
 403         pr_debug("Nmod=%d\n", Nmod);
 404
 405         /* Calculate fractional part - scale up so we can round. */
 406         Kpart = FIXED_FLL_SIZE * (long long)Nmod;
 407
 408         do_div(Kpart, Fref);
 409
 410         K = Kpart & 0xFFFFFFFF;
 411
 412         if ((K % 10) >= 5)
 413                 K += 5;
 414
 415         /* Move down to proper range now rounding is done */
 416         fll_div->k = K / 10;
 417
 418         pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n",
 419                  fll_div->n, fll_div->k,
 420                  fll_div->fll_fratio, fll_div->fll_outdiv,
 421                  fll_div->fll_clk_ref_div);
 422
 423         return 0;
 424 }
 425
 426 static int wm8993_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
 427                           unsigned int Fref, unsigned int Fout)
 428 {
 429         struct snd_soc_codec *codec = dai->codec;
 430         struct wm8993_priv *wm8993 = codec->private_data;
 431         u16 reg1, reg4, reg5;
 432         struct _fll_div fll_div;
 433         int ret;
 434
 435         /* Any change? */
 436         if (Fref == wm8993->fll_fref && Fout == wm8993->fll_fout)
 437                 return 0;
 438
 439         /* Disable the FLL */
 440         if (Fout == 0) {
 441                 dev_dbg(codec->dev, "FLL disabled\n");
 442                 wm8993->fll_fref = 0;
 443                 wm8993->fll_fout = 0;
 444
 445                 reg1 = wm8993_read(codec, WM8993_FLL_CONTROL_1);
 446                 reg1 &= ~WM8993_FLL_ENA;
 447                 wm8993_write(codec, WM8993_FLL_CONTROL_1, reg1);
 448
 449                 return 0;
 450         }
 451
 452         ret = fll_factors(&fll_div, Fref, Fout);
 453         if (ret != 0)
 454                 return ret;
 455
 456         reg5 = wm8993_read(codec, WM8993_FLL_CONTROL_5);
 457         reg5 &= ~WM8993_FLL_CLK_SRC_MASK;
 458
 459         switch (fll_id) {
 460         case WM8993_FLL_MCLK:
 461                 break;
 462
 463         case WM8993_FLL_LRCLK:
 464                 reg5 |= 1;
 465                 break;
 466
 467         case WM8993_FLL_BCLK:
 468                 reg5 |= 2;
 469                 break;
 470
 471         default:
 472                 dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id);
 473                 return -EINVAL;
 474         }
 475
 476         /* Any FLL configuration change requires that the FLL be
 477          * disabled first. */
 478         reg1 = wm8993_read(codec, WM8993_FLL_CONTROL_1);
 479         reg1 &= ~WM8993_FLL_ENA;
 480         wm8993_write(codec, WM8993_FLL_CONTROL_1, reg1);
 481
 482         /* Apply the configuration */
 483         if (fll_div.k)
 484                 reg1 |= WM8993_FLL_FRAC_MASK;
 485         else
 486                 reg1 &= ~WM8993_FLL_FRAC_MASK;
 487         wm8993_write(codec, WM8993_FLL_CONTROL_1, reg1);
 488
 489         wm8993_write(codec, WM8993_FLL_CONTROL_2,
 490                      (fll_div.fll_outdiv << WM8993_FLL_OUTDIV_SHIFT) |
 491                      (fll_div.fll_fratio << WM8993_FLL_FRATIO_SHIFT));
 492         wm8993_write(codec, WM8993_FLL_CONTROL_3, fll_div.k);
 493
 494         reg4 = wm8993_read(codec, WM8993_FLL_CONTROL_4);
 495         reg4 &= ~WM8993_FLL_N_MASK;
 496         reg4 |= fll_div.n << WM8993_FLL_N_SHIFT;
 497         wm8993_write(codec, WM8993_FLL_CONTROL_4, reg4);
 498
 499         reg5 &= ~WM8993_FLL_CLK_REF_DIV_MASK;
 500         reg5 |= fll_div.fll_clk_ref_div << WM8993_FLL_CLK_REF_DIV_SHIFT;
 501         wm8993_write(codec, WM8993_FLL_CONTROL_5, reg5);
 502
 503         /* Enable the FLL */
 504         wm8993_write(codec, WM8993_FLL_CONTROL_1, reg1 | WM8993_FLL_ENA);
 505
 506         dev_dbg(codec->dev, "FLL enabled at %dHz->%dHz\n", Fref, Fout);
 507
 508         wm8993->fll_fref = Fref;
 509         wm8993->fll_fout = Fout;
 510         wm8993->fll_src = source;
 511
 512         return 0;
 513 }
 514
 515 static int configure_clock(struct snd_soc_codec *codec)
 516 {
 517         struct wm8993_priv *wm8993 = codec->private_data;
 518         unsigned int reg;
 519
 520         /* This should be done on init() for bypass paths */
 521         switch (wm8993->sysclk_source) {
 522         case WM8993_SYSCLK_MCLK:
 523                 dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8993->mclk_rate);
 524
 525                 reg = wm8993_read(codec, WM8993_CLOCKING_2);
 526                 reg &= ~(WM8993_MCLK_DIV | WM8993_SYSCLK_SRC);
 527                 if (wm8993->mclk_rate > 13500000) {
 528                         reg |= WM8993_MCLK_DIV;
 529                         wm8993->sysclk_rate = wm8993->mclk_rate / 2;
 530                 } else {
 531                         reg &= ~WM8993_MCLK_DIV;
 532                         wm8993->sysclk_rate = wm8993->mclk_rate;
 533                 }
 534                 wm8993_write(codec, WM8993_CLOCKING_2, reg);
 535                 break;
 536
 537         case WM8993_SYSCLK_FLL:
 538                 dev_dbg(codec->dev, "Using %dHz FLL clock\n",
 539                         wm8993->fll_fout);
 540
 541                 reg = wm8993_read(codec, WM8993_CLOCKING_2);
 542                 reg |= WM8993_SYSCLK_SRC;
 543                 if (wm8993->fll_fout > 13500000) {
 544                         reg |= WM8993_MCLK_DIV;
 545                         wm8993->sysclk_rate = wm8993->fll_fout / 2;
 546                 } else {
 547                         reg &= ~WM8993_MCLK_DIV;
 548                         wm8993->sysclk_rate = wm8993->fll_fout;
 549                 }
 550                 wm8993_write(codec, WM8993_CLOCKING_2, reg);
 551                 break;
 552
 553         default:
 554                 dev_err(codec->dev, "System clock not configured\n");
 555                 return -EINVAL;
 556         }
 557
 558         dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8993->sysclk_rate);
 559
 560         return 0;
 561 }
 562
 563 static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0);
 564 static const DECLARE_TLV_DB_SCALE(drc_comp_threash, -4500, 75, 0);
 565 static const DECLARE_TLV_DB_SCALE(drc_comp_amp, -2250, 75, 0);
 566 static const DECLARE_TLV_DB_SCALE(drc_min_tlv, -1800, 600, 0);
 567 static const unsigned int drc_max_tlv[] = {
 568         TLV_DB_RANGE_HEAD(4),
 569         0, 2, TLV_DB_SCALE_ITEM(1200, 600, 0),
 570         3, 3, TLV_DB_SCALE_ITEM(3600, 0, 0),
 571 };
 572 static const DECLARE_TLV_DB_SCALE(drc_qr_tlv, 1200, 600, 0);
 573 static const DECLARE_TLV_DB_SCALE(drc_startup_tlv, -1800, 300, 0);
 574 static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
 575 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
 576 static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0);
 577
 578 static const char *dac_deemph_text[] = {
 579         "None",
 580         "32kHz",
 581         "44.1kHz",
 582         "48kHz",
 583 };
 584
 585 static const struct soc_enum dac_deemph =
 586         SOC_ENUM_SINGLE(WM8993_DAC_CTRL, 4, 4, dac_deemph_text);
 587
 588 static const char *adc_hpf_text[] = {
 589         "Hi-Fi",
 590         "Voice 1",
 591         "Voice 2",
 592         "Voice 3",
 593 };
 594
 595 static const struct soc_enum adc_hpf =
 596         SOC_ENUM_SINGLE(WM8993_ADC_CTRL, 5, 4, adc_hpf_text);
 597
 598 static const char *drc_path_text[] = {
 599         "ADC",
 600         "DAC"
 601 };
 602
 603 static const struct soc_enum drc_path =
 604         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_1, 14, 2, drc_path_text);
 605
 606 static const char *drc_r0_text[] = {
 607         "1",
 608         "1/2",
 609         "1/4",
 610         "1/8",
 611         "1/16",
 612         "0",
 613 };
 614
 615 static const struct soc_enum drc_r0 =
 616         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 8, 6, drc_r0_text);
 617
 618 static const char *drc_r1_text[] = {
 619         "1",
 620         "1/2",
 621         "1/4",
 622         "1/8",
 623         "0",
 624 };
 625
 626 static const struct soc_enum drc_r1 =
 627         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_4, 13, 5, drc_r1_text);
 628
 629 static const char *drc_attack_text[] = {
 630         "Reserved",
 631         "181us",
 632         "363us",
 633         "726us",
 634         "1.45ms",
 635         "2.9ms",
 636         "5.8ms",
 637         "11.6ms",
 638         "23.2ms",
 639         "46.4ms",
 640         "92.8ms",
 641         "185.6ms",
 642 };
 643
 644 static const struct soc_enum drc_attack =
 645         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_2, 12, 12, drc_attack_text);
 646
 647 static const char *drc_decay_text[] = {
 648         "186ms",
 649         "372ms",
 650         "743ms",
 651         "1.49s",
 652         "2.97ms",
 653         "5.94ms",
 654         "11.89ms",
 655         "23.78ms",
 656         "47.56ms",
 657 };
 658
 659 static const struct soc_enum drc_decay =
 660         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_2, 8, 9, drc_decay_text);
 661
 662 static const char *drc_ff_text[] = {
 663         "5 samples",
 664         "9 samples",
 665 };
 666
 667 static const struct soc_enum drc_ff =
 668         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 7, 2, drc_ff_text);
 669
 670 static const char *drc_qr_rate_text[] = {
 671         "0.725ms",
 672         "1.45ms",
 673         "5.8ms",
 674 };
 675
 676 static const struct soc_enum drc_qr_rate =
 677         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 0, 3, drc_qr_rate_text);
 678
 679 static const char *drc_smooth_text[] = {
 680         "Low",
 681         "Medium",
 682         "High",
 683 };
 684
 685 static const struct soc_enum drc_smooth =
 686         SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_1, 4, 3, drc_smooth_text);
 687
 688 static const struct snd_kcontrol_new wm8993_snd_controls[] = {
 689 SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8993_DIGITAL_SIDE_TONE,
 690                5, 9, 12, 0, sidetone_tlv),
 691
 692 SOC_SINGLE("DRC Switch", WM8993_DRC_CONTROL_1, 15, 1, 0),
 693 SOC_ENUM("DRC Path", drc_path),
 694 SOC_SINGLE_TLV("DRC Compressor Threshold Volume", WM8993_DRC_CONTROL_2,
 695                2, 60, 1, drc_comp_threash),
 696 SOC_SINGLE_TLV("DRC Compressor Amplitude Volume", WM8993_DRC_CONTROL_3,
 697                11, 30, 1, drc_comp_amp),
 698 SOC_ENUM("DRC R0", drc_r0),
 699 SOC_ENUM("DRC R1", drc_r1),
 700 SOC_SINGLE_TLV("DRC Minimum Volume", WM8993_DRC_CONTROL_1, 2, 3, 1,
 701                drc_min_tlv),
 702 SOC_SINGLE_TLV("DRC Maximum Volume", WM8993_DRC_CONTROL_1, 0, 3, 0,
 703                drc_max_tlv),
 704 SOC_ENUM("DRC Attack Rate", drc_attack),
 705 SOC_ENUM("DRC Decay Rate", drc_decay),
 706 SOC_ENUM("DRC FF Delay", drc_ff),
 707 SOC_SINGLE("DRC Anti-clip Switch", WM8993_DRC_CONTROL_1, 9, 1, 0),
 708 SOC_SINGLE("DRC Quick Release Switch", WM8993_DRC_CONTROL_1, 10, 1, 0),
 709 SOC_SINGLE_TLV("DRC Quick Release Volume", WM8993_DRC_CONTROL_3, 2, 3, 0,
 710                drc_qr_tlv),
 711 SOC_ENUM("DRC Quick Release Rate", drc_qr_rate),
 712 SOC_SINGLE("DRC Smoothing Switch", WM8993_DRC_CONTROL_1, 11, 1, 0),
 713 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8993_DRC_CONTROL_1, 8, 1, 0),
 714 SOC_ENUM("DRC Smoothing Hysteresis Threshold", drc_smooth),
 715 SOC_SINGLE_TLV("DRC Startup Volume", WM8993_DRC_CONTROL_4, 8, 18, 0,
 716                drc_startup_tlv),
 717
 718 SOC_SINGLE("EQ Switch", WM8993_EQ1, 0, 1, 0),
 719
 720 SOC_DOUBLE_R_TLV("Capture Volume", WM8993_LEFT_ADC_DIGITAL_VOLUME,
 721                  WM8993_RIGHT_ADC_DIGITAL_VOLUME, 1, 96, 0, digital_tlv),
 722 SOC_SINGLE("ADC High Pass Filter Switch", WM8993_ADC_CTRL, 8, 1, 0),
 723 SOC_ENUM("ADC High Pass Filter Mode", adc_hpf),
 724
 725 SOC_DOUBLE_R_TLV("Playback Volume", WM8993_LEFT_DAC_DIGITAL_VOLUME,
 726                  WM8993_RIGHT_DAC_DIGITAL_VOLUME, 1, 96, 0, digital_tlv),
 727 SOC_SINGLE_TLV("Playback Boost Volume", WM8993_AUDIO_INTERFACE_2, 10, 3, 0,
 728                dac_boost_tlv),
 729 SOC_ENUM("DAC Deemphasis", dac_deemph),
 730
 731 SOC_SINGLE_TLV("SPKL DAC Volume", WM8993_SPKMIXL_ATTENUATION,
 732                2, 1, 1, wm_hubs_spkmix_tlv),
 733
 734 SOC_SINGLE_TLV("SPKR DAC Volume", WM8993_SPKMIXR_ATTENUATION,
 735                2, 1, 1, wm_hubs_spkmix_tlv),
 736 };
 737
 738 static const struct snd_kcontrol_new wm8993_eq_controls[] = {
 739 SOC_SINGLE_TLV("EQ1 Volume", WM8993_EQ2, 0, 24, 0, eq_tlv),
 740 SOC_SINGLE_TLV("EQ2 Volume", WM8993_EQ3, 0, 24, 0, eq_tlv),
 741 SOC_SINGLE_TLV("EQ3 Volume", WM8993_EQ4, 0, 24, 0, eq_tlv),
 742 SOC_SINGLE_TLV("EQ4 Volume", WM8993_EQ5, 0, 24, 0, eq_tlv),
 743 SOC_SINGLE_TLV("EQ5 Volume", WM8993_EQ6, 0, 24, 0, eq_tlv),
 744 };
 745
 746 static int clk_sys_event(struct snd_soc_dapm_widget *w,
 747                          struct snd_kcontrol *kcontrol, int event)
 748 {
 749         struct snd_soc_codec *codec = w->codec;
 750
 751         switch (event) {
 752         case SND_SOC_DAPM_PRE_PMU:
 753                 return configure_clock(codec);
 754
 755         case SND_SOC_DAPM_POST_PMD:
 756                 break;
 757         }
 758
 759         return 0;
 760 }
 761
 762 /*
 763  * When used with DAC outputs only the WM8993 charge pump supports
 764  * operation in class W mode, providing very low power consumption
 765  * when used with digital sources.  Enable and disable this mode
 766  * automatically depending on the mixer configuration.
 767  *
 768  * Currently the only supported paths are the direct DAC->headphone
 769  * paths (which provide minimum power consumption anyway).
 770  */
 771 static int class_w_put(struct snd_kcontrol *kcontrol,
 772                        struct snd_ctl_elem_value *ucontrol)
 773 {
 774         struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol);
 775         struct snd_soc_codec *codec = widget->codec;
 776         struct wm8993_priv *wm8993 = codec->private_data;
 777         int ret;
 778
 779         /* Turn it off if we're using the main output mixer */
 780         if (ucontrol->value.integer.value[0] == 0) {
 781                 if (wm8993->class_w_users == 0) {
 782                         dev_dbg(codec->dev, "Disabling Class W\n");
 783                         snd_soc_update_bits(codec, WM8993_CLASS_W_0,
 784                                             WM8993_CP_DYN_FREQ |
 785                                             WM8993_CP_DYN_V,
 786                                             0);
 787                 }
 788                 wm8993->class_w_users++;
 789         }
 790
 791         /* Implement the change */
 792         ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
 793
 794         /* Enable it if we're using the direct DAC path */
 795         if (ucontrol->value.integer.value[0] == 1) {
 796                 if (wm8993->class_w_users == 1) {
 797                         dev_dbg(codec->dev, "Enabling Class W\n");
 798                         snd_soc_update_bits(codec, WM8993_CLASS_W_0,
 799                                             WM8993_CP_DYN_FREQ |
 800                                             WM8993_CP_DYN_V,
 801                                             WM8993_CP_DYN_FREQ |
 802                                             WM8993_CP_DYN_V);
 803                 }
 804                 wm8993->class_w_users--;
 805         }
 806
 807         dev_dbg(codec->dev, "Indirect DAC use count now %d\n",
 808                 wm8993->class_w_users);
 809
 810         return ret;
 811 }
 812
 813 #define SOC_DAPM_ENUM_W(xname, xenum) \
 814 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 815         .info = snd_soc_info_enum_double, \
 816         .get = snd_soc_dapm_get_enum_double, \
 817         .put = class_w_put, \
 818         .private_value = (unsigned long)&xenum }
 819
 820 static const char *hp_mux_text[] = {
 821         "Mixer",
 822         "DAC",
 823 };
 824
 825 static const struct soc_enum hpl_enum =
 826         SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text);
 827
 828 static const struct snd_kcontrol_new hpl_mux =
 829         SOC_DAPM_ENUM_W("Left Headphone Mux", hpl_enum);
 830
 831 static const struct soc_enum hpr_enum =
 832         SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text);
 833
 834 static const struct snd_kcontrol_new hpr_mux =
 835         SOC_DAPM_ENUM_W("Right Headphone Mux", hpr_enum);
 836
 837 static const struct snd_kcontrol_new left_speaker_mixer[] = {
 838 SOC_DAPM_SINGLE("Input Switch", WM8993_SPEAKER_MIXER, 7, 1, 0),
 839 SOC_DAPM_SINGLE("IN1LP Switch", WM8993_SPEAKER_MIXER, 5, 1, 0),
 840 SOC_DAPM_SINGLE("Output Switch", WM8993_SPEAKER_MIXER, 3, 1, 0),
 841 SOC_DAPM_SINGLE("DAC Switch", WM8993_SPEAKER_MIXER, 6, 1, 0),
 842 };
 843
 844 static const struct snd_kcontrol_new right_speaker_mixer[] = {
 845 SOC_DAPM_SINGLE("Input Switch", WM8993_SPEAKER_MIXER, 6, 1, 0),
 846 SOC_DAPM_SINGLE("IN1RP Switch", WM8993_SPEAKER_MIXER, 4, 1, 0),
 847 SOC_DAPM_SINGLE("Output Switch", WM8993_SPEAKER_MIXER, 2, 1, 0),
 848 SOC_DAPM_SINGLE("DAC Switch", WM8993_SPEAKER_MIXER, 0, 1, 0),
 849 };
 850
 851 static const char *aif_text[] = {
 852         "Left", "Right"
 853 };
 854
 855 static const struct soc_enum aifoutl_enum =
 856         SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_1, 15, 2, aif_text);
 857
 858 static const struct snd_kcontrol_new aifoutl_mux =
 859         SOC_DAPM_ENUM("AIFOUTL Mux", aifoutl_enum);
 860
 861 static const struct soc_enum aifoutr_enum =
 862         SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_1, 14, 2, aif_text);
 863
 864 static const struct snd_kcontrol_new aifoutr_mux =
 865         SOC_DAPM_ENUM("AIFOUTR Mux", aifoutr_enum);
 866
 867 static const struct soc_enum aifinl_enum =
 868         SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_2, 15, 2, aif_text);
 869
 870 static const struct snd_kcontrol_new aifinl_mux =
 871         SOC_DAPM_ENUM("AIFINL Mux", aifinl_enum);
 872
 873 static const struct soc_enum aifinr_enum =
 874         SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_2, 14, 2, aif_text);
 875
 876 static const struct snd_kcontrol_new aifinr_mux =
 877         SOC_DAPM_ENUM("AIFINR Mux", aifinr_enum);
 878
 879 static const char *sidetone_text[] = {
 880         "None", "Left", "Right"
 881 };
 882
 883 static const struct soc_enum sidetonel_enum =
 884         SOC_ENUM_SINGLE(WM8993_DIGITAL_SIDE_TONE, 2, 3, sidetone_text);
 885
 886 static const struct snd_kcontrol_new sidetonel_mux =
 887         SOC_DAPM_ENUM("Left Sidetone", sidetonel_enum);
 888
 889 static const struct soc_enum sidetoner_enum =
 890         SOC_ENUM_SINGLE(WM8993_DIGITAL_SIDE_TONE, 0, 3, sidetone_text);
 891
 892 static const struct snd_kcontrol_new sidetoner_mux =
 893         SOC_DAPM_ENUM("Right Sidetone", sidetoner_enum);
 894
 895 static const struct snd_soc_dapm_widget wm8993_dapm_widgets[] = {
 896 SND_SOC_DAPM_SUPPLY("CLK_SYS", WM8993_BUS_CONTROL_1, 1, 0, clk_sys_event,
 897                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 898 SND_SOC_DAPM_SUPPLY("TOCLK", WM8993_CLOCKING_1, 14, 0, NULL, 0),
 899 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8993_CLOCKING_3, 0, 0, NULL, 0),
 900
 901 SND_SOC_DAPM_ADC("ADCL", NULL, WM8993_POWER_MANAGEMENT_2, 1, 0),
 902 SND_SOC_DAPM_ADC("ADCR", NULL, WM8993_POWER_MANAGEMENT_2, 0, 0),
 903
 904 SND_SOC_DAPM_MUX("AIFOUTL Mux", SND_SOC_NOPM, 0, 0, &aifoutl_mux),
 905 SND_SOC_DAPM_MUX("AIFOUTR Mux", SND_SOC_NOPM, 0, 0, &aifoutr_mux),
 906
 907 SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
 908 SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
 909
 910 SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
 911 SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
 912
 913 SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &aifinl_mux),
 914 SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &aifinr_mux),
 915
 916 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &sidetonel_mux),
 917 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &sidetoner_mux),
 918
 919 SND_SOC_DAPM_DAC("DACL", NULL, WM8993_POWER_MANAGEMENT_3, 1, 0),
 920 SND_SOC_DAPM_DAC("DACR", NULL, WM8993_POWER_MANAGEMENT_3, 0, 0),
 921
 922 SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux),
 923 SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux),
 924
 925 SND_SOC_DAPM_MIXER("SPKL", WM8993_POWER_MANAGEMENT_3, 8, 0,
 926                    left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
 927 SND_SOC_DAPM_MIXER("SPKR", WM8993_POWER_MANAGEMENT_3, 9, 0,
 928                    right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)),
 929
 930 };
 931
 932 static const struct snd_soc_dapm_route routes[] = {
 933         { "ADCL", NULL, "CLK_SYS" },
 934         { "ADCL", NULL, "CLK_DSP" },
 935         { "ADCR", NULL, "CLK_SYS" },
 936         { "ADCR", NULL, "CLK_DSP" },
 937
 938         { "AIFOUTL Mux", "Left", "ADCL" },
 939         { "AIFOUTL Mux", "Right", "ADCR" },
 940         { "AIFOUTR Mux", "Left", "ADCL" },
 941         { "AIFOUTR Mux", "Right", "ADCR" },
 942
 943         { "AIFOUTL", NULL, "AIFOUTL Mux" },
 944         { "AIFOUTR", NULL, "AIFOUTR Mux" },
 945
 946         { "DACL Mux", "Left", "AIFINL" },
 947         { "DACL Mux", "Right", "AIFINR" },
 948         { "DACR Mux", "Left", "AIFINL" },
 949         { "DACR Mux", "Right", "AIFINR" },
 950
 951         { "DACL Sidetone", "Left", "ADCL" },
 952         { "DACL Sidetone", "Right", "ADCR" },
 953         { "DACR Sidetone", "Left", "ADCL" },
 954         { "DACR Sidetone", "Right", "ADCR" },
 955
 956         { "DACL", NULL, "CLK_SYS" },
 957         { "DACL", NULL, "CLK_DSP" },
 958         { "DACL", NULL, "DACL Mux" },
 959         { "DACL", NULL, "DACL Sidetone" },
 960         { "DACR", NULL, "CLK_SYS" },
 961         { "DACR", NULL, "CLK_DSP" },
 962         { "DACR", NULL, "DACR Mux" },
 963         { "DACR", NULL, "DACR Sidetone" },
 964
 965         { "Left Output Mixer", "DAC Switch", "DACL" },
 966
 967         { "Right Output Mixer", "DAC Switch", "DACR" },
 968
 969         { "Left Output PGA", NULL, "CLK_SYS" },
 970
 971         { "Right Output PGA", NULL, "CLK_SYS" },
 972
 973         { "SPKL", "DAC Switch", "DACL" },
 974         { "SPKL", NULL, "CLK_SYS" },
 975
 976         { "SPKR", "DAC Switch", "DACR" },
 977         { "SPKR", NULL, "CLK_SYS" },
 978
 979         { "Left Headphone Mux", "DAC", "DACL" },
 980         { "Right Headphone Mux", "DAC", "DACR" },
 981 };
 982
 983 static int wm8993_set_bias_level(struct snd_soc_codec *codec,
 984                                  enum snd_soc_bias_level level)
 985 {
 986         struct wm8993_priv *wm8993 = codec->private_data;
 987
 988         switch (level) {
 989         case SND_SOC_BIAS_ON:
 990         case SND_SOC_BIAS_PREPARE:
 991                 /* VMID=2*40k */
 992                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
 993                                     WM8993_VMID_SEL_MASK, 0x2);
 994                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_2,
 995                                     WM8993_TSHUT_ENA, WM8993_TSHUT_ENA);
 996                 break;
 997
 998         case SND_SOC_BIAS_STANDBY:
 999                 if (codec->bias_level == SND_SOC_BIAS_OFF) {
1000                         /* Bring up VMID with fast soft start */
1001                         snd_soc_update_bits(codec, WM8993_ANTIPOP2,
1002                                             WM8993_STARTUP_BIAS_ENA |
1003                                             WM8993_VMID_BUF_ENA |
1004                                             WM8993_VMID_RAMP_MASK |
1005                                             WM8993_BIAS_SRC,
1006                                             WM8993_STARTUP_BIAS_ENA |
1007                                             WM8993_VMID_BUF_ENA |
1008                                             WM8993_VMID_RAMP_MASK |
1009                                             WM8993_BIAS_SRC);
1010
1011                         /* If either line output is single ended we
1012                          * need the VMID buffer */
1013                         if (!wm8993->pdata.lineout1_diff ||
1014                             !wm8993->pdata.lineout2_diff)
1015                                 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1016                                                  WM8993_LINEOUT_VMID_BUF_ENA,
1017                                                  WM8993_LINEOUT_VMID_BUF_ENA);
1018
1019                         /* VMID=2*40k */
1020                         snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1021                                             WM8993_VMID_SEL_MASK |
1022                                             WM8993_BIAS_ENA,
1023                                             WM8993_BIAS_ENA | 0x2);
1024                         msleep(32);
1025
1026                         /* Switch to normal bias */
1027                         snd_soc_update_bits(codec, WM8993_ANTIPOP2,
1028                                             WM8993_BIAS_SRC |
1029                                             WM8993_STARTUP_BIAS_ENA, 0);
1030                 }
1031
1032                 /* VMID=2*240k */
1033                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1034                                     WM8993_VMID_SEL_MASK, 0x4);
1035
1036                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_2,
1037                                     WM8993_TSHUT_ENA, 0);
1038                 break;
1039
1040         case SND_SOC_BIAS_OFF:
1041                 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1042                                     WM8993_LINEOUT_VMID_BUF_ENA, 0);
1043
1044                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1045                                     WM8993_VMID_SEL_MASK | WM8993_BIAS_ENA,
1046                                     0);
1047                 break;
1048         }
1049
1050         codec->bias_level = level;
1051
1052         return 0;
1053 }
1054
1055 static int wm8993_set_sysclk(struct snd_soc_dai *codec_dai,
1056                              int clk_id, unsigned int freq, int dir)
1057 {
1058         struct snd_soc_codec *codec = codec_dai->codec;
1059         struct wm8993_priv *wm8993 = codec->private_data;
1060
1061         switch (clk_id) {
1062         case WM8993_SYSCLK_MCLK:
1063                 wm8993->mclk_rate = freq;
1064         case WM8993_SYSCLK_FLL:
1065                 wm8993->sysclk_source = clk_id;
1066                 break;
1067
1068         default:
1069                 return -EINVAL;
1070         }
1071
1072         return 0;
1073 }
1074
1075 static int wm8993_set_dai_fmt(struct snd_soc_dai *dai,
1076                               unsigned int fmt)
1077 {
1078         struct snd_soc_codec *codec = dai->codec;
1079         struct wm8993_priv *wm8993 = codec->private_data;
1080         unsigned int aif1 = wm8993_read(codec, WM8993_AUDIO_INTERFACE_1);
1081         unsigned int aif4 = wm8993_read(codec, WM8993_AUDIO_INTERFACE_4);
1082
1083         aif1 &= ~(WM8993_BCLK_DIR | WM8993_AIF_BCLK_INV |
1084                   WM8993_AIF_LRCLK_INV | WM8993_AIF_FMT_MASK);
1085         aif4 &= ~WM8993_LRCLK_DIR;
1086
1087         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1088         case SND_SOC_DAIFMT_CBS_CFS:
1089                 wm8993->master = 0;
1090                 break;
1091         case SND_SOC_DAIFMT_CBS_CFM:
1092                 aif4 |= WM8993_LRCLK_DIR;
1093                 wm8993->master = 1;
1094                 break;
1095         case SND_SOC_DAIFMT_CBM_CFS:
1096                 aif1 |= WM8993_BCLK_DIR;
1097                 wm8993->master = 1;
1098                 break;
1099         case SND_SOC_DAIFMT_CBM_CFM:
1100                 aif1 |= WM8993_BCLK_DIR;
1101                 aif4 |= WM8993_LRCLK_DIR;
1102                 wm8993->master = 1;
1103                 break;
1104         default:
1105                 return -EINVAL;
1106         }
1107
1108         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1109         case SND_SOC_DAIFMT_DSP_B:
1110                 aif1 |= WM8993_AIF_LRCLK_INV;
1111         case SND_SOC_DAIFMT_DSP_A:
1112                 aif1 |= 0x18;
1113                 break;
1114         case SND_SOC_DAIFMT_I2S:
1115                 aif1 |= 0x10;
1116                 break;
1117         case SND_SOC_DAIFMT_RIGHT_J:
1118                 break;
1119         case SND_SOC_DAIFMT_LEFT_J:
1120                 aif1 |= 0x8;
1121                 break;
1122         default:
1123                 return -EINVAL;
1124         }
1125
1126         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1127         case SND_SOC_DAIFMT_DSP_A:
1128         case SND_SOC_DAIFMT_DSP_B:
1129                 /* frame inversion not valid for DSP modes */
1130                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1131                 case SND_SOC_DAIFMT_NB_NF:
1132                         break;
1133                 case SND_SOC_DAIFMT_IB_NF:
1134                         aif1 |= WM8993_AIF_BCLK_INV;
1135                         break;
1136                 default:
1137                         return -EINVAL;
1138                 }
1139                 break;
1140
1141         case SND_SOC_DAIFMT_I2S:
1142         case SND_SOC_DAIFMT_RIGHT_J:
1143         case SND_SOC_DAIFMT_LEFT_J:
1144                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1145                 case SND_SOC_DAIFMT_NB_NF:
1146                         break;
1147                 case SND_SOC_DAIFMT_IB_IF:
1148                         aif1 |= WM8993_AIF_BCLK_INV | WM8993_AIF_LRCLK_INV;
1149                         break;
1150                 case SND_SOC_DAIFMT_IB_NF:
1151                         aif1 |= WM8993_AIF_BCLK_INV;
1152                         break;
1153                 case SND_SOC_DAIFMT_NB_IF:
1154                         aif1 |= WM8993_AIF_LRCLK_INV;
1155                         break;
1156                 default:
1157                         return -EINVAL;
1158                 }
1159                 break;
1160         default:
1161                 return -EINVAL;
1162         }
1163
1164         wm8993_write(codec, WM8993_AUDIO_INTERFACE_1, aif1);
1165         wm8993_write(codec, WM8993_AUDIO_INTERFACE_4, aif4);
1166
1167         return 0;
1168 }
1169
1170 static int wm8993_hw_params(struct snd_pcm_substream *substream,
1171                             struct snd_pcm_hw_params *params,
1172                             struct snd_soc_dai *dai)
1173 {
1174         struct snd_soc_codec *codec = dai->codec;
1175         struct wm8993_priv *wm8993 = codec->private_data;
1176         int ret, i, best, best_val, cur_val;
1177         unsigned int clocking1, clocking3, aif1, aif4;
1178
1179         clocking1 = wm8993_read(codec, WM8993_CLOCKING_1);
1180         clocking1 &= ~WM8993_BCLK_DIV_MASK;
1181
1182         clocking3 = wm8993_read(codec, WM8993_CLOCKING_3);
1183         clocking3 &= ~(WM8993_CLK_SYS_RATE_MASK | WM8993_SAMPLE_RATE_MASK);
1184
1185         aif1 = wm8993_read(codec, WM8993_AUDIO_INTERFACE_1);
1186         aif1 &= ~WM8993_AIF_WL_MASK;
1187
1188         aif4 = wm8993_read(codec, WM8993_AUDIO_INTERFACE_4);
1189         aif4 &= ~WM8993_LRCLK_RATE_MASK;
1190
1191         /* What BCLK do we need? */
1192         wm8993->fs = params_rate(params);
1193         wm8993->bclk = 2 * wm8993->fs;
1194         if (wm8993->tdm_slots) {
1195                 dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n",
1196                         wm8993->tdm_slots, wm8993->tdm_width);
1197                 wm8993->bclk *= wm8993->tdm_width * wm8993->tdm_slots;
1198         } else {
1199                 switch (params_format(params)) {
1200                 case SNDRV_PCM_FORMAT_S16_LE:
1201                         wm8993->bclk *= 16;
1202                         break;
1203                 case SNDRV_PCM_FORMAT_S20_3LE:
1204                         wm8993->bclk *= 20;
1205                         aif1 |= 0x8;
1206                         break;
1207                 case SNDRV_PCM_FORMAT_S24_LE:
1208                         wm8993->bclk *= 24;
1209                         aif1 |= 0x10;
1210                         break;
1211                 case SNDRV_PCM_FORMAT_S32_LE:
1212                         wm8993->bclk *= 32;
1213                         aif1 |= 0x18;
1214                         break;
1215                 default:
1216                         return -EINVAL;
1217                 }
1218         }
1219
1220         dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8993->bclk);
1221
1222         ret = configure_clock(codec);
1223         if (ret != 0)
1224                 return ret;
1225
1226         /* Select nearest CLK_SYS_RATE */
1227         best = 0;
1228         best_val = abs((wm8993->sysclk_rate / clk_sys_rates[0].ratio)
1229                        - wm8993->fs);
1230         for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) {
1231                 cur_val = abs((wm8993->sysclk_rate /
1232                                clk_sys_rates[i].ratio) - wm8993->fs);;
1233                 if (cur_val < best_val) {
1234                         best = i;
1235                         best_val = cur_val;
1236                 }
1237         }
1238         dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n",
1239                 clk_sys_rates[best].ratio);
1240         clocking3 |= (clk_sys_rates[best].clk_sys_rate
1241                       << WM8993_CLK_SYS_RATE_SHIFT);
1242
1243         /* SAMPLE_RATE */
1244         best = 0;
1245         best_val = abs(wm8993->fs - sample_rates[0].rate);
1246         for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1247                 /* Closest match */
1248                 cur_val = abs(wm8993->fs - sample_rates[i].rate);
1249                 if (cur_val < best_val) {
1250                         best = i;
1251                         best_val = cur_val;
1252                 }
1253         }
1254         dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n",
1255                 sample_rates[best].rate);
1256         clocking3 |= (sample_rates[best].sample_rate
1257                       << WM8993_SAMPLE_RATE_SHIFT);
1258
1259         /* BCLK_DIV */
1260         best = 0;
1261         best_val = INT_MAX;
1262         for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) {
1263                 cur_val = ((wm8993->sysclk_rate * 10) / bclk_divs[i].div)
1264                         - wm8993->bclk;
1265                 if (cur_val < 0) /* Table is sorted */
1266                         break;
1267                 if (cur_val < best_val) {
1268                         best = i;
1269                         best_val = cur_val;
1270                 }
1271         }
1272         wm8993->bclk = (wm8993->sysclk_rate * 10) / bclk_divs[best].div;
1273         dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n",
1274                 bclk_divs[best].div, wm8993->bclk);
1275         clocking1 |= bclk_divs[best].bclk_div << WM8993_BCLK_DIV_SHIFT;
1276
1277         /* LRCLK is a simple fraction of BCLK */
1278         dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8993->bclk / wm8993->fs);
1279         aif4 |= wm8993->bclk / wm8993->fs;
1280
1281         wm8993_write(codec, WM8993_CLOCKING_1, clocking1);
1282         wm8993_write(codec, WM8993_CLOCKING_3, clocking3);
1283         wm8993_write(codec, WM8993_AUDIO_INTERFACE_1, aif1);
1284         wm8993_write(codec, WM8993_AUDIO_INTERFACE_4, aif4);
1285
1286         /* ReTune Mobile? */
1287         if (wm8993->pdata.num_retune_configs) {
1288                 u16 eq1 = wm8993_read(codec, WM8993_EQ1);
1289                 struct wm8993_retune_mobile_setting *s;
1290
1291                 best = 0;
1292                 best_val = abs(wm8993->pdata.retune_configs[0].rate
1293                                - wm8993->fs);
1294                 for (i = 0; i < wm8993->pdata.num_retune_configs; i++) {
1295                         cur_val = abs(wm8993->pdata.retune_configs[i].rate
1296                                       - wm8993->fs);
1297                         if (cur_val < best_val) {
1298                                 best_val = cur_val;
1299                                 best = i;
1300                         }
1301                 }
1302                 s = &wm8993->pdata.retune_configs[best];
1303
1304                 dev_dbg(codec->dev, "ReTune Mobile %s tuned for %dHz\n",
1305                         s->name, s->rate);
1306
1307                 /* Disable EQ while we reconfigure */
1308                 snd_soc_update_bits(codec, WM8993_EQ1, WM8993_EQ_ENA, 0);
1309
1310                 for (i = 1; i < ARRAY_SIZE(s->config); i++)
1311                         wm8993_write(codec, WM8993_EQ1 + i, s->config[i]);
1312
1313                 snd_soc_update_bits(codec, WM8993_EQ1, WM8993_EQ_ENA, eq1);
1314         }
1315
1316         return 0;
1317 }
1318
1319 static int wm8993_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1320 {
1321         struct snd_soc_codec *codec = codec_dai->codec;
1322         unsigned int reg;
1323
1324         reg = wm8993_read(codec, WM8993_DAC_CTRL);
1325
1326         if (mute)
1327                 reg |= WM8993_DAC_MUTE;
1328         else
1329                 reg &= ~WM8993_DAC_MUTE;
1330
1331         wm8993_write(codec, WM8993_DAC_CTRL, reg);
1332
1333         return 0;
1334 }
1335
1336 static int wm8993_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1337                                unsigned int rx_mask, int slots, int slot_width)
1338 {
1339         struct snd_soc_codec *codec = dai->codec;
1340         struct wm8993_priv *wm8993 = codec->private_data;
1341         int aif1 = 0;
1342         int aif2 = 0;
1343
1344         /* Don't need to validate anything if we're turning off TDM */
1345         if (slots == 0) {
1346                 wm8993->tdm_slots = 0;
1347                 goto out;
1348         }
1349
1350         /* Note that we allow configurations we can't handle ourselves -
1351          * for example, we can generate clocks for slots 2 and up even if
1352          * we can't use those slots ourselves.
1353          */
1354         aif1 |= WM8993_AIFADC_TDM;
1355         aif2 |= WM8993_AIFDAC_TDM;
1356
1357         switch (rx_mask) {
1358         case 3:
1359                 break;
1360         case 0xc:
1361                 aif1 |= WM8993_AIFADC_TDM_CHAN;
1362                 break;
1363         default:
1364                 return -EINVAL;
1365         }
1366
1367
1368         switch (tx_mask) {
1369         case 3:
1370                 break;
1371         case 0xc:
1372                 aif2 |= WM8993_AIFDAC_TDM_CHAN;
1373                 break;
1374         default:
1375                 return -EINVAL;
1376         }
1377
1378 out:
1379         wm8993->tdm_width = slot_width;
1380         wm8993->tdm_slots = slots / 2;
1381
1382         snd_soc_update_bits(codec, WM8993_AUDIO_INTERFACE_1,
1383                             WM8993_AIFADC_TDM | WM8993_AIFADC_TDM_CHAN, aif1);
1384         snd_soc_update_bits(codec, WM8993_AUDIO_INTERFACE_2,
1385                             WM8993_AIFDAC_TDM | WM8993_AIFDAC_TDM_CHAN, aif2);
1386
1387         return 0;
1388 }
1389
1390 static struct snd_soc_dai_ops wm8993_ops = {
1391         .set_sysclk = wm8993_set_sysclk,
1392         .set_fmt = wm8993_set_dai_fmt,
1393         .hw_params = wm8993_hw_params,
1394         .digital_mute = wm8993_digital_mute,
1395         .set_pll = wm8993_set_fll,
1396         .set_tdm_slot = wm8993_set_tdm_slot,
1397 };
1398
1399 #define WM8993_RATES SNDRV_PCM_RATE_8000_48000
1400
1401 #define WM8993_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1402                         SNDRV_PCM_FMTBIT_S20_3LE |\
1403                         SNDRV_PCM_FMTBIT_S24_LE |\
1404                         SNDRV_PCM_FMTBIT_S32_LE)
1405
1406 struct snd_soc_dai wm8993_dai = {
1407         .name = "WM8993",
1408         .playback = {
1409                 .stream_name = "Playback",
1410                 .channels_min = 1,
1411                 .channels_max = 2,
1412                 .rates = WM8993_RATES,
1413                 .formats = WM8993_FORMATS,
1414         },
1415         .capture = {
1416                  .stream_name = "Capture",
1417                  .channels_min = 1,
1418                  .channels_max = 2,
1419                  .rates = WM8993_RATES,
1420                  .formats = WM8993_FORMATS,
1421          },
1422         .ops = &wm8993_ops,
1423         .symmetric_rates = 1,
1424 };
1425 EXPORT_SYMBOL_GPL(wm8993_dai);
1426
1427 static struct snd_soc_codec *wm8993_codec;
1428
1429 static int wm8993_probe(struct platform_device *pdev)
1430 {
1431         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1432         struct snd_soc_codec *codec;
1433         struct wm8993_priv *wm8993;
1434         int ret = 0;
1435
1436         if (!wm8993_codec) {
1437                 dev_err(&pdev->dev, "I2C device not yet probed\n");
1438                 goto err;
1439         }
1440
1441         socdev->card->codec = wm8993_codec;
1442         codec = wm8993_codec;
1443         wm8993 = codec->private_data;
1444
1445         ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1446         if (ret < 0) {
1447                 dev_err(codec->dev, "failed to create pcms\n");
1448                 goto err;
1449         }
1450
1451         snd_soc_add_controls(codec, wm8993_snd_controls,
1452                              ARRAY_SIZE(wm8993_snd_controls));
1453         if (wm8993->pdata.num_retune_configs != 0) {
1454                 dev_dbg(codec->dev, "Using ReTune Mobile\n");
1455         } else {
1456                 dev_dbg(codec->dev, "No ReTune Mobile, using normal EQ\n");
1457                 snd_soc_add_controls(codec, wm8993_eq_controls,
1458                                      ARRAY_SIZE(wm8993_eq_controls));
1459         }
1460
1461         snd_soc_dapm_new_controls(codec, wm8993_dapm_widgets,
1462                                   ARRAY_SIZE(wm8993_dapm_widgets));
1463         wm_hubs_add_analogue_controls(codec);
1464
1465         snd_soc_dapm_add_routes(codec, routes, ARRAY_SIZE(routes));
1466         wm_hubs_add_analogue_routes(codec, wm8993->pdata.lineout1_diff,
1467                                     wm8993->pdata.lineout2_diff);
1468
1469         return ret;
1470
1471 err:
1472         return ret;
1473 }
1474
1475 static int wm8993_remove(struct platform_device *pdev)
1476 {
1477         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1478
1479         snd_soc_free_pcms(socdev);
1480         snd_soc_dapm_free(socdev);
1481
1482         return 0;
1483 }
1484
1485 #ifdef CONFIG_PM
1486 static int wm8993_suspend(struct platform_device *pdev, pm_message_t state)
1487 {
1488         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1489         struct snd_soc_codec *codec = socdev->card->codec;
1490         struct wm8993_priv *wm8993 = codec->private_data;
1491         int fll_fout = wm8993->fll_fout;
1492         int fll_fref  = wm8993->fll_fref;
1493         int ret;
1494
1495         /* Stop the FLL in an orderly fashion */
1496         ret = wm8993_set_fll(codec->dai, 0, 0, 0, 0);
1497         if (ret != 0) {
1498                 dev_err(&pdev->dev, "Failed to stop FLL\n");
1499                 return ret;
1500         }
1501
1502         wm8993->fll_fout = fll_fout;
1503         wm8993->fll_fref = fll_fref;
1504
1505         wm8993_set_bias_level(codec, SND_SOC_BIAS_OFF);
1506
1507         return 0;
1508 }
1509
1510 static int wm8993_resume(struct platform_device *pdev)
1511 {
1512         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1513         struct snd_soc_codec *codec = socdev->card->codec;
1514         struct wm8993_priv *wm8993 = codec->private_data;
1515         u16 *cache = wm8993->reg_cache;
1516         int i, ret;
1517
1518         /* Restore the register settings */
1519         for (i = 1; i < WM8993_MAX_REGISTER; i++) {
1520                 if (cache[i] == wm8993_reg_defaults[i])
1521                         continue;
1522                 snd_soc_write(codec, i, cache[i]);
1523         }
1524
1525         wm8993_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1526
1527         /* Restart the FLL? */
1528         if (wm8993->fll_fout) {
1529                 int fll_fout = wm8993->fll_fout;
1530                 int fll_fref  = wm8993->fll_fref;
1531
1532                 wm8993->fll_fref = 0;
1533                 wm8993->fll_fout = 0;
1534
1535                 ret = wm8993_set_fll(codec->dai, 0, wm8993->fll_src,
1536                                      fll_fref, fll_fout);
1537                 if (ret != 0)
1538                         dev_err(codec->dev, "Failed to restart FLL\n");
1539         }
1540
1541         return 0;
1542 }
1543 #else
1544 #define wm8993_suspend NULL
1545 #define wm8993_resume NULL
1546 #endif
1547
1548 struct snd_soc_codec_device soc_codec_dev_wm8993 = {
1549         .probe =        wm8993_probe,
1550         .remove =       wm8993_remove,
1551         .suspend =      wm8993_suspend,
1552         .resume =       wm8993_resume,
1553 };
1554 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8993);
1555
1556 static int wm8993_i2c_probe(struct i2c_client *i2c,
1557                             const struct i2c_device_id *id)
1558 {
1559         struct wm8993_priv *wm8993;
1560         struct snd_soc_codec *codec;
1561         unsigned int val;
1562         int ret;
1563
1564         if (wm8993_codec) {
1565                 dev_err(&i2c->dev, "A WM8993 is already registered\n");
1566                 return -EINVAL;
1567         }
1568
1569         wm8993 = kzalloc(sizeof(struct wm8993_priv), GFP_KERNEL);
1570         if (wm8993 == NULL)
1571                 return -ENOMEM;
1572
1573         codec = &wm8993->codec;
1574         if (i2c->dev.platform_data)
1575                 memcpy(&wm8993->pdata, i2c->dev.platform_data,
1576                        sizeof(wm8993->pdata));
1577
1578         mutex_init(&codec->mutex);
1579         INIT_LIST_HEAD(&codec->dapm_widgets);
1580         INIT_LIST_HEAD(&codec->dapm_paths);
1581
1582         codec->name = "WM8993";
1583         codec->read = wm8993_read;
1584         codec->write = wm8993_write;
1585         codec->hw_write = (hw_write_t)i2c_master_send;
1586         codec->reg_cache = wm8993->reg_cache;
1587         codec->reg_cache_size = ARRAY_SIZE(wm8993->reg_cache);
1588         codec->bias_level = SND_SOC_BIAS_OFF;
1589         codec->set_bias_level = wm8993_set_bias_level;
1590         codec->dai = &wm8993_dai;
1591         codec->num_dai = 1;
1592         codec->private_data = wm8993;
1593
1594         memcpy(wm8993->reg_cache, wm8993_reg_defaults,
1595                sizeof(wm8993->reg_cache));
1596
1597         i2c_set_clientdata(i2c, wm8993);
1598         codec->control_data = i2c;
1599         wm8993_codec = codec;
1600
1601         codec->dev = &i2c->dev;
1602
1603         val = wm8993_read_hw(codec, WM8993_SOFTWARE_RESET);
1604         if (val != wm8993_reg_defaults[WM8993_SOFTWARE_RESET]) {
1605                 dev_err(codec->dev, "Invalid ID register value %x\n", val);
1606                 ret = -EINVAL;
1607                 goto err;
1608         }
1609
1610         ret = wm8993_write(codec, WM8993_SOFTWARE_RESET, 0xffff);
1611         if (ret != 0)
1612                 goto err;
1613
1614         /* By default we're using the output mixers */
1615         wm8993->class_w_users = 2;
1616
1617         /* Latch volume update bits and default ZC on */
1618         snd_soc_update_bits(codec, WM8993_RIGHT_DAC_DIGITAL_VOLUME,
1619                             WM8993_DAC_VU, WM8993_DAC_VU);
1620         snd_soc_update_bits(codec, WM8993_RIGHT_ADC_DIGITAL_VOLUME,
1621                             WM8993_ADC_VU, WM8993_ADC_VU);
1622
1623         /* Manualy manage the HPOUT sequencing for independent stereo
1624          * control. */
1625         snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
1626                             WM8993_HPOUT1_AUTO_PU, 0);
1627
1628         /* Use automatic clock configuration */
1629         snd_soc_update_bits(codec, WM8993_CLOCKING_4, WM8993_SR_MODE, 0);
1630
1631         wm_hubs_handle_analogue_pdata(codec, wm8993->pdata.lineout1_diff,
1632                                       wm8993->pdata.lineout2_diff,
1633                                       wm8993->pdata.lineout1fb,
1634                                       wm8993->pdata.lineout2fb,
1635                                       wm8993->pdata.jd_scthr,
1636                                       wm8993->pdata.jd_thr,
1637                                       wm8993->pdata.micbias1_lvl,
1638                                       wm8993->pdata.micbias2_lvl);
1639
1640         ret = wm8993_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1641         if (ret != 0)
1642                 goto err;
1643
1644         wm8993_dai.dev = codec->dev;
1645
1646         ret = snd_soc_register_dai(&wm8993_dai);
1647         if (ret != 0)
1648                 goto err_bias;
1649
1650         ret = snd_soc_register_codec(codec);
1651
1652         return 0;
1653
1654 err_bias:
1655         wm8993_set_bias_level(codec, SND_SOC_BIAS_OFF);
1656 err:
1657         wm8993_codec = NULL;
1658         kfree(wm8993);
1659         return ret;
1660 }
1661
1662 static int wm8993_i2c_remove(struct i2c_client *client)
1663 {
1664         struct wm8993_priv *wm8993 = i2c_get_clientdata(client);
1665
1666         snd_soc_unregister_codec(&wm8993->codec);
1667         snd_soc_unregister_dai(&wm8993_dai);
1668
1669         wm8993_set_bias_level(&wm8993->codec, SND_SOC_BIAS_OFF);
1670         kfree(wm8993);
1671
1672         return 0;
1673 }
1674
1675 static const struct i2c_device_id wm8993_i2c_id[] = {
1676         { "wm8993", 0 },
1677         { }
1678 };
1679 MODULE_DEVICE_TABLE(i2c, wm8993_i2c_id);
1680
1681 static struct i2c_driver wm8993_i2c_driver = {
1682         .driver = {
1683                 .name = "WM8993",
1684                 .owner = THIS_MODULE,
1685         },
1686         .probe = wm8993_i2c_probe,
1687         .remove = wm8993_i2c_remove,
1688         .id_table = wm8993_i2c_id,
1689 };
1690
1691
1692 static int __init wm8993_modinit(void)
1693 {
1694         int ret;
1695
1696         ret = i2c_add_driver(&wm8993_i2c_driver);
1697         if (ret != 0)
1698                 pr_err("WM8993: Unable to register I2C driver: %d\n", ret);
1699
1700         return ret;
1701 }
1702 module_init(wm8993_modinit);
1703
1704 static void __exit wm8993_exit(void)
1705 {
1706         i2c_del_driver(&wm8993_i2c_driver);
1707 }
1708 module_exit(wm8993_exit);
1709
1710
1711 MODULE_DESCRIPTION("ASoC WM8993 driver");
1712 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1713 MODULE_LICENSE("GPL");