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[karo-tx-linux.git] / sound / soc / davinci / davinci-pcm.c
1 /*
2  * ALSA PCM interface for the TI DAVINCI processor
3  *
4  * Author:      Vladimir Barinov, <vbarinov@embeddedalley.com>
5  * Copyright:   (C) 2007 MontaVista Software, Inc., <source@mvista.com>
6  * added SRAM ping/pong (C) 2008 Troy Kisky <troy.kisky@boundarydevices.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/slab.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/kernel.h>
19
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/soc.h>
24
25 #include <asm/dma.h>
26 #include <mach/sram.h>
27
28 #include "davinci-pcm.h"
29
30 #ifdef DEBUG
31 static void print_buf_info(int slot, char *name)
32 {
33         struct edmacc_param p;
34         if (slot < 0)
35                 return;
36         edma_read_slot(slot, &p);
37         printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
38                         name, slot, p.opt, p.src, p.a_b_cnt, p.dst);
39         printk(KERN_DEBUG "    src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x ccnt=%x\n",
40                         p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
41 }
42 #else
43 static void print_buf_info(int slot, char *name)
44 {
45 }
46 #endif
47
48 #define DAVINCI_PCM_FMTBITS     (\
49                                 SNDRV_PCM_FMTBIT_S8     |\
50                                 SNDRV_PCM_FMTBIT_U8     |\
51                                 SNDRV_PCM_FMTBIT_S16_LE |\
52                                 SNDRV_PCM_FMTBIT_S16_BE |\
53                                 SNDRV_PCM_FMTBIT_U16_LE |\
54                                 SNDRV_PCM_FMTBIT_U16_BE |\
55                                 SNDRV_PCM_FMTBIT_S24_LE |\
56                                 SNDRV_PCM_FMTBIT_S24_BE |\
57                                 SNDRV_PCM_FMTBIT_U24_LE |\
58                                 SNDRV_PCM_FMTBIT_U24_BE |\
59                                 SNDRV_PCM_FMTBIT_S32_LE |\
60                                 SNDRV_PCM_FMTBIT_S32_BE |\
61                                 SNDRV_PCM_FMTBIT_U32_LE |\
62                                 SNDRV_PCM_FMTBIT_U32_BE)
63
64 static struct snd_pcm_hardware pcm_hardware_playback = {
65         .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
66                  SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
67                  SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME|
68                  SNDRV_PCM_INFO_BATCH),
69         .formats = DAVINCI_PCM_FMTBITS,
70         .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
71                   SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
72                   SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
73                   SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
74                   SNDRV_PCM_RATE_KNOT),
75         .rate_min = 8000,
76         .rate_max = 96000,
77         .channels_min = 2,
78         .channels_max = 384,
79         .buffer_bytes_max = 128 * 1024,
80         .period_bytes_min = 32,
81         .period_bytes_max = 8 * 1024,
82         .periods_min = 16,
83         .periods_max = 255,
84         .fifo_size = 0,
85 };
86
87 static struct snd_pcm_hardware pcm_hardware_capture = {
88         .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
89                  SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
90                  SNDRV_PCM_INFO_PAUSE |
91                  SNDRV_PCM_INFO_BATCH),
92         .formats = DAVINCI_PCM_FMTBITS,
93         .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
94                   SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
95                   SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
96                   SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
97                   SNDRV_PCM_RATE_KNOT),
98         .rate_min = 8000,
99         .rate_max = 96000,
100         .channels_min = 2,
101         .channels_max = 384,
102         .buffer_bytes_max = 128 * 1024,
103         .period_bytes_min = 32,
104         .period_bytes_max = 8 * 1024,
105         .periods_min = 16,
106         .periods_max = 255,
107         .fifo_size = 0,
108 };
109
110 /*
111  * How ping/pong works....
112  *
113  * Playback:
114  * ram_params - copys 2*ping_size from start of SDRAM to iram,
115  *      links to ram_link2
116  * ram_link2 - copys rest of SDRAM to iram in ping_size units,
117  *      links to ram_link
118  * ram_link - copys entire SDRAM to iram in ping_size uints,
119  *      links to self
120  *
121  * asp_params - same as asp_link[0]
122  * asp_link[0] - copys from lower half of iram to asp port
123  *      links to asp_link[1], triggers iram copy event on completion
124  * asp_link[1] - copys from upper half of iram to asp port
125  *      links to asp_link[0], triggers iram copy event on completion
126  *      triggers interrupt only needed to let upper SOC levels update position
127  *      in stream on completion
128  *
129  * When playback is started:
130  *      ram_params started
131  *      asp_params started
132  *
133  * Capture:
134  * ram_params - same as ram_link,
135  *      links to ram_link
136  * ram_link - same as playback
137  *      links to self
138  *
139  * asp_params - same as playback
140  * asp_link[0] - same as playback
141  * asp_link[1] - same as playback
142  *
143  * When capture is started:
144  *      asp_params started
145  */
146 struct davinci_runtime_data {
147         spinlock_t lock;
148         int period;             /* current DMA period */
149         int asp_channel;        /* Master DMA channel */
150         int asp_link[2];        /* asp parameter link channel, ping/pong */
151         struct davinci_pcm_dma_params *params;  /* DMA params */
152         int ram_channel;
153         int ram_link;
154         int ram_link2;
155         struct edmacc_param asp_params;
156         struct edmacc_param ram_params;
157 };
158
159 static void davinci_pcm_period_elapsed(struct snd_pcm_substream *substream)
160 {
161         struct davinci_runtime_data *prtd = substream->runtime->private_data;
162         struct snd_pcm_runtime *runtime = substream->runtime;
163
164         prtd->period++;
165         if (unlikely(prtd->period >= runtime->periods))
166                 prtd->period = 0;
167 }
168
169 static void davinci_pcm_period_reset(struct snd_pcm_substream *substream)
170 {
171         struct davinci_runtime_data *prtd = substream->runtime->private_data;
172
173         prtd->period = 0;
174 }
175 /*
176  * Not used with ping/pong
177  */
178 static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
179 {
180         struct davinci_runtime_data *prtd = substream->runtime->private_data;
181         struct snd_pcm_runtime *runtime = substream->runtime;
182         unsigned int period_size;
183         unsigned int dma_offset;
184         dma_addr_t dma_pos;
185         dma_addr_t src, dst;
186         unsigned short src_bidx, dst_bidx;
187         unsigned short src_cidx, dst_cidx;
188         unsigned int data_type;
189         unsigned short acnt;
190         unsigned int count;
191         unsigned int fifo_level;
192
193         period_size = snd_pcm_lib_period_bytes(substream);
194         dma_offset = prtd->period * period_size;
195         dma_pos = runtime->dma_addr + dma_offset;
196         fifo_level = prtd->params->fifo_level;
197
198         pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d "
199                 "dma_ptr = %x period_size=%x\n", prtd->asp_link[0], dma_pos,
200                 period_size);
201
202         data_type = prtd->params->data_type;
203         count = period_size / data_type;
204         if (fifo_level)
205                 count /= fifo_level;
206
207         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
208                 src = dma_pos;
209                 dst = prtd->params->dma_addr;
210                 src_bidx = data_type;
211                 dst_bidx = 0;
212                 src_cidx = data_type * fifo_level;
213                 dst_cidx = 0;
214         } else {
215                 src = prtd->params->dma_addr;
216                 dst = dma_pos;
217                 src_bidx = 0;
218                 dst_bidx = data_type;
219                 src_cidx = 0;
220                 dst_cidx = data_type * fifo_level;
221         }
222
223         acnt = prtd->params->acnt;
224         edma_set_src(prtd->asp_link[0], src, INCR, W8BIT);
225         edma_set_dest(prtd->asp_link[0], dst, INCR, W8BIT);
226
227         edma_set_src_index(prtd->asp_link[0], src_bidx, src_cidx);
228         edma_set_dest_index(prtd->asp_link[0], dst_bidx, dst_cidx);
229
230         if (!fifo_level)
231                 edma_set_transfer_params(prtd->asp_link[0], acnt, count, 1, 0,
232                                                         ASYNC);
233         else
234                 edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
235                                                         count, fifo_level,
236                                                         ABSYNC);
237 }
238
239 static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
240 {
241         struct snd_pcm_substream *substream = data;
242         struct davinci_runtime_data *prtd = substream->runtime->private_data;
243
244         print_buf_info(prtd->ram_channel, "i ram_channel");
245         pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
246
247         if (unlikely(ch_status != DMA_COMPLETE))
248                 return;
249
250         if (snd_pcm_running(substream)) {
251                 spin_lock(&prtd->lock);
252                 if (prtd->ram_channel < 0) {
253                         /* No ping/pong must fix up link dma data*/
254                         davinci_pcm_enqueue_dma(substream);
255                 }
256                 davinci_pcm_period_elapsed(substream);
257                 spin_unlock(&prtd->lock);
258                 snd_pcm_period_elapsed(substream);
259         }
260 }
261
262 static int allocate_sram(struct snd_pcm_substream *substream, unsigned size,
263                 struct snd_pcm_hardware *ppcm)
264 {
265         struct snd_dma_buffer *buf = &substream->dma_buffer;
266         struct snd_dma_buffer *iram_dma = NULL;
267         dma_addr_t iram_phys = 0;
268         void *iram_virt = NULL;
269
270         if (buf->private_data || !size)
271                 return 0;
272
273         ppcm->period_bytes_max = size;
274         iram_virt = sram_alloc(size, &iram_phys);
275         if (!iram_virt)
276                 goto exit1;
277         iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
278         if (!iram_dma)
279                 goto exit2;
280         iram_dma->area = iram_virt;
281         iram_dma->addr = iram_phys;
282         memset(iram_dma->area, 0, size);
283         iram_dma->bytes = size;
284         buf->private_data = iram_dma;
285         return 0;
286 exit2:
287         if (iram_virt)
288                 sram_free(iram_virt, size);
289 exit1:
290         return -ENOMEM;
291 }
292
293 /*
294  * Only used with ping/pong.
295  * This is called after runtime->dma_addr, period_bytes and data_type are valid
296  */
297 static int ping_pong_dma_setup(struct snd_pcm_substream *substream)
298 {
299         unsigned short ram_src_cidx, ram_dst_cidx;
300         struct snd_pcm_runtime *runtime = substream->runtime;
301         struct davinci_runtime_data *prtd = runtime->private_data;
302         struct snd_dma_buffer *iram_dma =
303                 (struct snd_dma_buffer *)substream->dma_buffer.private_data;
304         struct davinci_pcm_dma_params *params = prtd->params;
305         unsigned int data_type = params->data_type;
306         unsigned int acnt = params->acnt;
307         /* divide by 2 for ping/pong */
308         unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
309         unsigned int fifo_level = prtd->params->fifo_level;
310         unsigned int count;
311         if ((data_type == 0) || (data_type > 4)) {
312                 printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
313                 return -EINVAL;
314         }
315         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
316                 dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
317                 ram_src_cidx = ping_size;
318                 ram_dst_cidx = -ping_size;
319                 edma_set_src(prtd->asp_link[1], asp_src_pong, INCR, W8BIT);
320
321                 edma_set_src_index(prtd->asp_link[0], data_type,
322                                 data_type * fifo_level);
323                 edma_set_src_index(prtd->asp_link[1], data_type,
324                                 data_type * fifo_level);
325
326                 edma_set_src(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
327         } else {
328                 dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
329                 ram_src_cidx = -ping_size;
330                 ram_dst_cidx = ping_size;
331                 edma_set_dest(prtd->asp_link[1], asp_dst_pong, INCR, W8BIT);
332
333                 edma_set_dest_index(prtd->asp_link[0], data_type,
334                                 data_type * fifo_level);
335                 edma_set_dest_index(prtd->asp_link[1], data_type,
336                                 data_type * fifo_level);
337
338                 edma_set_dest(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
339         }
340
341         if (!fifo_level) {
342                 count = ping_size / data_type;
343                 edma_set_transfer_params(prtd->asp_link[0], acnt, count,
344                                 1, 0, ASYNC);
345                 edma_set_transfer_params(prtd->asp_link[1], acnt, count,
346                                 1, 0, ASYNC);
347         } else {
348                 count = ping_size / (data_type * fifo_level);
349                 edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
350                                 count, fifo_level, ABSYNC);
351                 edma_set_transfer_params(prtd->asp_link[1], acnt, fifo_level,
352                                 count, fifo_level, ABSYNC);
353         }
354
355         edma_set_src_index(prtd->ram_link, ping_size, ram_src_cidx);
356         edma_set_dest_index(prtd->ram_link, ping_size, ram_dst_cidx);
357         edma_set_transfer_params(prtd->ram_link, ping_size, 2,
358                         runtime->periods, 2, ASYNC);
359
360         /* init master params */
361         edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
362         edma_read_slot(prtd->ram_link, &prtd->ram_params);
363         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
364                 struct edmacc_param p_ram;
365                 /* Copy entire iram buffer before playback started */
366                 prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
367                 /* 0 dst_bidx */
368                 prtd->ram_params.src_dst_bidx = (ping_size << 1);
369                 /* 0 dst_cidx */
370                 prtd->ram_params.src_dst_cidx = (ping_size << 1);
371                 prtd->ram_params.ccnt = 1;
372
373                 /* Skip 1st period */
374                 edma_read_slot(prtd->ram_link, &p_ram);
375                 p_ram.src += (ping_size << 1);
376                 p_ram.ccnt -= 1;
377                 edma_write_slot(prtd->ram_link2, &p_ram);
378                 /*
379                  * When 1st started, ram -> iram dma channel will fill the
380                  * entire iram.  Then, whenever a ping/pong asp buffer finishes,
381                  * 1/2 iram will be filled.
382                  */
383                 prtd->ram_params.link_bcntrld =
384                         EDMA_CHAN_SLOT(prtd->ram_link2) << 5;
385         }
386         return 0;
387 }
388
389 /* 1 asp tx or rx channel using 2 parameter channels
390  * 1 ram to/from iram channel using 1 parameter channel
391  *
392  * Playback
393  * ram copy channel kicks off first,
394  * 1st ram copy of entire iram buffer completion kicks off asp channel
395  * asp tcc always kicks off ram copy of 1/2 iram buffer
396  *
397  * Record
398  * asp channel starts, tcc kicks off ram copy
399  */
400 static int request_ping_pong(struct snd_pcm_substream *substream,
401                 struct davinci_runtime_data *prtd,
402                 struct snd_dma_buffer *iram_dma)
403 {
404         dma_addr_t asp_src_ping;
405         dma_addr_t asp_dst_ping;
406         int ret;
407         struct davinci_pcm_dma_params *params = prtd->params;
408
409         /* Request ram master channel */
410         ret = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
411                                   davinci_pcm_dma_irq, substream,
412                                   prtd->params->ram_chan_q);
413         if (ret < 0)
414                 goto exit1;
415
416         /* Request ram link channel */
417         ret = prtd->ram_link = edma_alloc_slot(
418                         EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
419         if (ret < 0)
420                 goto exit2;
421
422         ret = prtd->asp_link[1] = edma_alloc_slot(
423                         EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
424         if (ret < 0)
425                 goto exit3;
426
427         prtd->ram_link2 = -1;
428         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
429                 ret = prtd->ram_link2 = edma_alloc_slot(
430                         EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
431                 if (ret < 0)
432                         goto exit4;
433         }
434         /* circle ping-pong buffers */
435         edma_link(prtd->asp_link[0], prtd->asp_link[1]);
436         edma_link(prtd->asp_link[1], prtd->asp_link[0]);
437         /* circle ram buffers */
438         edma_link(prtd->ram_link, prtd->ram_link);
439
440         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
441                 asp_src_ping = iram_dma->addr;
442                 asp_dst_ping = params->dma_addr;        /* fifo */
443         } else {
444                 asp_src_ping = params->dma_addr;        /* fifo */
445                 asp_dst_ping = iram_dma->addr;
446         }
447         /* ping */
448         edma_set_src(prtd->asp_link[0], asp_src_ping, INCR, W16BIT);
449         edma_set_dest(prtd->asp_link[0], asp_dst_ping, INCR, W16BIT);
450         edma_set_src_index(prtd->asp_link[0], 0, 0);
451         edma_set_dest_index(prtd->asp_link[0], 0, 0);
452
453         edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
454         prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f) | TCINTEN);
455         prtd->asp_params.opt |= TCCHEN |
456                 EDMA_TCC(prtd->ram_channel & 0x3f);
457         edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
458
459         /* pong */
460         edma_set_src(prtd->asp_link[1], asp_src_ping, INCR, W16BIT);
461         edma_set_dest(prtd->asp_link[1], asp_dst_ping, INCR, W16BIT);
462         edma_set_src_index(prtd->asp_link[1], 0, 0);
463         edma_set_dest_index(prtd->asp_link[1], 0, 0);
464
465         edma_read_slot(prtd->asp_link[1], &prtd->asp_params);
466         prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f));
467         /* interrupt after every pong completion */
468         prtd->asp_params.opt |= TCINTEN | TCCHEN |
469                 EDMA_TCC(prtd->ram_channel & 0x3f);
470         edma_write_slot(prtd->asp_link[1], &prtd->asp_params);
471
472         /* ram */
473         edma_set_src(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
474         edma_set_dest(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
475         pr_debug("%s: audio dma channels/slots in use for ram:%u %u %u,"
476                 "for asp:%u %u %u\n", __func__,
477                 prtd->ram_channel, prtd->ram_link, prtd->ram_link2,
478                 prtd->asp_channel, prtd->asp_link[0],
479                 prtd->asp_link[1]);
480         return 0;
481 exit4:
482         edma_free_channel(prtd->asp_link[1]);
483         prtd->asp_link[1] = -1;
484 exit3:
485         edma_free_channel(prtd->ram_link);
486         prtd->ram_link = -1;
487 exit2:
488         edma_free_channel(prtd->ram_channel);
489         prtd->ram_channel = -1;
490 exit1:
491         return ret;
492 }
493
494 static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
495 {
496         struct snd_dma_buffer *iram_dma;
497         struct davinci_runtime_data *prtd = substream->runtime->private_data;
498         struct davinci_pcm_dma_params *params = prtd->params;
499         int ret;
500
501         if (!params)
502                 return -ENODEV;
503
504         /* Request asp master DMA channel */
505         ret = prtd->asp_channel = edma_alloc_channel(params->channel,
506                         davinci_pcm_dma_irq, substream,
507                         prtd->params->asp_chan_q);
508         if (ret < 0)
509                 goto exit1;
510
511         /* Request asp link channels */
512         ret = prtd->asp_link[0] = edma_alloc_slot(
513                         EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
514         if (ret < 0)
515                 goto exit2;
516
517         iram_dma = (struct snd_dma_buffer *)substream->dma_buffer.private_data;
518         if (iram_dma) {
519                 if (request_ping_pong(substream, prtd, iram_dma) == 0)
520                         return 0;
521                 printk(KERN_WARNING "%s: dma channel allocation failed,"
522                                 "not using sram\n", __func__);
523         }
524
525         /* Issue transfer completion IRQ when the channel completes a
526          * transfer, then always reload from the same slot (by a kind
527          * of loopback link).  The completion IRQ handler will update
528          * the reload slot with a new buffer.
529          *
530          * REVISIT save p_ram here after setting up everything except
531          * the buffer and its length (ccnt) ... use it as a template
532          * so davinci_pcm_enqueue_dma() takes less time in IRQ.
533          */
534         edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
535         prtd->asp_params.opt |= TCINTEN |
536                 EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel));
537         prtd->asp_params.link_bcntrld = EDMA_CHAN_SLOT(prtd->asp_link[0]) << 5;
538         edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
539         return 0;
540 exit2:
541         edma_free_channel(prtd->asp_channel);
542         prtd->asp_channel = -1;
543 exit1:
544         return ret;
545 }
546
547 static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
548 {
549         struct davinci_runtime_data *prtd = substream->runtime->private_data;
550         int ret = 0;
551
552         spin_lock(&prtd->lock);
553
554         switch (cmd) {
555         case SNDRV_PCM_TRIGGER_START:
556                 edma_start(prtd->asp_channel);
557                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
558                     prtd->ram_channel >= 0) {
559                         /* copy 1st iram buffer */
560                         edma_start(prtd->ram_channel);
561                 }
562                 break;
563         case SNDRV_PCM_TRIGGER_RESUME:
564         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
565                 edma_resume(prtd->asp_channel);
566                 break;
567         case SNDRV_PCM_TRIGGER_STOP:
568         case SNDRV_PCM_TRIGGER_SUSPEND:
569         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
570                 edma_pause(prtd->asp_channel);
571                 break;
572         default:
573                 ret = -EINVAL;
574                 break;
575         }
576
577         spin_unlock(&prtd->lock);
578
579         return ret;
580 }
581
582 static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
583 {
584         struct davinci_runtime_data *prtd = substream->runtime->private_data;
585
586         davinci_pcm_period_reset(substream);
587         if (prtd->ram_channel >= 0) {
588                 int ret = ping_pong_dma_setup(substream);
589                 if (ret < 0)
590                         return ret;
591
592                 edma_write_slot(prtd->ram_channel, &prtd->ram_params);
593                 edma_write_slot(prtd->asp_channel, &prtd->asp_params);
594
595                 print_buf_info(prtd->ram_channel, "ram_channel");
596                 print_buf_info(prtd->ram_link, "ram_link");
597                 print_buf_info(prtd->ram_link2, "ram_link2");
598                 print_buf_info(prtd->asp_channel, "asp_channel");
599                 print_buf_info(prtd->asp_link[0], "asp_link[0]");
600                 print_buf_info(prtd->asp_link[1], "asp_link[1]");
601
602                 /*
603                  * There is a phase offset of 2 periods between the position
604                  * used by dma setup and the position reported in the pointer
605                  * function.
606                  *
607                  * The phase offset, when not using ping-pong buffers, is due to
608                  * the two consecutive calls to davinci_pcm_enqueue_dma() below.
609                  *
610                  * Whereas here, with ping-pong buffers, the phase is due to
611                  * there being an entire buffer transfer complete before the
612                  * first dma completion event triggers davinci_pcm_dma_irq().
613                  */
614                 davinci_pcm_period_elapsed(substream);
615                 davinci_pcm_period_elapsed(substream);
616
617                 return 0;
618         }
619         davinci_pcm_enqueue_dma(substream);
620         davinci_pcm_period_elapsed(substream);
621
622         /* Copy self-linked parameter RAM entry into master channel */
623         edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
624         edma_write_slot(prtd->asp_channel, &prtd->asp_params);
625         davinci_pcm_enqueue_dma(substream);
626         davinci_pcm_period_elapsed(substream);
627
628         return 0;
629 }
630
631 static snd_pcm_uframes_t
632 davinci_pcm_pointer(struct snd_pcm_substream *substream)
633 {
634         struct snd_pcm_runtime *runtime = substream->runtime;
635         struct davinci_runtime_data *prtd = runtime->private_data;
636         unsigned int offset;
637         int asp_count;
638         unsigned int period_size = snd_pcm_lib_period_bytes(substream);
639
640         /*
641          * There is a phase offset of 2 periods between the position used by dma
642          * setup and the position reported in the pointer function. Either +2 in
643          * the dma setup or -2 here in the pointer function (with wrapping,
644          * both) accounts for this offset -- choose the latter since it makes
645          * the first-time setup clearer.
646          */
647         spin_lock(&prtd->lock);
648         asp_count = prtd->period - 2;
649         spin_unlock(&prtd->lock);
650
651         if (asp_count < 0)
652                 asp_count += runtime->periods;
653         asp_count *= period_size;
654
655         offset = bytes_to_frames(runtime, asp_count);
656         if (offset >= runtime->buffer_size)
657                 offset = 0;
658
659         return offset;
660 }
661
662 static int davinci_pcm_open(struct snd_pcm_substream *substream)
663 {
664         struct snd_pcm_runtime *runtime = substream->runtime;
665         struct davinci_runtime_data *prtd;
666         struct snd_pcm_hardware *ppcm;
667         int ret = 0;
668         struct snd_soc_pcm_runtime *rtd = substream->private_data;
669         struct davinci_pcm_dma_params *pa;
670         struct davinci_pcm_dma_params *params;
671
672         pa = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
673         if (!pa)
674                 return -ENODEV;
675         params = &pa[substream->stream];
676
677         ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
678                         &pcm_hardware_playback : &pcm_hardware_capture;
679         allocate_sram(substream, params->sram_size, ppcm);
680         snd_soc_set_runtime_hwparams(substream, ppcm);
681         /* ensure that buffer size is a multiple of period size */
682         ret = snd_pcm_hw_constraint_integer(runtime,
683                                                 SNDRV_PCM_HW_PARAM_PERIODS);
684         if (ret < 0)
685                 return ret;
686
687         prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL);
688         if (prtd == NULL)
689                 return -ENOMEM;
690
691         spin_lock_init(&prtd->lock);
692         prtd->params = params;
693         prtd->asp_channel = -1;
694         prtd->asp_link[0] = prtd->asp_link[1] = -1;
695         prtd->ram_channel = -1;
696         prtd->ram_link = -1;
697         prtd->ram_link2 = -1;
698
699         runtime->private_data = prtd;
700
701         ret = davinci_pcm_dma_request(substream);
702         if (ret) {
703                 printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n");
704                 kfree(prtd);
705         }
706
707         return ret;
708 }
709
710 static int davinci_pcm_close(struct snd_pcm_substream *substream)
711 {
712         struct snd_pcm_runtime *runtime = substream->runtime;
713         struct davinci_runtime_data *prtd = runtime->private_data;
714
715         if (prtd->ram_channel >= 0)
716                 edma_stop(prtd->ram_channel);
717         if (prtd->asp_channel >= 0)
718                 edma_stop(prtd->asp_channel);
719         if (prtd->asp_link[0] >= 0)
720                 edma_unlink(prtd->asp_link[0]);
721         if (prtd->asp_link[1] >= 0)
722                 edma_unlink(prtd->asp_link[1]);
723         if (prtd->ram_link >= 0)
724                 edma_unlink(prtd->ram_link);
725
726         if (prtd->asp_link[0] >= 0)
727                 edma_free_slot(prtd->asp_link[0]);
728         if (prtd->asp_link[1] >= 0)
729                 edma_free_slot(prtd->asp_link[1]);
730         if (prtd->asp_channel >= 0)
731                 edma_free_channel(prtd->asp_channel);
732         if (prtd->ram_link >= 0)
733                 edma_free_slot(prtd->ram_link);
734         if (prtd->ram_link2 >= 0)
735                 edma_free_slot(prtd->ram_link2);
736         if (prtd->ram_channel >= 0)
737                 edma_free_channel(prtd->ram_channel);
738
739         kfree(prtd);
740
741         return 0;
742 }
743
744 static int davinci_pcm_hw_params(struct snd_pcm_substream *substream,
745                                  struct snd_pcm_hw_params *hw_params)
746 {
747         return snd_pcm_lib_malloc_pages(substream,
748                                         params_buffer_bytes(hw_params));
749 }
750
751 static int davinci_pcm_hw_free(struct snd_pcm_substream *substream)
752 {
753         return snd_pcm_lib_free_pages(substream);
754 }
755
756 static int davinci_pcm_mmap(struct snd_pcm_substream *substream,
757                             struct vm_area_struct *vma)
758 {
759         struct snd_pcm_runtime *runtime = substream->runtime;
760
761         return dma_mmap_writecombine(substream->pcm->card->dev, vma,
762                                      runtime->dma_area,
763                                      runtime->dma_addr,
764                                      runtime->dma_bytes);
765 }
766
767 static struct snd_pcm_ops davinci_pcm_ops = {
768         .open =         davinci_pcm_open,
769         .close =        davinci_pcm_close,
770         .ioctl =        snd_pcm_lib_ioctl,
771         .hw_params =    davinci_pcm_hw_params,
772         .hw_free =      davinci_pcm_hw_free,
773         .prepare =      davinci_pcm_prepare,
774         .trigger =      davinci_pcm_trigger,
775         .pointer =      davinci_pcm_pointer,
776         .mmap =         davinci_pcm_mmap,
777 };
778
779 static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
780                 size_t size)
781 {
782         struct snd_pcm_substream *substream = pcm->streams[stream].substream;
783         struct snd_dma_buffer *buf = &substream->dma_buffer;
784
785         buf->dev.type = SNDRV_DMA_TYPE_DEV;
786         buf->dev.dev = pcm->card->dev;
787         buf->private_data = NULL;
788         buf->area = dma_alloc_writecombine(pcm->card->dev, size,
789                                            &buf->addr, GFP_KERNEL);
790
791         pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, "
792                 "size=%d\n", (void *) buf->area, (void *) buf->addr, size);
793
794         if (!buf->area)
795                 return -ENOMEM;
796
797         buf->bytes = size;
798         return 0;
799 }
800
801 static void davinci_pcm_free(struct snd_pcm *pcm)
802 {
803         struct snd_pcm_substream *substream;
804         struct snd_dma_buffer *buf;
805         int stream;
806
807         for (stream = 0; stream < 2; stream++) {
808                 struct snd_dma_buffer *iram_dma;
809                 substream = pcm->streams[stream].substream;
810                 if (!substream)
811                         continue;
812
813                 buf = &substream->dma_buffer;
814                 if (!buf->area)
815                         continue;
816
817                 dma_free_writecombine(pcm->card->dev, buf->bytes,
818                                       buf->area, buf->addr);
819                 buf->area = NULL;
820                 iram_dma = buf->private_data;
821                 if (iram_dma) {
822                         sram_free(iram_dma->area, iram_dma->bytes);
823                         kfree(iram_dma);
824                 }
825         }
826 }
827
828 static u64 davinci_pcm_dmamask = DMA_BIT_MASK(32);
829
830 static int davinci_pcm_new(struct snd_soc_pcm_runtime *rtd)
831 {
832         struct snd_card *card = rtd->card->snd_card;
833         struct snd_pcm *pcm = rtd->pcm;
834         int ret;
835
836         if (!card->dev->dma_mask)
837                 card->dev->dma_mask = &davinci_pcm_dmamask;
838         if (!card->dev->coherent_dma_mask)
839                 card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
840
841         if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
842                 ret = davinci_pcm_preallocate_dma_buffer(pcm,
843                         SNDRV_PCM_STREAM_PLAYBACK,
844                         pcm_hardware_playback.buffer_bytes_max);
845                 if (ret)
846                         return ret;
847         }
848
849         if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
850                 ret = davinci_pcm_preallocate_dma_buffer(pcm,
851                         SNDRV_PCM_STREAM_CAPTURE,
852                         pcm_hardware_capture.buffer_bytes_max);
853                 if (ret)
854                         return ret;
855         }
856
857         return 0;
858 }
859
860 static struct snd_soc_platform_driver davinci_soc_platform = {
861         .ops =          &davinci_pcm_ops,
862         .pcm_new =      davinci_pcm_new,
863         .pcm_free =     davinci_pcm_free,
864 };
865
866 int davinci_soc_platform_register(struct device *dev)
867 {
868         return snd_soc_register_platform(dev, &davinci_soc_platform);
869 }
870 EXPORT_SYMBOL_GPL(davinci_soc_platform_register);
871
872 void davinci_soc_platform_unregister(struct device *dev)
873 {
874         snd_soc_unregister_platform(dev);
875 }
876 EXPORT_SYMBOL_GPL(davinci_soc_platform_unregister);
877
878 MODULE_AUTHOR("Vladimir Barinov");
879 MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
880 MODULE_LICENSE("GPL");