2 * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver
4 * Author: Timur Tabi <timur@freescale.com>
6 * Copyright 2007-2010 Freescale Semiconductor, Inc.
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
16 #include <linux/device.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
19 #include <linux/of_platform.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/initval.h>
25 #include <sound/soc.h>
27 #include <asm/immap_86xx.h>
32 * FSLSSI_I2S_RATES: sample rates supported by the I2S
34 * This driver currently only supports the SSI running in I2S slave mode,
35 * which means the codec determines the sample rate. Therefore, we tell
36 * ALSA that we support all rates and let the codec driver decide what rates
37 * are really supported.
39 #define FSLSSI_I2S_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \
40 SNDRV_PCM_RATE_CONTINUOUS)
43 * FSLSSI_I2S_FORMATS: audio formats supported by the SSI
45 * This driver currently only supports the SSI running in I2S slave mode.
47 * The SSI has a limitation in that the samples must be in the same byte
48 * order as the host CPU. This is because when multiple bytes are written
49 * to the STX register, the bytes and bits must be written in the same
50 * order. The STX is a shift register, so all the bits need to be aligned
51 * (bit-endianness must match byte-endianness). Processors typically write
52 * the bits within a byte in the same order that the bytes of a word are
53 * written in. So if the host CPU is big-endian, then only big-endian
54 * samples will be written to STX properly.
57 #define FSLSSI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \
58 SNDRV_PCM_FMTBIT_S18_3BE | SNDRV_PCM_FMTBIT_S20_3BE | \
59 SNDRV_PCM_FMTBIT_S24_3BE | SNDRV_PCM_FMTBIT_S24_BE)
61 #define FSLSSI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
62 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE | \
63 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE)
66 /* SIER bitflag of interrupts to enable */
67 #define SIER_FLAGS (CCSR_SSI_SIER_TFRC_EN | CCSR_SSI_SIER_TDMAE | \
68 CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TUE0_EN | \
69 CCSR_SSI_SIER_TUE1_EN | CCSR_SSI_SIER_RFRC_EN | \
70 CCSR_SSI_SIER_RDMAE | CCSR_SSI_SIER_RIE | \
71 CCSR_SSI_SIER_ROE0_EN | CCSR_SSI_SIER_ROE1_EN)
74 * fsl_ssi_private: per-SSI private data
76 * @ssi: pointer to the SSI's registers
77 * @ssi_phys: physical address of the SSI registers
78 * @irq: IRQ of this SSI
79 * @first_stream: pointer to the stream that was opened first
80 * @second_stream: pointer to second stream
81 * @playback: the number of playback streams opened
82 * @capture: the number of capture streams opened
83 * @asynchronous: 0=synchronous mode, 1=asynchronous mode
84 * @cpu_dai: the CPU DAI for this device
85 * @dev_attr: the sysfs device attribute structure
86 * @stats: SSI statistics
87 * @name: name for this device
89 struct fsl_ssi_private {
90 struct ccsr_ssi __iomem *ssi;
93 struct snd_pcm_substream *first_stream;
94 struct snd_pcm_substream *second_stream;
95 unsigned int playback;
98 struct snd_soc_dai_driver cpu_dai_drv;
99 struct device_attribute dev_attr;
100 struct platform_device *pdev;
130 * fsl_ssi_isr: SSI interrupt handler
132 * Although it's possible to use the interrupt handler to send and receive
133 * data to/from the SSI, we use the DMA instead. Programming is more
134 * complicated, but the performance is much better.
136 * This interrupt handler is used only to gather statistics.
138 * @irq: IRQ of the SSI device
139 * @dev_id: pointer to the ssi_private structure for this SSI device
141 static irqreturn_t fsl_ssi_isr(int irq, void *dev_id)
143 struct fsl_ssi_private *ssi_private = dev_id;
144 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
145 irqreturn_t ret = IRQ_NONE;
149 /* We got an interrupt, so read the status register to see what we
150 were interrupted for. We mask it with the Interrupt Enable register
151 so that we only check for events that we're interested in.
153 sisr = in_be32(&ssi->sisr) & SIER_FLAGS;
155 if (sisr & CCSR_SSI_SISR_RFRC) {
156 ssi_private->stats.rfrc++;
157 sisr2 |= CCSR_SSI_SISR_RFRC;
161 if (sisr & CCSR_SSI_SISR_TFRC) {
162 ssi_private->stats.tfrc++;
163 sisr2 |= CCSR_SSI_SISR_TFRC;
167 if (sisr & CCSR_SSI_SISR_CMDAU) {
168 ssi_private->stats.cmdau++;
172 if (sisr & CCSR_SSI_SISR_CMDDU) {
173 ssi_private->stats.cmddu++;
177 if (sisr & CCSR_SSI_SISR_RXT) {
178 ssi_private->stats.rxt++;
182 if (sisr & CCSR_SSI_SISR_RDR1) {
183 ssi_private->stats.rdr1++;
187 if (sisr & CCSR_SSI_SISR_RDR0) {
188 ssi_private->stats.rdr0++;
192 if (sisr & CCSR_SSI_SISR_TDE1) {
193 ssi_private->stats.tde1++;
197 if (sisr & CCSR_SSI_SISR_TDE0) {
198 ssi_private->stats.tde0++;
202 if (sisr & CCSR_SSI_SISR_ROE1) {
203 ssi_private->stats.roe1++;
204 sisr2 |= CCSR_SSI_SISR_ROE1;
208 if (sisr & CCSR_SSI_SISR_ROE0) {
209 ssi_private->stats.roe0++;
210 sisr2 |= CCSR_SSI_SISR_ROE0;
214 if (sisr & CCSR_SSI_SISR_TUE1) {
215 ssi_private->stats.tue1++;
216 sisr2 |= CCSR_SSI_SISR_TUE1;
220 if (sisr & CCSR_SSI_SISR_TUE0) {
221 ssi_private->stats.tue0++;
222 sisr2 |= CCSR_SSI_SISR_TUE0;
226 if (sisr & CCSR_SSI_SISR_TFS) {
227 ssi_private->stats.tfs++;
231 if (sisr & CCSR_SSI_SISR_RFS) {
232 ssi_private->stats.rfs++;
236 if (sisr & CCSR_SSI_SISR_TLS) {
237 ssi_private->stats.tls++;
241 if (sisr & CCSR_SSI_SISR_RLS) {
242 ssi_private->stats.rls++;
246 if (sisr & CCSR_SSI_SISR_RFF1) {
247 ssi_private->stats.rff1++;
251 if (sisr & CCSR_SSI_SISR_RFF0) {
252 ssi_private->stats.rff0++;
256 if (sisr & CCSR_SSI_SISR_TFE1) {
257 ssi_private->stats.tfe1++;
261 if (sisr & CCSR_SSI_SISR_TFE0) {
262 ssi_private->stats.tfe0++;
266 /* Clear the bits that we set */
268 out_be32(&ssi->sisr, sisr2);
274 * fsl_ssi_startup: create a new substream
276 * This is the first function called when a stream is opened.
278 * If this is the first stream open, then grab the IRQ and program most of
281 static int fsl_ssi_startup(struct snd_pcm_substream *substream,
282 struct snd_soc_dai *dai)
284 struct snd_soc_pcm_runtime *rtd = substream->private_data;
285 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(rtd->cpu_dai);
288 * If this is the first stream opened, then request the IRQ
289 * and initialize the SSI registers.
291 if (!ssi_private->playback && !ssi_private->capture) {
292 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
295 /* The 'name' should not have any slashes in it. */
296 ret = request_irq(ssi_private->irq, fsl_ssi_isr, 0,
297 ssi_private->name, ssi_private);
299 dev_err(substream->pcm->card->dev,
300 "could not claim irq %u\n", ssi_private->irq);
305 * Section 16.5 of the MPC8610 reference manual says that the
306 * SSI needs to be disabled before updating the registers we set
309 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
312 * Program the SSI into I2S Slave Non-Network Synchronous mode.
313 * Also enable the transmit and receive FIFO.
315 * FIXME: Little-endian samples require a different shift dir
317 clrsetbits_be32(&ssi->scr,
318 CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_SYN,
319 CCSR_SSI_SCR_TFR_CLK_DIS | CCSR_SSI_SCR_I2S_MODE_SLAVE
320 | (ssi_private->asynchronous ? 0 : CCSR_SSI_SCR_SYN));
323 CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFEN0 |
324 CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TEFS |
325 CCSR_SSI_STCR_TSCKP);
328 CCSR_SSI_SRCR_RXBIT0 | CCSR_SSI_SRCR_RFEN0 |
329 CCSR_SSI_SRCR_RFSI | CCSR_SSI_SRCR_REFS |
330 CCSR_SSI_SRCR_RSCKP);
333 * The DC and PM bits are only used if the SSI is the clock
337 /* 4. Enable the interrupts and DMA requests */
338 out_be32(&ssi->sier, SIER_FLAGS);
341 * Set the watermark for transmit FIFI 0 and receive FIFO 0. We
342 * don't use FIFO 1. Since the SSI only supports stereo, the
343 * watermark should never be an odd number.
345 out_be32(&ssi->sfcsr,
346 CCSR_SSI_SFCSR_TFWM0(6) | CCSR_SSI_SFCSR_RFWM0(2));
349 * We keep the SSI disabled because if we enable it, then the
350 * DMA controller will start. It's not supposed to start until
351 * the SCR.TE (or SCR.RE) bit is set, but it does anyway. The
352 * DMA controller will transfer one "BWC" of data (i.e. the
353 * amount of data that the MR.BWC bits are set to). The reason
354 * this is bad is because at this point, the PCM driver has not
355 * finished initializing the DMA controller.
359 if (!ssi_private->first_stream)
360 ssi_private->first_stream = substream;
362 /* This is the second stream open, so we need to impose sample
363 * rate and maybe sample size constraints. Note that this can
364 * cause a race condition if the second stream is opened before
365 * the first stream is fully initialized.
367 * We provide some protection by checking to make sure the first
368 * stream is initialized, but it's not perfect. ALSA sometimes
369 * re-initializes the driver with a different sample rate or
370 * size. If the second stream is opened before the first stream
371 * has received its final parameters, then the second stream may
372 * be constrained to the wrong sample rate or size.
374 * FIXME: This code does not handle opening and closing streams
375 * repeatedly. If you open two streams and then close the first
376 * one, you may not be able to open another stream until you
377 * close the second one as well.
379 struct snd_pcm_runtime *first_runtime =
380 ssi_private->first_stream->runtime;
382 if (!first_runtime->sample_bits) {
383 dev_err(substream->pcm->card->dev,
384 "set sample size in %s stream first\n",
385 substream->stream == SNDRV_PCM_STREAM_PLAYBACK
386 ? "capture" : "playback");
390 /* If we're in synchronous mode, then we need to constrain
391 * the sample size as well. We don't support independent sample
392 * rates in asynchronous mode.
394 if (!ssi_private->asynchronous)
395 snd_pcm_hw_constraint_minmax(substream->runtime,
396 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
397 first_runtime->sample_bits,
398 first_runtime->sample_bits);
400 ssi_private->second_stream = substream;
403 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
404 ssi_private->playback++;
406 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
407 ssi_private->capture++;
413 * fsl_ssi_hw_params - program the sample size
415 * Most of the SSI registers have been programmed in the startup function,
416 * but the word length must be programmed here. Unfortunately, programming
417 * the SxCCR.WL bits requires the SSI to be temporarily disabled. This can
418 * cause a problem with supporting simultaneous playback and capture. If
419 * the SSI is already playing a stream, then that stream may be temporarily
420 * stopped when you start capture.
422 * Note: The SxCCR.DC and SxCCR.PM bits are only used if the SSI is the
425 static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
426 struct snd_pcm_hw_params *hw_params, struct snd_soc_dai *cpu_dai)
428 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);
430 if (substream == ssi_private->first_stream) {
431 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
432 unsigned int sample_size =
433 snd_pcm_format_width(params_format(hw_params));
434 u32 wl = CCSR_SSI_SxCCR_WL(sample_size);
436 /* The SSI should always be disabled at this points (SSIEN=0) */
438 /* In synchronous mode, the SSI uses STCCR for capture */
439 if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ||
440 !ssi_private->asynchronous)
441 clrsetbits_be32(&ssi->stccr,
442 CCSR_SSI_SxCCR_WL_MASK, wl);
444 clrsetbits_be32(&ssi->srccr,
445 CCSR_SSI_SxCCR_WL_MASK, wl);
452 * fsl_ssi_trigger: start and stop the DMA transfer.
454 * This function is called by ALSA to start, stop, pause, and resume the DMA
457 * The DMA channel is in external master start and pause mode, which
458 * means the SSI completely controls the flow of data.
460 static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
461 struct snd_soc_dai *dai)
463 struct snd_soc_pcm_runtime *rtd = substream->private_data;
464 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(rtd->cpu_dai);
465 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
468 case SNDRV_PCM_TRIGGER_START:
469 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
470 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
471 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
473 CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE);
476 CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE);
479 case SNDRV_PCM_TRIGGER_STOP:
480 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
481 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
482 clrbits32(&ssi->scr, CCSR_SSI_SCR_TE);
484 clrbits32(&ssi->scr, CCSR_SSI_SCR_RE);
495 * fsl_ssi_shutdown: shutdown the SSI
497 * Shutdown the SSI if there are no other substreams open.
499 static void fsl_ssi_shutdown(struct snd_pcm_substream *substream,
500 struct snd_soc_dai *dai)
502 struct snd_soc_pcm_runtime *rtd = substream->private_data;
503 struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(rtd->cpu_dai);
505 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
506 ssi_private->playback--;
508 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
509 ssi_private->capture--;
511 if (ssi_private->first_stream == substream)
512 ssi_private->first_stream = ssi_private->second_stream;
514 ssi_private->second_stream = NULL;
517 * If this is the last active substream, disable the SSI and release
520 if (!ssi_private->playback && !ssi_private->capture) {
521 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
523 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
525 free_irq(ssi_private->irq, ssi_private);
529 static struct snd_soc_dai_ops fsl_ssi_dai_ops = {
530 .startup = fsl_ssi_startup,
531 .hw_params = fsl_ssi_hw_params,
532 .shutdown = fsl_ssi_shutdown,
533 .trigger = fsl_ssi_trigger,
536 /* Template for the CPU dai driver structure */
537 static struct snd_soc_dai_driver fsl_ssi_dai_template = {
539 /* The SSI does not support monaural audio. */
542 .rates = FSLSSI_I2S_RATES,
543 .formats = FSLSSI_I2S_FORMATS,
548 .rates = FSLSSI_I2S_RATES,
549 .formats = FSLSSI_I2S_FORMATS,
551 .ops = &fsl_ssi_dai_ops,
554 /* Show the statistics of a flag only if its interrupt is enabled. The
555 * compiler will optimze this code to a no-op if the interrupt is not
558 #define SIER_SHOW(flag, name) \
560 if (SIER_FLAGS & CCSR_SSI_SIER_##flag) \
561 length += sprintf(buf + length, #name "=%u\n", \
562 ssi_private->stats.name); \
567 * fsl_sysfs_ssi_show: display SSI statistics
569 * Display the statistics for the current SSI device. To avoid confusion,
570 * we only show those counts that are enabled.
572 static ssize_t fsl_sysfs_ssi_show(struct device *dev,
573 struct device_attribute *attr, char *buf)
575 struct fsl_ssi_private *ssi_private =
576 container_of(attr, struct fsl_ssi_private, dev_attr);
579 SIER_SHOW(RFRC_EN, rfrc);
580 SIER_SHOW(TFRC_EN, tfrc);
581 SIER_SHOW(CMDAU_EN, cmdau);
582 SIER_SHOW(CMDDU_EN, cmddu);
583 SIER_SHOW(RXT_EN, rxt);
584 SIER_SHOW(RDR1_EN, rdr1);
585 SIER_SHOW(RDR0_EN, rdr0);
586 SIER_SHOW(TDE1_EN, tde1);
587 SIER_SHOW(TDE0_EN, tde0);
588 SIER_SHOW(ROE1_EN, roe1);
589 SIER_SHOW(ROE0_EN, roe0);
590 SIER_SHOW(TUE1_EN, tue1);
591 SIER_SHOW(TUE0_EN, tue0);
592 SIER_SHOW(TFS_EN, tfs);
593 SIER_SHOW(RFS_EN, rfs);
594 SIER_SHOW(TLS_EN, tls);
595 SIER_SHOW(RLS_EN, rls);
596 SIER_SHOW(RFF1_EN, rff1);
597 SIER_SHOW(RFF0_EN, rff0);
598 SIER_SHOW(TFE1_EN, tfe1);
599 SIER_SHOW(TFE0_EN, tfe0);
605 * Make every character in a string lower-case
607 static void make_lowercase(char *s)
613 if ((c >= 'A') && (c <= 'Z'))
614 *p = c + ('a' - 'A');
619 static int __devinit fsl_ssi_probe(struct of_device *of_dev,
620 const struct of_device_id *match)
622 struct fsl_ssi_private *ssi_private;
624 struct device_attribute *dev_attr;
625 struct device_node *np = of_dev->dev.of_node;
626 const char *p, *sprop;
630 /* We are only interested in SSIs with a codec phandle in them, so let's
631 * make sure this SSI has one.
633 if (!of_get_property(np, "codec-handle", NULL))
636 /* We only support the SSI in "I2S Slave" mode */
637 sprop = of_get_property(np, "fsl,mode", NULL);
638 if (!sprop || strcmp(sprop, "i2s-slave")) {
639 dev_notice(&of_dev->dev, "mode %s is unsupported\n", sprop);
643 /* The DAI name is the last part of the full name of the node. */
644 p = strrchr(np->full_name, '/') + 1;
645 ssi_private = kzalloc(sizeof(struct fsl_ssi_private) + strlen(p),
648 dev_err(&of_dev->dev, "could not allocate DAI object\n");
652 strcpy(ssi_private->name, p);
654 /* Initialize this copy of the CPU DAI driver structure */
655 memcpy(&ssi_private->cpu_dai_drv, &fsl_ssi_dai_template,
656 sizeof(fsl_ssi_dai_template));
657 ssi_private->cpu_dai_drv.name = ssi_private->name;
659 /* Get the addresses and IRQ */
660 ret = of_address_to_resource(np, 0, &res);
662 dev_err(&of_dev->dev, "could not determine device resources\n");
666 ssi_private->ssi = ioremap(res.start, 1 + res.end - res.start);
667 ssi_private->ssi_phys = res.start;
668 ssi_private->irq = irq_of_parse_and_map(np, 0);
670 /* Are the RX and the TX clocks locked? */
671 if (of_find_property(np, "fsl,ssi-asynchronous", NULL))
672 ssi_private->asynchronous = 1;
674 ssi_private->cpu_dai_drv.symmetric_rates = 1;
676 /* Initialize the the device_attribute structure */
677 dev_attr = &ssi_private->dev_attr;
678 dev_attr->attr.name = "statistics";
679 dev_attr->attr.mode = S_IRUGO;
680 dev_attr->show = fsl_sysfs_ssi_show;
682 ret = device_create_file(&of_dev->dev, dev_attr);
684 dev_err(&of_dev->dev, "could not create sysfs %s file\n",
685 ssi_private->dev_attr.attr.name);
690 /* Register with ASoC */
691 dev_set_drvdata(&of_dev->dev, ssi_private);
693 ret = snd_soc_register_dai(&of_dev->dev, &ssi_private->cpu_dai_drv);
695 dev_err(&of_dev->dev, "failed to register DAI: %d\n", ret);
700 /* Trigger the machine driver's probe function. The platform driver
701 * name of the machine driver is taken from the /model property of the
702 * device tree. We also pass the address of the CPU DAI driver
705 sprop = of_get_property(of_find_node_by_path("/"), "model", NULL);
706 /* Sometimes the model name has a "fsl," prefix, so we strip that. */
707 p = strrchr(sprop, ',');
710 snprintf(name, sizeof(name), "snd-soc-%s", sprop);
711 make_lowercase(name);
714 platform_device_register_data(&of_dev->dev, name, 0, NULL, 0);
715 if (IS_ERR(ssi_private->pdev)) {
716 ret = PTR_ERR(ssi_private->pdev);
717 dev_err(&of_dev->dev, "failed to register platform: %d\n", ret);
726 * fsl_ssi_destroy_dai: destroy the snd_soc_dai object
728 * This function undoes the operations of fsl_ssi_probe()
730 static int fsl_ssi_remove(struct of_device *of_dev)
732 struct fsl_ssi_private *ssi_private = dev_get_drvdata(&of_dev->dev);
734 platform_device_unregister(ssi_private->pdev);
735 snd_soc_unregister_dai(&of_dev->dev);
736 device_remove_file(&of_dev->dev, &ssi_private->dev_attr);
739 dev_set_drvdata(&of_dev->dev, NULL);
744 static const struct of_device_id fsl_ssi_ids[] = {
745 { .compatible = "fsl,mpc8610-ssi", },
748 MODULE_DEVICE_TABLE(of, fsl_ssi_ids);
750 static struct of_platform_driver fsl_ssi_driver = {
752 .name = "fsl-ssi-dai",
753 .owner = THIS_MODULE,
754 .of_match_table = fsl_ssi_ids,
756 .probe = fsl_ssi_probe,
757 .remove = fsl_ssi_remove,
760 static int __init fsl_ssi_init(void)
762 printk(KERN_INFO "Freescale Synchronous Serial Interface (SSI) ASoC Driver\n");
764 return of_register_platform_driver(&fsl_ssi_driver);
767 static void __exit fsl_ssi_exit(void)
769 of_unregister_platform_driver(&fsl_ssi_driver);
772 module_init(fsl_ssi_init);
773 module_exit(fsl_ssi_exit);
775 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
776 MODULE_DESCRIPTION("Freescale Synchronous Serial Interface (SSI) ASoC Driver");
777 MODULE_LICENSE("GPL v2");