2 * skl_topology.h - Intel HDA Platform topology header file
4 * Copyright (C) 2014-15 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 #ifndef __SKL_TOPOLOGY_H__
22 #define __SKL_TOPOLOGY_H__
24 #include <linux/types.h>
26 #include <sound/hdaudio_ext.h>
27 #include <sound/soc.h>
29 #include "skl-tplg-interface.h"
31 #define BITS_PER_BYTE 8
32 #define MAX_TS_GROUPS 8
33 #define MAX_DMIC_TS_GROUPS 4
34 #define MAX_FIXED_DMIC_PARAMS_SIZE 727
36 /* Maximum number of coefficients up down mixer module */
37 #define UP_DOWN_MIXER_MAX_COEFF 6
39 #define MODULE_MAX_IN_PINS 8
40 #define MODULE_MAX_OUT_PINS 8
42 #define SKL_MIC_CH_SUPPORT 4
43 #define SKL_MIC_MAX_CH_SUPPORT 8
44 #define SKL_DEFAULT_MIC_SEL_GAIN 0x3FF
45 #define SKL_MIC_SEL_SWITCH 0x3
47 enum skl_channel_index {
49 SKL_CHANNEL_RIGHT = 1,
50 SKL_CHANNEL_CENTER = 2,
51 SKL_CHANNEL_LEFT_SURROUND = 3,
52 SKL_CHANNEL_CENTER_SURROUND = 3,
53 SKL_CHANNEL_RIGHT_SURROUND = 4,
55 SKL_CHANNEL_INVALID = 0xF,
80 SKL_FS_128000 = 128000,
81 SKL_FS_176400 = 176400,
82 SKL_FS_192000 = 192000,
86 enum skl_widget_type {
87 SKL_WIDGET_VMIXER = 1,
93 struct skl_audio_data_format {
94 enum skl_s_freq s_freq;
95 enum skl_bitdepth bit_depth;
97 enum skl_ch_cfg ch_cfg;
98 enum skl_interleaving interleaving;
99 u8 number_of_channels;
105 struct skl_base_cfg {
110 struct skl_audio_data_format audio_fmt;
113 struct skl_cpr_gtw_cfg {
117 /* not mandatory; required only for DMIC/I2S */
121 struct skl_dma_control {
128 struct skl_base_cfg base_cfg;
129 struct skl_audio_data_format out_fmt;
130 u32 cpr_feature_mask;
131 struct skl_cpr_gtw_cfg gtw_cfg;
135 struct skl_src_module_cfg {
136 struct skl_base_cfg base_cfg;
137 enum skl_s_freq src_cfg;
140 struct notification_mask {
145 struct skl_up_down_mixer_cfg {
146 struct skl_base_cfg base_cfg;
147 enum skl_ch_cfg out_ch_cfg;
148 /* This should be set to 1 if user coefficients are required */
150 /* Pass the user coeff in this array */
151 s32 coeff[UP_DOWN_MIXER_MAX_COEFF];
154 struct skl_algo_cfg {
155 struct skl_base_cfg base_cfg;
159 struct skl_base_outfmt_cfg {
160 struct skl_base_cfg base_cfg;
161 struct skl_audio_data_format out_fmt;
165 SKL_DMA_HDA_HOST_OUTPUT_CLASS = 0,
166 SKL_DMA_HDA_HOST_INPUT_CLASS = 1,
167 SKL_DMA_HDA_HOST_INOUT_CLASS = 2,
168 SKL_DMA_HDA_LINK_OUTPUT_CLASS = 8,
169 SKL_DMA_HDA_LINK_INPUT_CLASS = 9,
170 SKL_DMA_HDA_LINK_INOUT_CLASS = 0xA,
171 SKL_DMA_DMIC_LINK_INPUT_CLASS = 0xB,
172 SKL_DMA_I2S_LINK_OUTPUT_CLASS = 0xC,
173 SKL_DMA_I2S_LINK_INPUT_CLASS = 0xD,
176 union skl_ssp_dma_node {
179 u8 time_slot_index:4;
184 union skl_connector_node_id {
193 struct skl_module_fmt {
199 u32 interleaving_style;
204 struct skl_module_cfg;
206 struct skl_mod_inst_map {
211 struct skl_kpb_params {
213 struct skl_mod_inst_map map[0];
216 struct skl_module_inst_id {
222 enum skl_module_pin_state {
224 SKL_PIN_BIND_DONE = 1,
227 struct skl_module_pin {
228 struct skl_module_inst_id id;
231 enum skl_module_pin_state pin_state;
232 struct skl_module_cfg *tgt_mcfg;
235 struct skl_specific_cfg {
242 enum skl_pipe_state {
243 SKL_PIPE_INVALID = 0,
244 SKL_PIPE_CREATED = 1,
246 SKL_PIPE_STARTED = 3,
250 struct skl_pipe_module {
251 struct snd_soc_dapm_widget *w;
252 struct list_head node;
255 struct skl_pipe_params {
262 snd_pcm_format_t format;
265 unsigned int host_bps;
266 unsigned int link_bps;
275 struct skl_pipe_params *p_params;
276 enum skl_pipe_state state;
277 struct list_head w_list;
281 enum skl_module_state {
282 SKL_MODULE_UNINIT = 0,
283 SKL_MODULE_LOADED = 1,
284 SKL_MODULE_INIT_DONE = 2,
285 SKL_MODULE_BIND_DONE = 3,
286 SKL_MODULE_UNLOADED = 4,
289 enum d0i3_capability {
291 SKL_D0I3_STREAMING = 1,
292 SKL_D0I3_NON_STREAMING = 2,
295 struct skl_module_cfg {
297 struct skl_module_inst_id id;
299 bool homogenous_inputs;
300 bool homogenous_outputs;
301 struct skl_module_fmt in_fmt[MODULE_MAX_IN_PINS];
302 struct skl_module_fmt out_fmt[MODULE_MAX_OUT_PINS];
317 u8 dmic_ch_combo_index;
323 enum d0i3_capability d0i3_caps;
324 u32 dma_buffer_size; /* in milli seconds */
325 struct skl_module_pin *m_in_pin;
326 struct skl_module_pin *m_out_pin;
327 enum skl_module_type m_type;
328 enum skl_hw_conn_type hw_conn_type;
329 enum skl_module_state m_state;
330 struct skl_pipe *pipe;
331 struct skl_specific_cfg formats_config;
334 struct skl_algo_data {
342 struct skl_pipeline {
343 struct skl_pipe *pipe;
344 struct list_head node;
347 struct skl_module_deferred_bind {
348 struct skl_module_cfg *src;
349 struct skl_module_cfg *dst;
350 struct list_head node;
353 struct skl_mic_sel_config {
356 u16 blob[SKL_MIC_MAX_CH_SUPPORT][SKL_MIC_MAX_CH_SUPPORT];
366 static inline struct skl *get_skl_ctx(struct device *dev)
368 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
370 return ebus_to_skl(ebus);
373 int skl_tplg_be_update_params(struct snd_soc_dai *dai,
374 struct skl_pipe_params *params);
375 int skl_dsp_set_dma_control(struct skl_sst *ctx,
376 struct skl_module_cfg *mconfig);
377 void skl_tplg_set_be_dmic_config(struct snd_soc_dai *dai,
378 struct skl_pipe_params *params, int stream);
379 int skl_tplg_init(struct snd_soc_platform *platform,
380 struct hdac_ext_bus *ebus);
381 struct skl_module_cfg *skl_tplg_fe_get_cpr_module(
382 struct snd_soc_dai *dai, int stream);
383 int skl_tplg_update_pipe_params(struct device *dev,
384 struct skl_module_cfg *mconfig, struct skl_pipe_params *params);
386 void skl_tplg_d0i3_get(struct skl *skl, enum d0i3_capability caps);
387 void skl_tplg_d0i3_put(struct skl *skl, enum d0i3_capability caps);
389 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe);
391 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
393 int skl_pause_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
395 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
397 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
399 int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
401 int skl_init_module(struct skl_sst *ctx, struct skl_module_cfg *module_config);
403 int skl_bind_modules(struct skl_sst *ctx, struct skl_module_cfg
404 *src_module, struct skl_module_cfg *dst_module);
406 int skl_unbind_modules(struct skl_sst *ctx, struct skl_module_cfg
407 *src_module, struct skl_module_cfg *dst_module);
409 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
410 u32 param_id, struct skl_module_cfg *mcfg);
411 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size,
412 u32 param_id, struct skl_module_cfg *mcfg);
414 struct skl_module_cfg *skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai,
416 enum skl_bitdepth skl_get_bit_depth(int params);
417 int skl_pcm_host_dma_prepare(struct device *dev,
418 struct skl_pipe_params *params);
419 int skl_pcm_link_dma_prepare(struct device *dev,
420 struct skl_pipe_params *params);