2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/list.h>
20 #include <linux/pm_runtime.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/initval.h>
25 #include <sound/soc.h>
26 #include <sound/pcm_params.h>
27 #include <sound/sh_fsi.h>
28 #include <asm/atomic.h>
31 #define DOFF_CTL 0x0004
32 #define DOFF_ST 0x0008
34 #define DIFF_CTL 0x0010
35 #define DIFF_ST 0x0014
40 #define MUTE_ST 0x0028
41 #define REG_END MUTE_ST
47 #define CLK_RST 0x0210
48 #define SOFT_RST 0x0214
49 #define MREG_START INT_ST
50 #define MREG_END SOFT_RST
54 #define CR_FMT(param) ((param) << 4)
56 # define CR_MONO_D 0x1
64 #define IRQ_HALF 0x00100000
65 #define FIFO_CLR 0x00000001
68 #define ERR_OVER 0x00000010
69 #define ERR_UNDER 0x00000001
70 #define ST_ERR (ERR_OVER | ERR_UNDER)
73 #define B_CLK 0x00000010
74 #define A_CLK 0x00000001
77 #define INT_B_IN (1 << 12)
78 #define INT_B_OUT (1 << 8)
79 #define INT_A_IN (1 << 4)
80 #define INT_A_OUT (1 << 0)
82 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
84 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
86 /************************************************************************
92 ************************************************************************/
95 struct snd_pcm_substream *substream;
96 struct fsi_master *master;
110 struct fsi_priv fsia;
111 struct fsi_priv fsib;
112 struct sh_fsi_platform_info *info;
115 /************************************************************************
118 basic read write function
121 ************************************************************************/
122 static int __fsi_reg_write(u32 reg, u32 data)
124 /* valid data area is 24bit */
127 return ctrl_outl(data, reg);
130 static u32 __fsi_reg_read(u32 reg)
132 return ctrl_inl(reg);
135 static int __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
137 u32 val = __fsi_reg_read(reg);
142 return __fsi_reg_write(reg, val);
145 static int fsi_reg_write(struct fsi_priv *fsi, u32 reg, u32 data)
150 return __fsi_reg_write((u32)(fsi->base + reg), data);
153 static u32 fsi_reg_read(struct fsi_priv *fsi, u32 reg)
158 return __fsi_reg_read((u32)(fsi->base + reg));
161 static int fsi_reg_mask_set(struct fsi_priv *fsi, u32 reg, u32 mask, u32 data)
166 return __fsi_reg_mask_set((u32)(fsi->base + reg), mask, data);
169 static int fsi_master_write(struct fsi_master *master, u32 reg, u32 data)
171 if ((reg < MREG_START) ||
175 return __fsi_reg_write((u32)(master->base + reg), data);
178 static u32 fsi_master_read(struct fsi_master *master, u32 reg)
180 if ((reg < MREG_START) ||
184 return __fsi_reg_read((u32)(master->base + reg));
187 static int fsi_master_mask_set(struct fsi_master *master,
188 u32 reg, u32 mask, u32 data)
190 if ((reg < MREG_START) ||
194 return __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
197 /************************************************************************
203 ************************************************************************/
204 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
209 static int fsi_is_port_a(struct fsi_priv *fsi)
211 return fsi->master->base == fsi->base;
214 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
216 struct snd_soc_pcm_runtime *rtd = substream->private_data;
217 struct snd_soc_dai_link *machine = rtd->dai;
219 return machine->cpu_dai;
222 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
224 struct snd_soc_dai *dai = fsi_get_dai(substream);
226 return dai->private_data;
229 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
231 int is_porta = fsi_is_port_a(fsi);
232 struct fsi_master *master = fsi_get_master(fsi);
234 return is_porta ? master->info->porta_flags :
235 master->info->portb_flags;
238 static int fsi_is_master_mode(struct fsi_priv *fsi, int is_play)
241 u32 flags = fsi_get_info_flags(fsi);
243 mode = is_play ? SH_FSI_OUT_SLAVE_MODE : SH_FSI_IN_SLAVE_MODE;
250 return (mode & flags) != mode;
253 static u32 fsi_port_ab_io_bit(struct fsi_priv *fsi, int is_play)
255 int is_porta = fsi_is_port_a(fsi);
259 data = is_play ? (1 << 0) : (1 << 4);
261 data = is_play ? (1 << 8) : (1 << 12);
266 static void fsi_stream_push(struct fsi_priv *fsi,
267 struct snd_pcm_substream *substream,
271 fsi->substream = substream;
272 fsi->buffer_len = buffer_len;
273 fsi->period_len = period_len;
274 fsi->byte_offset = 0;
278 static void fsi_stream_pop(struct fsi_priv *fsi)
280 fsi->substream = NULL;
283 fsi->byte_offset = 0;
287 static int fsi_get_fifo_residue(struct fsi_priv *fsi, int is_play)
290 u32 reg = is_play ? DOFF_ST : DIFF_ST;
293 status = fsi_reg_read(fsi, reg);
294 residue = 0x1ff & (status >> 8);
295 residue *= fsi->chan;
300 /************************************************************************
306 ************************************************************************/
307 static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
309 u32 data = fsi_port_ab_io_bit(fsi, is_play);
310 struct fsi_master *master = fsi_get_master(fsi);
312 fsi_master_mask_set(master, IMSK, data, data);
313 fsi_master_mask_set(master, IEMSK, data, data);
316 static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
318 u32 data = fsi_port_ab_io_bit(fsi, is_play);
319 struct fsi_master *master = fsi_get_master(fsi);
321 fsi_master_mask_set(master, IMSK, data, 0);
322 fsi_master_mask_set(master, IEMSK, data, 0);
325 static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
327 u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
328 struct fsi_master *master = fsi_get_master(fsi);
331 fsi_master_mask_set(master, CLK_RST, val, val);
333 fsi_master_mask_set(master, CLK_RST, val, 0);
336 static void fsi_irq_init(struct fsi_priv *fsi, int is_play)
341 data = fsi_port_ab_io_bit(fsi, is_play);
342 ctrl = is_play ? DOFF_CTL : DIFF_CTL;
345 fsi_irq_disable(fsi, is_play);
347 /* set interrupt generation factor */
348 fsi_reg_write(fsi, ctrl, IRQ_HALF);
351 fsi_reg_mask_set(fsi, ctrl, FIFO_CLR, FIFO_CLR);
353 /* clear interrupt factor */
354 fsi_master_mask_set(fsi_get_master(fsi), INT_ST, data, 0);
357 static void fsi_soft_all_reset(struct fsi_master *master)
359 u32 status = fsi_master_read(master, SOFT_RST);
362 status &= 0x000000ff;
363 fsi_master_write(master, SOFT_RST, status);
367 status &= 0x000000f0;
368 fsi_master_write(master, SOFT_RST, status);
369 status |= 0x00000001;
370 fsi_master_write(master, SOFT_RST, status);
374 /* playback interrupt */
375 static int fsi_data_push(struct fsi_priv *fsi)
377 struct snd_pcm_runtime *runtime;
378 struct snd_pcm_substream *substream = NULL;
384 int i, ret, over_period;
388 !fsi->substream->runtime)
392 substream = fsi->substream;
393 runtime = substream->runtime;
395 /* FSI FIFO has limit.
396 * So, this driver can not send periods data at a time
398 if (fsi->byte_offset >=
399 fsi->period_len * (fsi->periods + 1)) {
402 fsi->periods = (fsi->periods + 1) % runtime->periods;
404 if (0 == fsi->periods)
405 fsi->byte_offset = 0;
408 /* get 1 channel data width */
409 width = frames_to_bytes(runtime, 1) / fsi->chan;
411 /* get send size for alsa */
412 send = (fsi->buffer_len - fsi->byte_offset) / width;
414 /* get FIFO free size */
415 fifo_free = (fsi->fifo_max * fsi->chan) - fsi_get_fifo_residue(fsi, 1);
418 if (fifo_free < send)
421 start = runtime->dma_area;
422 start += fsi->byte_offset;
426 for (i = 0; i < send; i++)
427 fsi_reg_write(fsi, DODT,
428 ((u32)*((u16 *)start + i) << 8));
431 for (i = 0; i < send; i++)
432 fsi_reg_write(fsi, DODT, *((u32 *)start + i));
438 fsi->byte_offset += send * width;
441 status = fsi_reg_read(fsi, DOFF_ST);
442 if (status & ERR_OVER) {
443 struct snd_soc_dai *dai = fsi_get_dai(substream);
444 dev_err(dai->dev, "over run error\n");
445 fsi_reg_write(fsi, DOFF_ST, status & ~ST_ERR);
449 fsi_irq_enable(fsi, 1);
452 snd_pcm_period_elapsed(substream);
457 static int fsi_data_pop(struct fsi_priv *fsi)
459 struct snd_pcm_runtime *runtime;
460 struct snd_pcm_substream *substream = NULL;
466 int i, ret, over_period;
470 !fsi->substream->runtime)
474 substream = fsi->substream;
475 runtime = substream->runtime;
477 /* FSI FIFO has limit.
478 * So, this driver can not send periods data at a time
480 if (fsi->byte_offset >=
481 fsi->period_len * (fsi->periods + 1)) {
484 fsi->periods = (fsi->periods + 1) % runtime->periods;
486 if (0 == fsi->periods)
487 fsi->byte_offset = 0;
490 /* get 1 channel data width */
491 width = frames_to_bytes(runtime, 1) / fsi->chan;
493 /* get free space for alsa */
494 free = (fsi->buffer_len - fsi->byte_offset) / width;
497 fifo_fill = fsi_get_fifo_residue(fsi, 0);
499 if (free < fifo_fill)
502 start = runtime->dma_area;
503 start += fsi->byte_offset;
507 for (i = 0; i < fifo_fill; i++)
508 *((u16 *)start + i) =
509 (u16)(fsi_reg_read(fsi, DIDT) >> 8);
512 for (i = 0; i < fifo_fill; i++)
513 *((u32 *)start + i) = fsi_reg_read(fsi, DIDT);
519 fsi->byte_offset += fifo_fill * width;
522 status = fsi_reg_read(fsi, DIFF_ST);
523 if (status & ERR_UNDER) {
524 struct snd_soc_dai *dai = fsi_get_dai(substream);
525 dev_err(dai->dev, "under run error\n");
526 fsi_reg_write(fsi, DIFF_ST, status & ~ST_ERR);
530 fsi_irq_enable(fsi, 0);
533 snd_pcm_period_elapsed(substream);
538 static irqreturn_t fsi_interrupt(int irq, void *data)
540 struct fsi_master *master = data;
541 u32 status = fsi_master_read(master, SOFT_RST) & ~0x00000010;
542 u32 int_st = fsi_master_read(master, INT_ST);
544 /* clear irq status */
545 fsi_master_write(master, SOFT_RST, status);
546 fsi_master_write(master, SOFT_RST, status | 0x00000010);
548 if (int_st & INT_A_OUT)
549 fsi_data_push(&master->fsia);
550 if (int_st & INT_B_OUT)
551 fsi_data_push(&master->fsib);
552 if (int_st & INT_A_IN)
553 fsi_data_pop(&master->fsia);
554 if (int_st & INT_B_IN)
555 fsi_data_pop(&master->fsib);
557 fsi_master_write(master, INT_ST, 0x0000000);
562 /************************************************************************
568 ************************************************************************/
569 static int fsi_dai_startup(struct snd_pcm_substream *substream,
570 struct snd_soc_dai *dai)
572 struct fsi_priv *fsi = fsi_get_priv(substream);
574 u32 flags = fsi_get_info_flags(fsi);
578 int is_play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
582 pm_runtime_get_sync(dai->dev);
585 data = is_play ? (1 << 0) : (1 << 4);
586 is_master = fsi_is_master_mode(fsi, is_play);
588 fsi_reg_mask_set(fsi, CKG1, data, data);
590 fsi_reg_mask_set(fsi, CKG1, data, 0);
592 /* clock inversion (CKG2) */
594 switch (SH_FSI_INVERSION_MASK & flags) {
608 fsi_reg_write(fsi, CKG2, data);
612 reg = is_play ? DO_FMT : DI_FMT;
613 fmt = is_play ? SH_FSI_GET_OFMT(flags) : SH_FSI_GET_IFMT(flags);
615 case SH_FSI_FMT_MONO:
617 data = CR_FMT(CR_MONO);
620 case SH_FSI_FMT_MONO_DELAY:
622 data = CR_FMT(CR_MONO_D);
627 data = CR_FMT(CR_PCM);
632 data = CR_FMT(CR_I2S);
637 data = CR_FMT(CR_TDM) | (fsi->chan - 1);
638 fsi->chan = is_play ?
639 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
641 case SH_FSI_FMT_TDM_DELAY:
643 data = CR_FMT(CR_TDM_D) | (fsi->chan - 1);
644 fsi->chan = is_play ?
645 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
648 dev_err(dai->dev, "unknown format.\n");
670 dev_err(dai->dev, "channel size error.\n");
674 fsi_reg_write(fsi, reg, data);
677 * clear clk reset if master mode
680 fsi_clk_ctrl(fsi, 1);
683 fsi_irq_init(fsi, is_play);
688 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
689 struct snd_soc_dai *dai)
691 struct fsi_priv *fsi = fsi_get_priv(substream);
692 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
694 fsi_irq_disable(fsi, is_play);
695 fsi_clk_ctrl(fsi, 0);
697 pm_runtime_put_sync(dai->dev);
700 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
701 struct snd_soc_dai *dai)
703 struct fsi_priv *fsi = fsi_get_priv(substream);
704 struct snd_pcm_runtime *runtime = substream->runtime;
705 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
709 case SNDRV_PCM_TRIGGER_START:
710 fsi_stream_push(fsi, substream,
711 frames_to_bytes(runtime, runtime->buffer_size),
712 frames_to_bytes(runtime, runtime->period_size));
713 ret = is_play ? fsi_data_push(fsi) : fsi_data_pop(fsi);
715 case SNDRV_PCM_TRIGGER_STOP:
716 fsi_irq_disable(fsi, is_play);
724 static struct snd_soc_dai_ops fsi_dai_ops = {
725 .startup = fsi_dai_startup,
726 .shutdown = fsi_dai_shutdown,
727 .trigger = fsi_dai_trigger,
730 /************************************************************************
736 ************************************************************************/
737 static struct snd_pcm_hardware fsi_pcm_hardware = {
738 .info = SNDRV_PCM_INFO_INTERLEAVED |
739 SNDRV_PCM_INFO_MMAP |
740 SNDRV_PCM_INFO_MMAP_VALID |
741 SNDRV_PCM_INFO_PAUSE,
748 .buffer_bytes_max = 64 * 1024,
749 .period_bytes_min = 32,
750 .period_bytes_max = 8192,
756 static int fsi_pcm_open(struct snd_pcm_substream *substream)
758 struct snd_pcm_runtime *runtime = substream->runtime;
761 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
763 ret = snd_pcm_hw_constraint_integer(runtime,
764 SNDRV_PCM_HW_PARAM_PERIODS);
769 static int fsi_hw_params(struct snd_pcm_substream *substream,
770 struct snd_pcm_hw_params *hw_params)
772 return snd_pcm_lib_malloc_pages(substream,
773 params_buffer_bytes(hw_params));
776 static int fsi_hw_free(struct snd_pcm_substream *substream)
778 return snd_pcm_lib_free_pages(substream);
781 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
783 struct snd_pcm_runtime *runtime = substream->runtime;
784 struct fsi_priv *fsi = fsi_get_priv(substream);
787 location = (fsi->byte_offset - 1);
791 return bytes_to_frames(runtime, location);
794 static struct snd_pcm_ops fsi_pcm_ops = {
795 .open = fsi_pcm_open,
796 .ioctl = snd_pcm_lib_ioctl,
797 .hw_params = fsi_hw_params,
798 .hw_free = fsi_hw_free,
799 .pointer = fsi_pointer,
802 /************************************************************************
808 ************************************************************************/
809 #define PREALLOC_BUFFER (32 * 1024)
810 #define PREALLOC_BUFFER_MAX (32 * 1024)
812 static void fsi_pcm_free(struct snd_pcm *pcm)
814 snd_pcm_lib_preallocate_free_for_all(pcm);
817 static int fsi_pcm_new(struct snd_card *card,
818 struct snd_soc_dai *dai,
822 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
823 * in MMAP mode (i.e. aplay -M)
825 return snd_pcm_lib_preallocate_pages_for_all(
827 SNDRV_DMA_TYPE_CONTINUOUS,
828 snd_dma_continuous_data(GFP_KERNEL),
829 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
832 /************************************************************************
838 ************************************************************************/
839 struct snd_soc_dai fsi_soc_dai[] = {
875 EXPORT_SYMBOL_GPL(fsi_soc_dai);
877 struct snd_soc_platform fsi_soc_platform = {
879 .pcm_ops = &fsi_pcm_ops,
880 .pcm_new = fsi_pcm_new,
881 .pcm_free = fsi_pcm_free,
883 EXPORT_SYMBOL_GPL(fsi_soc_platform);
885 /************************************************************************
891 ************************************************************************/
892 static int fsi_probe(struct platform_device *pdev)
894 struct fsi_master *master;
895 struct resource *res;
900 dev_err(&pdev->dev, "current fsi support id 0 only now\n");
904 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
905 irq = platform_get_irq(pdev, 0);
906 if (!res || (int)irq <= 0) {
907 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
912 master = kzalloc(sizeof(*master), GFP_KERNEL);
914 dev_err(&pdev->dev, "Could not allocate master\n");
919 master->base = ioremap_nocache(res->start, resource_size(res));
922 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
927 master->info = pdev->dev.platform_data;
928 master->fsia.base = master->base;
929 master->fsia.master = master;
930 master->fsib.base = master->base + 0x40;
931 master->fsib.master = master;
933 pm_runtime_enable(&pdev->dev);
934 pm_runtime_resume(&pdev->dev);
936 fsi_soc_dai[0].dev = &pdev->dev;
937 fsi_soc_dai[0].private_data = &master->fsia;
938 fsi_soc_dai[1].dev = &pdev->dev;
939 fsi_soc_dai[1].private_data = &master->fsib;
941 fsi_soft_all_reset(master);
943 ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED, "fsi", master);
945 dev_err(&pdev->dev, "irq request err\n");
949 ret = snd_soc_register_platform(&fsi_soc_platform);
951 dev_err(&pdev->dev, "cannot snd soc register\n");
955 return snd_soc_register_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
958 free_irq(irq, master);
960 iounmap(master->base);
961 pm_runtime_disable(&pdev->dev);
969 static int fsi_remove(struct platform_device *pdev)
971 struct fsi_master *master;
973 master = fsi_get_master(fsi_soc_dai[0].private_data);
975 snd_soc_unregister_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
976 snd_soc_unregister_platform(&fsi_soc_platform);
978 pm_runtime_disable(&pdev->dev);
980 free_irq(master->irq, master);
982 iounmap(master->base);
985 fsi_soc_dai[0].dev = NULL;
986 fsi_soc_dai[0].private_data = NULL;
987 fsi_soc_dai[1].dev = NULL;
988 fsi_soc_dai[1].private_data = NULL;
993 static int fsi_runtime_nop(struct device *dev)
995 /* Runtime PM callback shared between ->runtime_suspend()
996 * and ->runtime_resume(). Simply returns success.
998 * This driver re-initializes all registers after
999 * pm_runtime_get_sync() anyway so there is no need
1000 * to save and restore registers here.
1005 static struct dev_pm_ops fsi_pm_ops = {
1006 .runtime_suspend = fsi_runtime_nop,
1007 .runtime_resume = fsi_runtime_nop,
1010 static struct platform_driver fsi_driver = {
1016 .remove = fsi_remove,
1019 static int __init fsi_mobile_init(void)
1021 return platform_driver_register(&fsi_driver);
1024 static void __exit fsi_mobile_exit(void)
1026 platform_driver_unregister(&fsi_driver);
1028 module_init(fsi_mobile_init);
1029 module_exit(fsi_mobile_exit);
1031 MODULE_LICENSE("GPL");
1032 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1033 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");