virt/kvm/arm/vgic/vgic-its.c

   1 /*
   2  * GICv3 ITS emulation
   3  *
   4  * Copyright (C) 2015,2016 ARM Ltd.
   5  * Author: Andre Przywara <andre.przywara@arm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/cpu.h>
  21 #include <linux/kvm.h>
  22 #include <linux/kvm_host.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/list.h>
  25 #include <linux/uaccess.h>
  26
  27 #include <linux/irqchip/arm-gic-v3.h>
  28
  29 #include <asm/kvm_emulate.h>
  30 #include <asm/kvm_arm.h>
  31 #include <asm/kvm_mmu.h>
  32
  33 #include "vgic.h"
  34 #include "vgic-mmio.h"
  35
  36 static int vgic_its_save_tables_v0(struct vgic_its *its);
  37 static int vgic_its_restore_tables_v0(struct vgic_its *its);
  38 static int vgic_its_commit_v0(struct vgic_its *its);
  39 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
  40                              struct kvm_vcpu *filter_vcpu);
  41
  42 /*
  43  * Creates a new (reference to a) struct vgic_irq for a given LPI.
  44  * If this LPI is already mapped on another ITS, we increase its refcount
  45  * and return a pointer to the existing structure.
  46  * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
  47  * This function returns a pointer to the _unlocked_ structure.
  48  */
  49 static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid,
  50                                      struct kvm_vcpu *vcpu)
  51 {
  52         struct vgic_dist *dist = &kvm->arch.vgic;
  53         struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq;
  54         int ret;
  55
  56         /* In this case there is no put, since we keep the reference. */
  57         if (irq)
  58                 return irq;
  59
  60         irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL);
  61         if (!irq)
  62                 return ERR_PTR(-ENOMEM);
  63
  64         INIT_LIST_HEAD(&irq->lpi_list);
  65         INIT_LIST_HEAD(&irq->ap_list);
  66         spin_lock_init(&irq->irq_lock);
  67
  68         irq->config = VGIC_CONFIG_EDGE;
  69         kref_init(&irq->refcount);
  70         irq->intid = intid;
  71         irq->target_vcpu = vcpu;
  72
  73         spin_lock(&dist->lpi_list_lock);
  74
  75         /*
  76          * There could be a race with another vgic_add_lpi(), so we need to
  77          * check that we don't add a second list entry with the same LPI.
  78          */
  79         list_for_each_entry(oldirq, &dist->lpi_list_head, lpi_list) {
  80                 if (oldirq->intid != intid)
  81                         continue;
  82
  83                 /* Someone was faster with adding this LPI, lets use that. */
  84                 kfree(irq);
  85                 irq = oldirq;
  86
  87                 /*
  88                  * This increases the refcount, the caller is expected to
  89                  * call vgic_put_irq() on the returned pointer once it's
  90                  * finished with the IRQ.
  91                  */
  92                 vgic_get_irq_kref(irq);
  93
  94                 goto out_unlock;
  95         }
  96
  97         list_add_tail(&irq->lpi_list, &dist->lpi_list_head);
  98         dist->lpi_list_count++;
  99
 100 out_unlock:
 101         spin_unlock(&dist->lpi_list_lock);
 102
 103         /*
 104          * We "cache" the configuration table entries in our struct vgic_irq's.
 105          * However we only have those structs for mapped IRQs, so we read in
 106          * the respective config data from memory here upon mapping the LPI.
 107          */
 108         ret = update_lpi_config(kvm, irq, NULL);
 109         if (ret)
 110                 return ERR_PTR(ret);
 111
 112         ret = vgic_v3_lpi_sync_pending_status(kvm, irq);
 113         if (ret)
 114                 return ERR_PTR(ret);
 115
 116         return irq;
 117 }
 118
 119 struct its_device {
 120         struct list_head dev_list;
 121
 122         /* the head for the list of ITTEs */
 123         struct list_head itt_head;
 124         u32 num_eventid_bits;
 125         gpa_t itt_addr;
 126         u32 device_id;
 127 };
 128
 129 #define COLLECTION_NOT_MAPPED ((u32)~0)
 130
 131 struct its_collection {
 132         struct list_head coll_list;
 133
 134         u32 collection_id;
 135         u32 target_addr;
 136 };
 137
 138 #define its_is_collection_mapped(coll) ((coll) && \
 139                                 ((coll)->target_addr != COLLECTION_NOT_MAPPED))
 140
 141 struct its_ite {
 142         struct list_head ite_list;
 143
 144         struct vgic_irq *irq;
 145         struct its_collection *collection;
 146         u32 lpi;
 147         u32 event_id;
 148 };
 149
 150 /**
 151  * struct vgic_its_abi - ITS abi ops and settings
 152  * @cte_esz: collection table entry size
 153  * @dte_esz: device table entry size
 154  * @ite_esz: interrupt translation table entry size
 155  * @save tables: save the ITS tables into guest RAM
 156  * @restore_tables: restore the ITS internal structs from tables
 157  *  stored in guest RAM
 158  * @commit: initialize the registers which expose the ABI settings,
 159  *  especially the entry sizes
 160  */
 161 struct vgic_its_abi {
 162         int cte_esz;
 163         int dte_esz;
 164         int ite_esz;
 165         int (*save_tables)(struct vgic_its *its);
 166         int (*restore_tables)(struct vgic_its *its);
 167         int (*commit)(struct vgic_its *its);
 168 };
 169
 170 static const struct vgic_its_abi its_table_abi_versions[] = {
 171         [0] = {.cte_esz = 8, .dte_esz = 8, .ite_esz = 8,
 172          .save_tables = vgic_its_save_tables_v0,
 173          .restore_tables = vgic_its_restore_tables_v0,
 174          .commit = vgic_its_commit_v0,
 175         },
 176 };
 177
 178 #define NR_ITS_ABIS     ARRAY_SIZE(its_table_abi_versions)
 179
 180 inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its)
 181 {
 182         return &its_table_abi_versions[its->abi_rev];
 183 }
 184
 185 int vgic_its_set_abi(struct vgic_its *its, int rev)
 186 {
 187         const struct vgic_its_abi *abi;
 188
 189         its->abi_rev = rev;
 190         abi = vgic_its_get_abi(its);
 191         return abi->commit(its);
 192 }
 193
 194 /*
 195  * Find and returns a device in the device table for an ITS.
 196  * Must be called with the its_lock mutex held.
 197  */
 198 static struct its_device *find_its_device(struct vgic_its *its, u32 device_id)
 199 {
 200         struct its_device *device;
 201
 202         list_for_each_entry(device, &its->device_list, dev_list)
 203                 if (device_id == device->device_id)
 204                         return device;
 205
 206         return NULL;
 207 }
 208
 209 /*
 210  * Find and returns an interrupt translation table entry (ITTE) for a given
 211  * Device ID/Event ID pair on an ITS.
 212  * Must be called with the its_lock mutex held.
 213  */
 214 static struct its_ite *find_ite(struct vgic_its *its, u32 device_id,
 215                                   u32 event_id)
 216 {
 217         struct its_device *device;
 218         struct its_ite *ite;
 219
 220         device = find_its_device(its, device_id);
 221         if (device == NULL)
 222                 return NULL;
 223
 224         list_for_each_entry(ite, &device->itt_head, ite_list)
 225                 if (ite->event_id == event_id)
 226                         return ite;
 227
 228         return NULL;
 229 }
 230
 231 /* To be used as an iterator this macro misses the enclosing parentheses */
 232 #define for_each_lpi_its(dev, ite, its) \
 233         list_for_each_entry(dev, &(its)->device_list, dev_list) \
 234                 list_for_each_entry(ite, &(dev)->itt_head, ite_list)
 235
 236 /*
 237  * We only implement 48 bits of PA at the moment, although the ITS
 238  * supports more. Let's be restrictive here.
 239  */
 240 #define BASER_ADDRESS(x)        ((x) & GENMASK_ULL(47, 16))
 241 #define CBASER_ADDRESS(x)       ((x) & GENMASK_ULL(47, 12))
 242
 243 #define GIC_LPI_OFFSET 8192
 244
 245 #define VITS_TYPER_IDBITS 16
 246 #define VITS_TYPER_DEVBITS 16
 247 #define VITS_DTE_MAX_DEVID_OFFSET       (BIT(14) - 1)
 248 #define VITS_ITE_MAX_EVENTID_OFFSET     (BIT(16) - 1)
 249
 250 /*
 251  * Finds and returns a collection in the ITS collection table.
 252  * Must be called with the its_lock mutex held.
 253  */
 254 static struct its_collection *find_collection(struct vgic_its *its, int coll_id)
 255 {
 256         struct its_collection *collection;
 257
 258         list_for_each_entry(collection, &its->collection_list, coll_list) {
 259                 if (coll_id == collection->collection_id)
 260                         return collection;
 261         }
 262
 263         return NULL;
 264 }
 265
 266 #define LPI_PROP_ENABLE_BIT(p)  ((p) & LPI_PROP_ENABLED)
 267 #define LPI_PROP_PRIORITY(p)    ((p) & 0xfc)
 268
 269 /*
 270  * Reads the configuration data for a given LPI from guest memory and
 271  * updates the fields in struct vgic_irq.
 272  * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
 273  * VCPU. Unconditionally applies if filter_vcpu is NULL.
 274  */
 275 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
 276                              struct kvm_vcpu *filter_vcpu)
 277 {
 278         u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser);
 279         u8 prop;
 280         int ret;
 281
 282         ret = kvm_read_guest(kvm, propbase + irq->intid - GIC_LPI_OFFSET,
 283                              &prop, 1);
 284
 285         if (ret)
 286                 return ret;
 287
 288         spin_lock(&irq->irq_lock);
 289
 290         if (!filter_vcpu || filter_vcpu == irq->target_vcpu) {
 291                 irq->priority = LPI_PROP_PRIORITY(prop);
 292                 irq->enabled = LPI_PROP_ENABLE_BIT(prop);
 293
 294                 vgic_queue_irq_unlock(kvm, irq);
 295         } else {
 296                 spin_unlock(&irq->irq_lock);
 297         }
 298
 299         return 0;
 300 }
 301
 302 /*
 303  * Create a snapshot of the current LPI list, so that we can enumerate all
 304  * LPIs without holding any lock.
 305  * Returns the array length and puts the kmalloc'ed array into intid_ptr.
 306  */
 307 static int vgic_copy_lpi_list(struct kvm *kvm, u32 **intid_ptr)
 308 {
 309         struct vgic_dist *dist = &kvm->arch.vgic;
 310         struct vgic_irq *irq;
 311         u32 *intids;
 312         int irq_count = dist->lpi_list_count, i = 0;
 313
 314         /*
 315          * We use the current value of the list length, which may change
 316          * after the kmalloc. We don't care, because the guest shouldn't
 317          * change anything while the command handling is still running,
 318          * and in the worst case we would miss a new IRQ, which one wouldn't
 319          * expect to be covered by this command anyway.
 320          */
 321         intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL);
 322         if (!intids)
 323                 return -ENOMEM;
 324
 325         spin_lock(&dist->lpi_list_lock);
 326         list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
 327                 /* We don't need to "get" the IRQ, as we hold the list lock. */
 328                 intids[i] = irq->intid;
 329                 if (++i == irq_count)
 330                         break;
 331         }
 332         spin_unlock(&dist->lpi_list_lock);
 333
 334         *intid_ptr = intids;
 335         return irq_count;
 336 }
 337
 338 /*
 339  * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
 340  * is targeting) to the VGIC's view, which deals with target VCPUs.
 341  * Needs to be called whenever either the collection for a LPIs has
 342  * changed or the collection itself got retargeted.
 343  */
 344 static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite)
 345 {
 346         struct kvm_vcpu *vcpu;
 347
 348         if (!its_is_collection_mapped(ite->collection))
 349                 return;
 350
 351         vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr);
 352
 353         spin_lock(&ite->irq->irq_lock);
 354         ite->irq->target_vcpu = vcpu;
 355         spin_unlock(&ite->irq->irq_lock);
 356 }
 357
 358 /*
 359  * Updates the target VCPU for every LPI targeting this collection.
 360  * Must be called with the its_lock mutex held.
 361  */
 362 static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its,
 363                                        struct its_collection *coll)
 364 {
 365         struct its_device *device;
 366         struct its_ite *ite;
 367
 368         for_each_lpi_its(device, ite, its) {
 369                 if (!ite->collection || coll != ite->collection)
 370                         continue;
 371
 372                 update_affinity_ite(kvm, ite);
 373         }
 374 }
 375
 376 static u32 max_lpis_propbaser(u64 propbaser)
 377 {
 378         int nr_idbits = (propbaser & 0x1f) + 1;
 379
 380         return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS);
 381 }
 382
 383 /*
 384  * Scan the whole LPI pending table and sync the pending bit in there
 385  * with our own data structures. This relies on the LPI being
 386  * mapped before.
 387  */
 388 static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu)
 389 {
 390         gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser);
 391         struct vgic_irq *irq;
 392         int last_byte_offset = -1;
 393         int ret = 0;
 394         u32 *intids;
 395         int nr_irqs, i;
 396
 397         nr_irqs = vgic_copy_lpi_list(vcpu->kvm, &intids);
 398         if (nr_irqs < 0)
 399                 return nr_irqs;
 400
 401         for (i = 0; i < nr_irqs; i++) {
 402                 int byte_offset, bit_nr;
 403                 u8 pendmask;
 404
 405                 byte_offset = intids[i] / BITS_PER_BYTE;
 406                 bit_nr = intids[i] % BITS_PER_BYTE;
 407
 408                 /*
 409                  * For contiguously allocated LPIs chances are we just read
 410                  * this very same byte in the last iteration. Reuse that.
 411                  */
 412                 if (byte_offset != last_byte_offset) {
 413                         ret = kvm_read_guest(vcpu->kvm, pendbase + byte_offset,
 414                                              &pendmask, 1);
 415                         if (ret) {
 416                                 kfree(intids);
 417                                 return ret;
 418                         }
 419                         last_byte_offset = byte_offset;
 420                 }
 421
 422                 irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]);
 423                 spin_lock(&irq->irq_lock);
 424                 irq->pending_latch = pendmask & (1U << bit_nr);
 425                 vgic_queue_irq_unlock(vcpu->kvm, irq);
 426                 vgic_put_irq(vcpu->kvm, irq);
 427         }
 428
 429         kfree(intids);
 430
 431         return ret;
 432 }
 433
 434 static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm,
 435                                               struct vgic_its *its,
 436                                               gpa_t addr, unsigned int len)
 437 {
 438         const struct vgic_its_abi *abi = vgic_its_get_abi(its);
 439         u64 reg = GITS_TYPER_PLPIS;
 440
 441         /*
 442          * We use linear CPU numbers for redistributor addressing,
 443          * so GITS_TYPER.PTA is 0.
 444          * Also we force all PROPBASER registers to be the same, so
 445          * CommonLPIAff is 0 as well.
 446          * To avoid memory waste in the guest, we keep the number of IDBits and
 447          * DevBits low - as least for the time being.
 448          */
 449         reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT;
 450         reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT;
 451         reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT;
 452
 453         return extract_bytes(reg, addr & 7, len);
 454 }
 455
 456 static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm,
 457                                              struct vgic_its *its,
 458                                              gpa_t addr, unsigned int len)
 459 {
 460         u32 val;
 461
 462         val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK;
 463         val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM;
 464         return val;
 465 }
 466
 467 static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm,
 468                                             struct vgic_its *its,
 469                                             gpa_t addr, unsigned int len,
 470                                             unsigned long val)
 471 {
 472         u32 rev = GITS_IIDR_REV(val);
 473
 474         if (rev >= NR_ITS_ABIS)
 475                 return -EINVAL;
 476         return vgic_its_set_abi(its, rev);
 477 }
 478
 479 static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
 480                                                struct vgic_its *its,
 481                                                gpa_t addr, unsigned int len)
 482 {
 483         switch (addr & 0xffff) {
 484         case GITS_PIDR0:
 485                 return 0x92;    /* part number, bits[7:0] */
 486         case GITS_PIDR1:
 487                 return 0xb4;    /* part number, bits[11:8] */
 488         case GITS_PIDR2:
 489                 return GIC_PIDR2_ARCH_GICv3 | 0x0b;
 490         case GITS_PIDR4:
 491                 return 0x40;    /* This is a 64K software visible page */
 492         /* The following are the ID registers for (any) GIC. */
 493         case GITS_CIDR0:
 494                 return 0x0d;
 495         case GITS_CIDR1:
 496                 return 0xf0;
 497         case GITS_CIDR2:
 498                 return 0x05;
 499         case GITS_CIDR3:
 500                 return 0xb1;
 501         }
 502
 503         return 0;
 504 }
 505
 506 /*
 507  * Find the target VCPU and the LPI number for a given devid/eventid pair
 508  * and make this IRQ pending, possibly injecting it.
 509  * Must be called with the its_lock mutex held.
 510  * Returns 0 on success, a positive error value for any ITS mapping
 511  * related errors and negative error values for generic errors.
 512  */
 513 static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its,
 514                                 u32 devid, u32 eventid)
 515 {
 516         struct kvm_vcpu *vcpu;
 517         struct its_ite *ite;
 518
 519         if (!its->enabled)
 520                 return -EBUSY;
 521
 522         ite = find_ite(its, devid, eventid);
 523         if (!ite || !its_is_collection_mapped(ite->collection))
 524                 return E_ITS_INT_UNMAPPED_INTERRUPT;
 525
 526         vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr);
 527         if (!vcpu)
 528                 return E_ITS_INT_UNMAPPED_INTERRUPT;
 529
 530         if (!vcpu->arch.vgic_cpu.lpis_enabled)
 531                 return -EBUSY;
 532
 533         spin_lock(&ite->irq->irq_lock);
 534         ite->irq->pending_latch = true;
 535         vgic_queue_irq_unlock(kvm, ite->irq);
 536
 537         return 0;
 538 }
 539
 540 static struct vgic_io_device *vgic_get_its_iodev(struct kvm_io_device *dev)
 541 {
 542         struct vgic_io_device *iodev;
 543
 544         if (dev->ops != &kvm_io_gic_ops)
 545                 return NULL;
 546
 547         iodev = container_of(dev, struct vgic_io_device, dev);
 548
 549         if (iodev->iodev_type != IODEV_ITS)
 550                 return NULL;
 551
 552         return iodev;
 553 }
 554
 555 /*
 556  * Queries the KVM IO bus framework to get the ITS pointer from the given
 557  * doorbell address.
 558  * We then call vgic_its_trigger_msi() with the decoded data.
 559  * According to the KVM_SIGNAL_MSI API description returns 1 on success.
 560  */
 561 int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
 562 {
 563         u64 address;
 564         struct kvm_io_device *kvm_io_dev;
 565         struct vgic_io_device *iodev;
 566         int ret;
 567
 568         if (!vgic_has_its(kvm))
 569                 return -ENODEV;
 570
 571         if (!(msi->flags & KVM_MSI_VALID_DEVID))
 572                 return -EINVAL;
 573
 574         address = (u64)msi->address_hi << 32 | msi->address_lo;
 575
 576         kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address);
 577         if (!kvm_io_dev)
 578                 return -EINVAL;
 579
 580         iodev = vgic_get_its_iodev(kvm_io_dev);
 581         if (!iodev)
 582                 return -EINVAL;
 583
 584         mutex_lock(&iodev->its->its_lock);
 585         ret = vgic_its_trigger_msi(kvm, iodev->its, msi->devid, msi->data);
 586         mutex_unlock(&iodev->its->its_lock);
 587
 588         if (ret < 0)
 589                 return ret;
 590
 591         /*
 592          * KVM_SIGNAL_MSI demands a return value > 0 for success and 0
 593          * if the guest has blocked the MSI. So we map any LPI mapping
 594          * related error to that.
 595          */
 596         if (ret)
 597                 return 0;
 598         else
 599                 return 1;
 600 }
 601
 602 /* Requires the its_lock to be held. */
 603 static void its_free_ite(struct kvm *kvm, struct its_ite *ite)
 604 {
 605         list_del(&ite->ite_list);
 606
 607         /* This put matches the get in vgic_add_lpi. */
 608         if (ite->irq)
 609                 vgic_put_irq(kvm, ite->irq);
 610
 611         kfree(ite);
 612 }
 613
 614 static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size)
 615 {
 616         return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1);
 617 }
 618
 619 #define its_cmd_get_command(cmd)        its_cmd_mask_field(cmd, 0,  0,  8)
 620 #define its_cmd_get_deviceid(cmd)       its_cmd_mask_field(cmd, 0, 32, 32)
 621 #define its_cmd_get_size(cmd)           (its_cmd_mask_field(cmd, 1,  0,  5) + 1)
 622 #define its_cmd_get_id(cmd)             its_cmd_mask_field(cmd, 1,  0, 32)
 623 #define its_cmd_get_physical_id(cmd)    its_cmd_mask_field(cmd, 1, 32, 32)
 624 #define its_cmd_get_collection(cmd)     its_cmd_mask_field(cmd, 2,  0, 16)
 625 #define its_cmd_get_ittaddr(cmd)        (its_cmd_mask_field(cmd, 2,  8, 44) << 8)
 626 #define its_cmd_get_target_addr(cmd)    its_cmd_mask_field(cmd, 2, 16, 32)
 627 #define its_cmd_get_validbit(cmd)       its_cmd_mask_field(cmd, 2, 63,  1)
 628
 629 /*
 630  * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
 631  * Must be called with the its_lock mutex held.
 632  */
 633 static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its,
 634                                        u64 *its_cmd)
 635 {
 636         u32 device_id = its_cmd_get_deviceid(its_cmd);
 637         u32 event_id = its_cmd_get_id(its_cmd);
 638         struct its_ite *ite;
 639
 640
 641         ite = find_ite(its, device_id, event_id);
 642         if (ite && ite->collection) {
 643                 /*
 644                  * Though the spec talks about removing the pending state, we
 645                  * don't bother here since we clear the ITTE anyway and the
 646                  * pending state is a property of the ITTE struct.
 647                  */
 648                 its_free_ite(kvm, ite);
 649                 return 0;
 650         }
 651
 652         return E_ITS_DISCARD_UNMAPPED_INTERRUPT;
 653 }
 654
 655 /*
 656  * The MOVI command moves an ITTE to a different collection.
 657  * Must be called with the its_lock mutex held.
 658  */
 659 static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its,
 660                                     u64 *its_cmd)
 661 {
 662         u32 device_id = its_cmd_get_deviceid(its_cmd);
 663         u32 event_id = its_cmd_get_id(its_cmd);
 664         u32 coll_id = its_cmd_get_collection(its_cmd);
 665         struct kvm_vcpu *vcpu;
 666         struct its_ite *ite;
 667         struct its_collection *collection;
 668
 669         ite = find_ite(its, device_id, event_id);
 670         if (!ite)
 671                 return E_ITS_MOVI_UNMAPPED_INTERRUPT;
 672
 673         if (!its_is_collection_mapped(ite->collection))
 674                 return E_ITS_MOVI_UNMAPPED_COLLECTION;
 675
 676         collection = find_collection(its, coll_id);
 677         if (!its_is_collection_mapped(collection))
 678                 return E_ITS_MOVI_UNMAPPED_COLLECTION;
 679
 680         ite->collection = collection;
 681         vcpu = kvm_get_vcpu(kvm, collection->target_addr);
 682
 683         spin_lock(&ite->irq->irq_lock);
 684         ite->irq->target_vcpu = vcpu;
 685         spin_unlock(&ite->irq->irq_lock);
 686
 687         return 0;
 688 }
 689
 690 /*
 691  * Check whether an ID can be stored into the corresponding guest table.
 692  * For a direct table this is pretty easy, but gets a bit nasty for
 693  * indirect tables. We check whether the resulting guest physical address
 694  * is actually valid (covered by a memslot and guest accessible).
 695  * For this we have to read the respective first level entry.
 696  */
 697 static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id)
 698 {
 699         int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
 700         u64 indirect_ptr, type = GITS_BASER_TYPE(baser);
 701         int esz = GITS_BASER_ENTRY_SIZE(baser);
 702         int index;
 703         gfn_t gfn;
 704
 705         switch (type) {
 706         case GITS_BASER_TYPE_DEVICE:
 707                 if (id >= BIT_ULL(VITS_TYPER_DEVBITS))
 708                         return false;
 709                 break;
 710         case GITS_BASER_TYPE_COLLECTION:
 711                 /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */
 712                 if (id >= BIT_ULL(16))
 713                         return false;
 714                 break;
 715         default:
 716                 return false;
 717         }
 718
 719         if (!(baser & GITS_BASER_INDIRECT)) {
 720                 phys_addr_t addr;
 721
 722                 if (id >= (l1_tbl_size / esz))
 723                         return false;
 724
 725                 addr = BASER_ADDRESS(baser) + id * esz;
 726                 gfn = addr >> PAGE_SHIFT;
 727
 728                 return kvm_is_visible_gfn(its->dev->kvm, gfn);
 729         }
 730
 731         /* calculate and check the index into the 1st level */
 732         index = id / (SZ_64K / esz);
 733         if (index >= (l1_tbl_size / sizeof(u64)))
 734                 return false;
 735
 736         /* Each 1st level entry is represented by a 64-bit value. */
 737         if (kvm_read_guest(its->dev->kvm,
 738                            BASER_ADDRESS(baser) + index * sizeof(indirect_ptr),
 739                            &indirect_ptr, sizeof(indirect_ptr)))
 740                 return false;
 741
 742         indirect_ptr = le64_to_cpu(indirect_ptr);
 743
 744         /* check the valid bit of the first level entry */
 745         if (!(indirect_ptr & BIT_ULL(63)))
 746                 return false;
 747
 748         /*
 749          * Mask the guest physical address and calculate the frame number.
 750          * Any address beyond our supported 48 bits of PA will be caught
 751          * by the actual check in the final step.
 752          */
 753         indirect_ptr &= GENMASK_ULL(51, 16);
 754
 755         /* Find the address of the actual entry */
 756         index = id % (SZ_64K / esz);
 757         indirect_ptr += index * esz;
 758         gfn = indirect_ptr >> PAGE_SHIFT;
 759
 760         return kvm_is_visible_gfn(its->dev->kvm, gfn);
 761 }
 762
 763 static int vgic_its_alloc_collection(struct vgic_its *its,
 764                                      struct its_collection **colp,
 765                                      u32 coll_id)
 766 {
 767         struct its_collection *collection;
 768
 769         if (!vgic_its_check_id(its, its->baser_coll_table, coll_id))
 770                 return E_ITS_MAPC_COLLECTION_OOR;
 771
 772         collection = kzalloc(sizeof(*collection), GFP_KERNEL);
 773
 774         collection->collection_id = coll_id;
 775         collection->target_addr = COLLECTION_NOT_MAPPED;
 776
 777         list_add_tail(&collection->coll_list, &its->collection_list);
 778         *colp = collection;
 779
 780         return 0;
 781 }
 782
 783 static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id)
 784 {
 785         struct its_collection *collection;
 786         struct its_device *device;
 787         struct its_ite *ite;
 788
 789         /*
 790          * Clearing the mapping for that collection ID removes the
 791          * entry from the list. If there wasn't any before, we can
 792          * go home early.
 793          */
 794         collection = find_collection(its, coll_id);
 795         if (!collection)
 796                 return;
 797
 798         for_each_lpi_its(device, ite, its)
 799                 if (ite->collection &&
 800                     ite->collection->collection_id == coll_id)
 801                         ite->collection = NULL;
 802
 803         list_del(&collection->coll_list);
 804         kfree(collection);
 805 }
 806
 807 /* Must be called with its_lock mutex held */
 808 static struct its_ite *vgic_its_alloc_ite(struct its_device *device,
 809                                           struct its_collection *collection,
 810                                           u32 lpi_id, u32 event_id)
 811 {
 812         struct its_ite *ite;
 813
 814         ite = kzalloc(sizeof(*ite), GFP_KERNEL);
 815         if (!ite)
 816                 return ERR_PTR(-ENOMEM);
 817
 818         ite->event_id   = event_id;
 819         ite->collection = collection;
 820         ite->lpi = lpi_id;
 821
 822         list_add_tail(&ite->ite_list, &device->itt_head);
 823         return ite;
 824 }
 825
 826 /*
 827  * The MAPTI and MAPI commands map LPIs to ITTEs.
 828  * Must be called with its_lock mutex held.
 829  */
 830 static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its,
 831                                     u64 *its_cmd)
 832 {
 833         u32 device_id = its_cmd_get_deviceid(its_cmd);
 834         u32 event_id = its_cmd_get_id(its_cmd);
 835         u32 coll_id = its_cmd_get_collection(its_cmd);
 836         struct its_ite *ite;
 837         struct kvm_vcpu *vcpu = NULL;
 838         struct its_device *device;
 839         struct its_collection *collection, *new_coll = NULL;
 840         struct vgic_irq *irq;
 841         int lpi_nr;
 842
 843         device = find_its_device(its, device_id);
 844         if (!device)
 845                 return E_ITS_MAPTI_UNMAPPED_DEVICE;
 846
 847         if (event_id >= BIT_ULL(device->num_eventid_bits))
 848                 return E_ITS_MAPTI_ID_OOR;
 849
 850         if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI)
 851                 lpi_nr = its_cmd_get_physical_id(its_cmd);
 852         else
 853                 lpi_nr = event_id;
 854         if (lpi_nr < GIC_LPI_OFFSET ||
 855             lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser))
 856                 return E_ITS_MAPTI_PHYSICALID_OOR;
 857
 858         /* If there is an existing mapping, behavior is UNPREDICTABLE. */
 859         if (find_ite(its, device_id, event_id))
 860                 return 0;
 861
 862         collection = find_collection(its, coll_id);
 863         if (!collection) {
 864                 int ret = vgic_its_alloc_collection(its, &collection, coll_id);
 865                 if (ret)
 866                         return ret;
 867                 new_coll = collection;
 868         }
 869
 870         ite = vgic_its_alloc_ite(device, collection, lpi_nr, event_id);
 871         if (IS_ERR(ite)) {
 872                 if (new_coll)
 873                         vgic_its_free_collection(its, coll_id);
 874                 return PTR_ERR(ite);
 875         }
 876
 877         if (its_is_collection_mapped(collection))
 878                 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
 879
 880         irq = vgic_add_lpi(kvm, lpi_nr, vcpu);
 881         if (IS_ERR(irq)) {
 882                 if (new_coll)
 883                         vgic_its_free_collection(its, coll_id);
 884                 its_free_ite(kvm, ite);
 885                 return PTR_ERR(irq);
 886         }
 887         ite->irq = irq;
 888
 889         return 0;
 890 }
 891
 892 /* Requires the its_lock to be held. */
 893 static void vgic_its_unmap_device(struct kvm *kvm, struct its_device *device)
 894 {
 895         struct its_ite *ite, *temp;
 896
 897         /*
 898          * The spec says that unmapping a device with still valid
 899          * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
 900          * since we cannot leave the memory unreferenced.
 901          */
 902         list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list)
 903                 its_free_ite(kvm, ite);
 904
 905         list_del(&device->dev_list);
 906         kfree(device);
 907 }
 908
 909 /* Must be called with its_lock mutex held */
 910 static struct its_device *vgic_its_alloc_device(struct vgic_its *its,
 911                                                 u32 device_id, gpa_t itt_addr,
 912                                                 u8 num_eventid_bits)
 913 {
 914         struct its_device *device;
 915
 916         device = kzalloc(sizeof(*device), GFP_KERNEL);
 917         if (!device)
 918                 return ERR_PTR(-ENOMEM);
 919
 920         device->device_id = device_id;
 921         device->itt_addr = itt_addr;
 922         device->num_eventid_bits = num_eventid_bits;
 923         INIT_LIST_HEAD(&device->itt_head);
 924
 925         list_add_tail(&device->dev_list, &its->device_list);
 926         return device;
 927 }
 928
 929 /*
 930  * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
 931  * Must be called with the its_lock mutex held.
 932  */
 933 static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its,
 934                                     u64 *its_cmd)
 935 {
 936         u32 device_id = its_cmd_get_deviceid(its_cmd);
 937         bool valid = its_cmd_get_validbit(its_cmd);
 938         u8 num_eventid_bits = its_cmd_get_size(its_cmd);
 939         gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd);
 940         struct its_device *device;
 941
 942         if (!vgic_its_check_id(its, its->baser_device_table, device_id))
 943                 return E_ITS_MAPD_DEVICE_OOR;
 944
 945         if (valid && num_eventid_bits > VITS_TYPER_IDBITS)
 946                 return E_ITS_MAPD_ITTSIZE_OOR;
 947
 948         device = find_its_device(its, device_id);
 949
 950         /*
 951          * The spec says that calling MAPD on an already mapped device
 952          * invalidates all cached data for this device. We implement this
 953          * by removing the mapping and re-establishing it.
 954          */
 955         if (device)
 956                 vgic_its_unmap_device(kvm, device);
 957
 958         /*
 959          * The spec does not say whether unmapping a not-mapped device
 960          * is an error, so we are done in any case.
 961          */
 962         if (!valid)
 963                 return 0;
 964
 965         device = vgic_its_alloc_device(its, device_id, itt_addr,
 966                                        num_eventid_bits);
 967         if (IS_ERR(device))
 968                 return PTR_ERR(device);
 969
 970         return 0;
 971 }
 972
 973 /*
 974  * The MAPC command maps collection IDs to redistributors.
 975  * Must be called with the its_lock mutex held.
 976  */
 977 static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its,
 978                                     u64 *its_cmd)
 979 {
 980         u16 coll_id;
 981         u32 target_addr;
 982         struct its_collection *collection;
 983         bool valid;
 984
 985         valid = its_cmd_get_validbit(its_cmd);
 986         coll_id = its_cmd_get_collection(its_cmd);
 987         target_addr = its_cmd_get_target_addr(its_cmd);
 988
 989         if (target_addr >= atomic_read(&kvm->online_vcpus))
 990                 return E_ITS_MAPC_PROCNUM_OOR;
 991
 992         if (!valid) {
 993                 vgic_its_free_collection(its, coll_id);
 994         } else {
 995                 collection = find_collection(its, coll_id);
 996
 997                 if (!collection) {
 998                         int ret;
 999
1000                         ret = vgic_its_alloc_collection(its, &collection,
1001                                                         coll_id);
1002                         if (ret)
1003                                 return ret;
1004                         collection->target_addr = target_addr;
1005                 } else {
1006                         collection->target_addr = target_addr;
1007                         update_affinity_collection(kvm, its, collection);
1008                 }
1009         }
1010
1011         return 0;
1012 }
1013
1014 /*
1015  * The CLEAR command removes the pending state for a particular LPI.
1016  * Must be called with the its_lock mutex held.
1017  */
1018 static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its,
1019                                      u64 *its_cmd)
1020 {
1021         u32 device_id = its_cmd_get_deviceid(its_cmd);
1022         u32 event_id = its_cmd_get_id(its_cmd);
1023         struct its_ite *ite;
1024
1025
1026         ite = find_ite(its, device_id, event_id);
1027         if (!ite)
1028                 return E_ITS_CLEAR_UNMAPPED_INTERRUPT;
1029
1030         ite->irq->pending_latch = false;
1031
1032         return 0;
1033 }
1034
1035 /*
1036  * The INV command syncs the configuration bits from the memory table.
1037  * Must be called with the its_lock mutex held.
1038  */
1039 static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its,
1040                                    u64 *its_cmd)
1041 {
1042         u32 device_id = its_cmd_get_deviceid(its_cmd);
1043         u32 event_id = its_cmd_get_id(its_cmd);
1044         struct its_ite *ite;
1045
1046
1047         ite = find_ite(its, device_id, event_id);
1048         if (!ite)
1049                 return E_ITS_INV_UNMAPPED_INTERRUPT;
1050
1051         return update_lpi_config(kvm, ite->irq, NULL);
1052 }
1053
1054 /*
1055  * The INVALL command requests flushing of all IRQ data in this collection.
1056  * Find the VCPU mapped to that collection, then iterate over the VM's list
1057  * of mapped LPIs and update the configuration for each IRQ which targets
1058  * the specified vcpu. The configuration will be read from the in-memory
1059  * configuration table.
1060  * Must be called with the its_lock mutex held.
1061  */
1062 static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its,
1063                                       u64 *its_cmd)
1064 {
1065         u32 coll_id = its_cmd_get_collection(its_cmd);
1066         struct its_collection *collection;
1067         struct kvm_vcpu *vcpu;
1068         struct vgic_irq *irq;
1069         u32 *intids;
1070         int irq_count, i;
1071
1072         collection = find_collection(its, coll_id);
1073         if (!its_is_collection_mapped(collection))
1074                 return E_ITS_INVALL_UNMAPPED_COLLECTION;
1075
1076         vcpu = kvm_get_vcpu(kvm, collection->target_addr);
1077
1078         irq_count = vgic_copy_lpi_list(kvm, &intids);
1079         if (irq_count < 0)
1080                 return irq_count;
1081
1082         for (i = 0; i < irq_count; i++) {
1083                 irq = vgic_get_irq(kvm, NULL, intids[i]);
1084                 if (!irq)
1085                         continue;
1086                 update_lpi_config(kvm, irq, vcpu);
1087                 vgic_put_irq(kvm, irq);
1088         }
1089
1090         kfree(intids);
1091
1092         return 0;
1093 }
1094
1095 /*
1096  * The MOVALL command moves the pending state of all IRQs targeting one
1097  * redistributor to another. We don't hold the pending state in the VCPUs,
1098  * but in the IRQs instead, so there is really not much to do for us here.
1099  * However the spec says that no IRQ must target the old redistributor
1100  * afterwards, so we make sure that no LPI is using the associated target_vcpu.
1101  * This command affects all LPIs in the system that target that redistributor.
1102  */
1103 static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its,
1104                                       u64 *its_cmd)
1105 {
1106         struct vgic_dist *dist = &kvm->arch.vgic;
1107         u32 target1_addr = its_cmd_get_target_addr(its_cmd);
1108         u32 target2_addr = its_cmd_mask_field(its_cmd, 3, 16, 32);
1109         struct kvm_vcpu *vcpu1, *vcpu2;
1110         struct vgic_irq *irq;
1111
1112         if (target1_addr >= atomic_read(&kvm->online_vcpus) ||
1113             target2_addr >= atomic_read(&kvm->online_vcpus))
1114                 return E_ITS_MOVALL_PROCNUM_OOR;
1115
1116         if (target1_addr == target2_addr)
1117                 return 0;
1118
1119         vcpu1 = kvm_get_vcpu(kvm, target1_addr);
1120         vcpu2 = kvm_get_vcpu(kvm, target2_addr);
1121
1122         spin_lock(&dist->lpi_list_lock);
1123
1124         list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
1125                 spin_lock(&irq->irq_lock);
1126
1127                 if (irq->target_vcpu == vcpu1)
1128                         irq->target_vcpu = vcpu2;
1129
1130                 spin_unlock(&irq->irq_lock);
1131         }
1132
1133         spin_unlock(&dist->lpi_list_lock);
1134
1135         return 0;
1136 }
1137
1138 /*
1139  * The INT command injects the LPI associated with that DevID/EvID pair.
1140  * Must be called with the its_lock mutex held.
1141  */
1142 static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its,
1143                                    u64 *its_cmd)
1144 {
1145         u32 msi_data = its_cmd_get_id(its_cmd);
1146         u64 msi_devid = its_cmd_get_deviceid(its_cmd);
1147
1148         return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data);
1149 }
1150
1151 /*
1152  * This function is called with the its_cmd lock held, but the ITS data
1153  * structure lock dropped.
1154  */
1155 static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its,
1156                                    u64 *its_cmd)
1157 {
1158         int ret = -ENODEV;
1159
1160         mutex_lock(&its->its_lock);
1161         switch (its_cmd_get_command(its_cmd)) {
1162         case GITS_CMD_MAPD:
1163                 ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd);
1164                 break;
1165         case GITS_CMD_MAPC:
1166                 ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd);
1167                 break;
1168         case GITS_CMD_MAPI:
1169                 ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1170                 break;
1171         case GITS_CMD_MAPTI:
1172                 ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1173                 break;
1174         case GITS_CMD_MOVI:
1175                 ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd);
1176                 break;
1177         case GITS_CMD_DISCARD:
1178                 ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd);
1179                 break;
1180         case GITS_CMD_CLEAR:
1181                 ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd);
1182                 break;
1183         case GITS_CMD_MOVALL:
1184                 ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd);
1185                 break;
1186         case GITS_CMD_INT:
1187                 ret = vgic_its_cmd_handle_int(kvm, its, its_cmd);
1188                 break;
1189         case GITS_CMD_INV:
1190                 ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd);
1191                 break;
1192         case GITS_CMD_INVALL:
1193                 ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd);
1194                 break;
1195         case GITS_CMD_SYNC:
1196                 /* we ignore this command: we are in sync all of the time */
1197                 ret = 0;
1198                 break;
1199         }
1200         mutex_unlock(&its->its_lock);
1201
1202         return ret;
1203 }
1204
1205 static u64 vgic_sanitise_its_baser(u64 reg)
1206 {
1207         reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK,
1208                                   GITS_BASER_SHAREABILITY_SHIFT,
1209                                   vgic_sanitise_shareability);
1210         reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK,
1211                                   GITS_BASER_INNER_CACHEABILITY_SHIFT,
1212                                   vgic_sanitise_inner_cacheability);
1213         reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK,
1214                                   GITS_BASER_OUTER_CACHEABILITY_SHIFT,
1215                                   vgic_sanitise_outer_cacheability);
1216
1217         /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */
1218         reg &= ~GENMASK_ULL(15, 12);
1219
1220         /* We support only one (ITS) page size: 64K */
1221         reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K;
1222
1223         return reg;
1224 }
1225
1226 static u64 vgic_sanitise_its_cbaser(u64 reg)
1227 {
1228         reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK,
1229                                   GITS_CBASER_SHAREABILITY_SHIFT,
1230                                   vgic_sanitise_shareability);
1231         reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK,
1232                                   GITS_CBASER_INNER_CACHEABILITY_SHIFT,
1233                                   vgic_sanitise_inner_cacheability);
1234         reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK,
1235                                   GITS_CBASER_OUTER_CACHEABILITY_SHIFT,
1236                                   vgic_sanitise_outer_cacheability);
1237
1238         /*
1239          * Sanitise the physical address to be 64k aligned.
1240          * Also limit the physical addresses to 48 bits.
1241          */
1242         reg &= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12));
1243
1244         return reg;
1245 }
1246
1247 static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm,
1248                                                struct vgic_its *its,
1249                                                gpa_t addr, unsigned int len)
1250 {
1251         return extract_bytes(its->cbaser, addr & 7, len);
1252 }
1253
1254 static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its,
1255                                        gpa_t addr, unsigned int len,
1256                                        unsigned long val)
1257 {
1258         /* When GITS_CTLR.Enable is 1, this register is RO. */
1259         if (its->enabled)
1260                 return;
1261
1262         mutex_lock(&its->cmd_lock);
1263         its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val);
1264         its->cbaser = vgic_sanitise_its_cbaser(its->cbaser);
1265         its->creadr = 0;
1266         /*
1267          * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1268          * it to CREADR to make sure we start with an empty command buffer.
1269          */
1270         its->cwriter = its->creadr;
1271         mutex_unlock(&its->cmd_lock);
1272 }
1273
1274 #define ITS_CMD_BUFFER_SIZE(baser)      ((((baser) & 0xff) + 1) << 12)
1275 #define ITS_CMD_SIZE                    32
1276 #define ITS_CMD_OFFSET(reg)             ((reg) & GENMASK(19, 5))
1277
1278 /* Must be called with the cmd_lock held. */
1279 static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its)
1280 {
1281         gpa_t cbaser;
1282         u64 cmd_buf[4];
1283
1284         /* Commands are only processed when the ITS is enabled. */
1285         if (!its->enabled)
1286                 return;
1287
1288         cbaser = CBASER_ADDRESS(its->cbaser);
1289
1290         while (its->cwriter != its->creadr) {
1291                 int ret = kvm_read_guest(kvm, cbaser + its->creadr,
1292                                          cmd_buf, ITS_CMD_SIZE);
1293                 /*
1294                  * If kvm_read_guest() fails, this could be due to the guest
1295                  * programming a bogus value in CBASER or something else going
1296                  * wrong from which we cannot easily recover.
1297                  * According to section 6.3.2 in the GICv3 spec we can just
1298                  * ignore that command then.
1299                  */
1300                 if (!ret)
1301                         vgic_its_handle_command(kvm, its, cmd_buf);
1302
1303                 its->creadr += ITS_CMD_SIZE;
1304                 if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser))
1305                         its->creadr = 0;
1306         }
1307 }
1308
1309 /*
1310  * By writing to CWRITER the guest announces new commands to be processed.
1311  * To avoid any races in the first place, we take the its_cmd lock, which
1312  * protects our ring buffer variables, so that there is only one user
1313  * per ITS handling commands at a given time.
1314  */
1315 static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its,
1316                                         gpa_t addr, unsigned int len,
1317                                         unsigned long val)
1318 {
1319         u64 reg;
1320
1321         if (!its)
1322                 return;
1323
1324         mutex_lock(&its->cmd_lock);
1325
1326         reg = update_64bit_reg(its->cwriter, addr & 7, len, val);
1327         reg = ITS_CMD_OFFSET(reg);
1328         if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1329                 mutex_unlock(&its->cmd_lock);
1330                 return;
1331         }
1332         its->cwriter = reg;
1333
1334         vgic_its_process_commands(kvm, its);
1335
1336         mutex_unlock(&its->cmd_lock);
1337 }
1338
1339 static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm,
1340                                                 struct vgic_its *its,
1341                                                 gpa_t addr, unsigned int len)
1342 {
1343         return extract_bytes(its->cwriter, addr & 0x7, len);
1344 }
1345
1346 static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm,
1347                                                struct vgic_its *its,
1348                                                gpa_t addr, unsigned int len)
1349 {
1350         return extract_bytes(its->creadr, addr & 0x7, len);
1351 }
1352
1353 static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm,
1354                                               struct vgic_its *its,
1355                                               gpa_t addr, unsigned int len,
1356                                               unsigned long val)
1357 {
1358         u32 cmd_offset;
1359         int ret = 0;
1360
1361         mutex_lock(&its->cmd_lock);
1362
1363         if (its->enabled) {
1364                 ret = -EBUSY;
1365                 goto out;
1366         }
1367
1368         cmd_offset = ITS_CMD_OFFSET(val);
1369         if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1370                 ret = -EINVAL;
1371                 goto out;
1372         }
1373
1374         its->creadr = cmd_offset;
1375 out:
1376         mutex_unlock(&its->cmd_lock);
1377         return ret;
1378 }
1379
1380 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
1381 static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm,
1382                                               struct vgic_its *its,
1383                                               gpa_t addr, unsigned int len)
1384 {
1385         u64 reg;
1386
1387         switch (BASER_INDEX(addr)) {
1388         case 0:
1389                 reg = its->baser_device_table;
1390                 break;
1391         case 1:
1392                 reg = its->baser_coll_table;
1393                 break;
1394         default:
1395                 reg = 0;
1396                 break;
1397         }
1398
1399         return extract_bytes(reg, addr & 7, len);
1400 }
1401
1402 #define GITS_BASER_RO_MASK      (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
1403 static void vgic_mmio_write_its_baser(struct kvm *kvm,
1404                                       struct vgic_its *its,
1405                                       gpa_t addr, unsigned int len,
1406                                       unsigned long val)
1407 {
1408         const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1409         u64 entry_size, device_type;
1410         u64 reg, *regptr, clearbits = 0;
1411
1412         /* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1413         if (its->enabled)
1414                 return;
1415
1416         switch (BASER_INDEX(addr)) {
1417         case 0:
1418                 regptr = &its->baser_device_table;
1419                 entry_size = abi->dte_esz;
1420                 device_type = GITS_BASER_TYPE_DEVICE;
1421                 break;
1422         case 1:
1423                 regptr = &its->baser_coll_table;
1424                 entry_size = abi->cte_esz;
1425                 device_type = GITS_BASER_TYPE_COLLECTION;
1426                 clearbits = GITS_BASER_INDIRECT;
1427                 break;
1428         default:
1429                 return;
1430         }
1431
1432         reg = update_64bit_reg(*regptr, addr & 7, len, val);
1433         reg &= ~GITS_BASER_RO_MASK;
1434         reg &= ~clearbits;
1435
1436         reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
1437         reg |= device_type << GITS_BASER_TYPE_SHIFT;
1438         reg = vgic_sanitise_its_baser(reg);
1439
1440         *regptr = reg;
1441 }
1442
1443 static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu,
1444                                              struct vgic_its *its,
1445                                              gpa_t addr, unsigned int len)
1446 {
1447         u32 reg = 0;
1448
1449         mutex_lock(&its->cmd_lock);
1450         if (its->creadr == its->cwriter)
1451                 reg |= GITS_CTLR_QUIESCENT;
1452         if (its->enabled)
1453                 reg |= GITS_CTLR_ENABLE;
1454         mutex_unlock(&its->cmd_lock);
1455
1456         return reg;
1457 }
1458
1459 static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its,
1460                                      gpa_t addr, unsigned int len,
1461                                      unsigned long val)
1462 {
1463         mutex_lock(&its->cmd_lock);
1464
1465         its->enabled = !!(val & GITS_CTLR_ENABLE);
1466
1467         /*
1468          * Try to process any pending commands. This function bails out early
1469          * if the ITS is disabled or no commands have been queued.
1470          */
1471         vgic_its_process_commands(kvm, its);
1472
1473         mutex_unlock(&its->cmd_lock);
1474 }
1475
1476 #define REGISTER_ITS_DESC(off, rd, wr, length, acc)             \
1477 {                                                               \
1478         .reg_offset = off,                                      \
1479         .len = length,                                          \
1480         .access_flags = acc,                                    \
1481         .its_read = rd,                                         \
1482         .its_write = wr,                                        \
1483 }
1484
1485 #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\
1486 {                                                               \
1487         .reg_offset = off,                                      \
1488         .len = length,                                          \
1489         .access_flags = acc,                                    \
1490         .its_read = rd,                                         \
1491         .its_write = wr,                                        \
1492         .uaccess_its_write = uwr,                               \
1493 }
1494
1495 static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its,
1496                               gpa_t addr, unsigned int len, unsigned long val)
1497 {
1498         /* Ignore */
1499 }
1500
1501 static struct vgic_register_region its_registers[] = {
1502         REGISTER_ITS_DESC(GITS_CTLR,
1503                 vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4,
1504                 VGIC_ACCESS_32bit),
1505         REGISTER_ITS_DESC_UACCESS(GITS_IIDR,
1506                 vgic_mmio_read_its_iidr, its_mmio_write_wi,
1507                 vgic_mmio_uaccess_write_its_iidr, 4,
1508                 VGIC_ACCESS_32bit),
1509         REGISTER_ITS_DESC(GITS_TYPER,
1510                 vgic_mmio_read_its_typer, its_mmio_write_wi, 8,
1511                 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1512         REGISTER_ITS_DESC(GITS_CBASER,
1513                 vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8,
1514                 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1515         REGISTER_ITS_DESC(GITS_CWRITER,
1516                 vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8,
1517                 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1518         REGISTER_ITS_DESC_UACCESS(GITS_CREADR,
1519                 vgic_mmio_read_its_creadr, its_mmio_write_wi,
1520                 vgic_mmio_uaccess_write_its_creadr, 8,
1521                 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1522         REGISTER_ITS_DESC(GITS_BASER,
1523                 vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40,
1524                 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1525         REGISTER_ITS_DESC(GITS_IDREGS_BASE,
1526                 vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30,
1527                 VGIC_ACCESS_32bit),
1528 };
1529
1530 /* This is called on setting the LPI enable bit in the redistributor. */
1531 void vgic_enable_lpis(struct kvm_vcpu *vcpu)
1532 {
1533         if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ))
1534                 its_sync_lpi_pending_table(vcpu);
1535 }
1536
1537 static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its)
1538 {
1539         struct vgic_io_device *iodev = &its->iodev;
1540         int ret;
1541
1542         if (!its->initialized)
1543                 return -EBUSY;
1544
1545         if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base))
1546                 return -ENXIO;
1547
1548         iodev->regions = its_registers;
1549         iodev->nr_regions = ARRAY_SIZE(its_registers);
1550         kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops);
1551
1552         iodev->base_addr = its->vgic_its_base;
1553         iodev->iodev_type = IODEV_ITS;
1554         iodev->its = its;
1555         mutex_lock(&kvm->slots_lock);
1556         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr,
1557                                       KVM_VGIC_V3_ITS_SIZE, &iodev->dev);
1558         mutex_unlock(&kvm->slots_lock);
1559
1560         return ret;
1561 }
1562
1563 #define INITIAL_BASER_VALUE                                               \
1564         (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb)                | \
1565          GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner)         | \
1566          GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable)             | \
1567          GITS_BASER_PAGE_SIZE_64K)
1568
1569 #define INITIAL_PROPBASER_VALUE                                           \
1570         (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb)            | \
1571          GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner)     | \
1572          GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1573
1574 static int vgic_its_create(struct kvm_device *dev, u32 type)
1575 {
1576         struct vgic_its *its;
1577
1578         if (type != KVM_DEV_TYPE_ARM_VGIC_ITS)
1579                 return -ENODEV;
1580
1581         its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL);
1582         if (!its)
1583                 return -ENOMEM;
1584
1585         mutex_init(&its->its_lock);
1586         mutex_init(&its->cmd_lock);
1587
1588         its->vgic_its_base = VGIC_ADDR_UNDEF;
1589
1590         INIT_LIST_HEAD(&its->device_list);
1591         INIT_LIST_HEAD(&its->collection_list);
1592
1593         dev->kvm->arch.vgic.has_its = true;
1594         its->initialized = false;
1595         its->enabled = false;
1596         its->dev = dev;
1597
1598         its->baser_device_table = INITIAL_BASER_VALUE                   |
1599                 ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT);
1600         its->baser_coll_table = INITIAL_BASER_VALUE |
1601                 ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT);
1602         dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE;
1603
1604         dev->private = its;
1605
1606         return vgic_its_set_abi(its, NR_ITS_ABIS - 1);
1607 }
1608
1609 static void vgic_its_destroy(struct kvm_device *kvm_dev)
1610 {
1611         struct kvm *kvm = kvm_dev->kvm;
1612         struct vgic_its *its = kvm_dev->private;
1613         struct its_device *dev;
1614         struct its_ite *ite;
1615         struct list_head *dev_cur, *dev_temp;
1616         struct list_head *cur, *temp;
1617
1618         /*
1619          * We may end up here without the lists ever having been initialized.
1620          * Check this and bail out early to avoid dereferencing a NULL pointer.
1621          */
1622         if (!its->device_list.next)
1623                 return;
1624
1625         mutex_lock(&its->its_lock);
1626         list_for_each_safe(dev_cur, dev_temp, &its->device_list) {
1627                 dev = container_of(dev_cur, struct its_device, dev_list);
1628                 list_for_each_safe(cur, temp, &dev->itt_head) {
1629                         ite = (container_of(cur, struct its_ite, ite_list));
1630                         its_free_ite(kvm, ite);
1631                 }
1632                 list_del(dev_cur);
1633                 kfree(dev);
1634         }
1635
1636         list_for_each_safe(cur, temp, &its->collection_list) {
1637                 list_del(cur);
1638                 kfree(container_of(cur, struct its_collection, coll_list));
1639         }
1640         mutex_unlock(&its->its_lock);
1641
1642         kfree(its);
1643 }
1644
1645 int vgic_its_has_attr_regs(struct kvm_device *dev,
1646                            struct kvm_device_attr *attr)
1647 {
1648         const struct vgic_register_region *region;
1649         gpa_t offset = attr->attr;
1650         int align;
1651
1652         align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7;
1653
1654         if (offset & align)
1655                 return -EINVAL;
1656
1657         region = vgic_find_mmio_region(its_registers,
1658                                        ARRAY_SIZE(its_registers),
1659                                        offset);
1660         if (!region)
1661                 return -ENXIO;
1662
1663         return 0;
1664 }
1665
1666 int vgic_its_attr_regs_access(struct kvm_device *dev,
1667                               struct kvm_device_attr *attr,
1668                               u64 *reg, bool is_write)
1669 {
1670         const struct vgic_register_region *region;
1671         struct vgic_its *its;
1672         gpa_t addr, offset;
1673         unsigned int len;
1674         int align, ret = 0;
1675
1676         its = dev->private;
1677         offset = attr->attr;
1678
1679         /*
1680          * Although the spec supports upper/lower 32-bit accesses to
1681          * 64-bit ITS registers, the userspace ABI requires 64-bit
1682          * accesses to all 64-bit wide registers. We therefore only
1683          * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID
1684          * registers
1685          */
1686         if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4))
1687                 align = 0x3;
1688         else
1689                 align = 0x7;
1690
1691         if (offset & align)
1692                 return -EINVAL;
1693
1694         mutex_lock(&dev->kvm->lock);
1695
1696         if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) {
1697                 ret = -ENXIO;
1698                 goto out;
1699         }
1700
1701         region = vgic_find_mmio_region(its_registers,
1702                                        ARRAY_SIZE(its_registers),
1703                                        offset);
1704         if (!region) {
1705                 ret = -ENXIO;
1706                 goto out;
1707         }
1708
1709         if (!lock_all_vcpus(dev->kvm)) {
1710                 ret = -EBUSY;
1711                 goto out;
1712         }
1713
1714         addr = its->vgic_its_base + offset;
1715
1716         len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4;
1717
1718         if (is_write) {
1719                 if (region->uaccess_its_write)
1720                         ret = region->uaccess_its_write(dev->kvm, its, addr,
1721                                                         len, *reg);
1722                 else
1723                         region->its_write(dev->kvm, its, addr, len, *reg);
1724         } else {
1725                 *reg = region->its_read(dev->kvm, its, addr, len);
1726         }
1727         unlock_all_vcpus(dev->kvm);
1728 out:
1729         mutex_unlock(&dev->kvm->lock);
1730         return ret;
1731 }
1732
1733 u32 compute_next_devid_offset(struct list_head *h, struct its_device *dev)
1734 {
1735         struct its_device *next;
1736         u32 next_offset;
1737
1738         if (list_is_last(&dev->dev_list, h))
1739                 return 0;
1740         next = list_next_entry(dev, dev_list);
1741         next_offset = next->device_id - dev->device_id;
1742
1743         return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET);
1744 }
1745
1746 u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite)
1747 {
1748         struct its_ite *next;
1749         u32 next_offset;
1750
1751         if (list_is_last(&ite->ite_list, h))
1752                 return 0;
1753         next = list_next_entry(ite, ite_list);
1754         next_offset = next->event_id - ite->event_id;
1755
1756         return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET);
1757 }
1758
1759 /**
1760  * entry_fn_t - Callback called on a table entry restore path
1761  * @its: its handle
1762  * @id: id of the entry
1763  * @entry: pointer to the entry
1764  * @opaque: pointer to an opaque data
1765  *
1766  * Return: < 0 on error, 0 if last element was identified, id offset to next
1767  * element otherwise
1768  */
1769 typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry,
1770                           void *opaque);
1771
1772 /**
1773  * scan_its_table - Scan a contiguous table in guest RAM and applies a function
1774  * to each entry
1775  *
1776  * @its: its handle
1777  * @base: base gpa of the table
1778  * @size: size of the table in bytes
1779  * @esz: entry size in bytes
1780  * @start_id: the ID of the first entry in the table
1781  * (non zero for 2d level tables)
1782  * @fn: function to apply on each entry
1783  *
1784  * Return: < 0 on error, 0 if last element was identified, 1 otherwise
1785  * (the last element may not be found on second level tables)
1786  */
1787 int scan_its_table(struct vgic_its *its, gpa_t base, int size, int esz,
1788                    int start_id, entry_fn_t fn, void *opaque)
1789 {
1790         void *entry = kzalloc(esz, GFP_KERNEL);
1791         struct kvm *kvm = its->dev->kvm;
1792         unsigned long len = size;
1793         int id = start_id;
1794         gpa_t gpa = base;
1795         int ret;
1796
1797         while (len > 0) {
1798                 int next_offset;
1799                 size_t byte_offset;
1800
1801                 ret = kvm_read_guest(kvm, gpa, entry, esz);
1802                 if (ret)
1803                         goto out;
1804
1805                 next_offset = fn(its, id, entry, opaque);
1806                 if (next_offset <= 0) {
1807                         ret = next_offset;
1808                         goto out;
1809                 }
1810
1811                 byte_offset = next_offset * esz;
1812                 id += next_offset;
1813                 gpa += byte_offset;
1814                 len -= byte_offset;
1815         }
1816         ret =  1;
1817
1818 out:
1819         kfree(entry);
1820         return ret;
1821 }
1822
1823 /**
1824  * vgic_its_save_device_tables - Save the device table and all ITT
1825  * into guest RAM
1826  */
1827 static int vgic_its_save_device_tables(struct vgic_its *its)
1828 {
1829         return -ENXIO;
1830 }
1831
1832 /**
1833  * vgic_its_restore_device_tables - Restore the device table and all ITT
1834  * from guest RAM to internal data structs
1835  */
1836 static int vgic_its_restore_device_tables(struct vgic_its *its)
1837 {
1838         return -ENXIO;
1839 }
1840
1841 /**
1842  * vgic_its_save_collection_table - Save the collection table into
1843  * guest RAM
1844  */
1845 static int vgic_its_save_collection_table(struct vgic_its *its)
1846 {
1847         return -ENXIO;
1848 }
1849
1850 /**
1851  * vgic_its_restore_collection_table - reads the collection table
1852  * in guest memory and restores the ITS internal state. Requires the
1853  * BASER registers to be restored before.
1854  */
1855 static int vgic_its_restore_collection_table(struct vgic_its *its)
1856 {
1857         return -ENXIO;
1858 }
1859
1860 /**
1861  * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM
1862  * according to v0 ABI
1863  */
1864 static int vgic_its_save_tables_v0(struct vgic_its *its)
1865 {
1866         struct kvm *kvm = its->dev->kvm;
1867         int ret;
1868
1869         mutex_lock(&kvm->lock);
1870         mutex_lock(&its->its_lock);
1871
1872         if (!lock_all_vcpus(kvm)) {
1873                 mutex_unlock(&its->its_lock);
1874                 mutex_unlock(&kvm->lock);
1875                 return -EBUSY;
1876         }
1877
1878         ret = vgic_its_save_device_tables(its);
1879         if (ret)
1880                 goto out;
1881
1882         ret = vgic_its_save_collection_table(its);
1883
1884 out:
1885         unlock_all_vcpus(kvm);
1886         mutex_unlock(&its->its_lock);
1887         mutex_unlock(&kvm->lock);
1888         return ret;
1889 }
1890
1891 /**
1892  * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM
1893  * to internal data structs according to V0 ABI
1894  *
1895  */
1896 static int vgic_its_restore_tables_v0(struct vgic_its *its)
1897 {
1898         struct kvm *kvm = its->dev->kvm;
1899         int ret;
1900
1901         mutex_lock(&kvm->lock);
1902         mutex_lock(&its->its_lock);
1903
1904         if (!lock_all_vcpus(kvm)) {
1905                 mutex_unlock(&its->its_lock);
1906                 mutex_unlock(&kvm->lock);
1907                 return -EBUSY;
1908         }
1909
1910         ret = vgic_its_restore_collection_table(its);
1911         if (ret)
1912                 goto out;
1913
1914         ret = vgic_its_restore_device_tables(its);
1915
1916 out:
1917         unlock_all_vcpus(kvm);
1918         mutex_unlock(&its->its_lock);
1919         mutex_unlock(&kvm->lock);
1920
1921         if (ret)
1922                 return ret;
1923
1924         /*
1925          * On restore path, MSI injections can happen before the
1926          * first VCPU run so let's complete the GIC init here.
1927          */
1928         return kvm_vgic_map_resources(its->dev->kvm);
1929 }
1930
1931 static int vgic_its_commit_v0(struct vgic_its *its)
1932 {
1933         const struct vgic_its_abi *abi;
1934
1935         abi = vgic_its_get_abi(its);
1936         its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
1937         its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
1938
1939         its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5)
1940                                         << GITS_BASER_ENTRY_SIZE_SHIFT);
1941
1942         its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5)
1943                                         << GITS_BASER_ENTRY_SIZE_SHIFT);
1944         return 0;
1945 }
1946
1947 static int vgic_its_has_attr(struct kvm_device *dev,
1948                              struct kvm_device_attr *attr)
1949 {
1950         switch (attr->group) {
1951         case KVM_DEV_ARM_VGIC_GRP_ADDR:
1952                 switch (attr->attr) {
1953                 case KVM_VGIC_ITS_ADDR_TYPE:
1954                         return 0;
1955                 }
1956                 break;
1957         case KVM_DEV_ARM_VGIC_GRP_CTRL:
1958                 switch (attr->attr) {
1959                 case KVM_DEV_ARM_VGIC_CTRL_INIT:
1960                         return 0;
1961                 case KVM_DEV_ARM_ITS_SAVE_TABLES:
1962                         return 0;
1963                 case KVM_DEV_ARM_ITS_RESTORE_TABLES:
1964                         return 0;
1965                 }
1966                 break;
1967         case KVM_DEV_ARM_VGIC_GRP_ITS_REGS:
1968                 return vgic_its_has_attr_regs(dev, attr);
1969         }
1970         return -ENXIO;
1971 }
1972
1973 static int vgic_its_set_attr(struct kvm_device *dev,
1974                              struct kvm_device_attr *attr)
1975 {
1976         struct vgic_its *its = dev->private;
1977         int ret;
1978
1979         switch (attr->group) {
1980         case KVM_DEV_ARM_VGIC_GRP_ADDR: {
1981                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
1982                 unsigned long type = (unsigned long)attr->attr;
1983                 u64 addr;
1984
1985                 if (type != KVM_VGIC_ITS_ADDR_TYPE)
1986                         return -ENODEV;
1987
1988                 if (copy_from_user(&addr, uaddr, sizeof(addr)))
1989                         return -EFAULT;
1990
1991                 ret = vgic_check_ioaddr(dev->kvm, &its->vgic_its_base,
1992                                         addr, SZ_64K);
1993                 if (ret)
1994                         return ret;
1995
1996                 its->vgic_its_base = addr;
1997
1998                 return 0;
1999         }
2000         case KVM_DEV_ARM_VGIC_GRP_CTRL: {
2001                 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2002
2003                 switch (attr->attr) {
2004                 case KVM_DEV_ARM_VGIC_CTRL_INIT:
2005                         its->initialized = true;
2006
2007                         return 0;
2008                 case KVM_DEV_ARM_ITS_SAVE_TABLES:
2009                         return abi->save_tables(its);
2010                 case KVM_DEV_ARM_ITS_RESTORE_TABLES:
2011                         return abi->restore_tables(its);
2012                 }
2013         }
2014         case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
2015                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2016                 u64 reg;
2017
2018                 if (get_user(reg, uaddr))
2019                         return -EFAULT;
2020
2021                 return vgic_its_attr_regs_access(dev, attr, &reg, true);
2022         }
2023         }
2024         return -ENXIO;
2025 }
2026
2027 static int vgic_its_get_attr(struct kvm_device *dev,
2028                              struct kvm_device_attr *attr)
2029 {
2030         switch (attr->group) {
2031         case KVM_DEV_ARM_VGIC_GRP_ADDR: {
2032                 struct vgic_its *its = dev->private;
2033                 u64 addr = its->vgic_its_base;
2034                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2035                 unsigned long type = (unsigned long)attr->attr;
2036
2037                 if (type != KVM_VGIC_ITS_ADDR_TYPE)
2038                         return -ENODEV;
2039
2040                 if (copy_to_user(uaddr, &addr, sizeof(addr)))
2041                         return -EFAULT;
2042                 break;
2043         }
2044         case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
2045                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2046                 u64 reg;
2047                 int ret;
2048
2049                 ret = vgic_its_attr_regs_access(dev, attr, &reg, false);
2050                 if (ret)
2051                         return ret;
2052                 return put_user(reg, uaddr);
2053         }
2054         default:
2055                 return -ENXIO;
2056         }
2057
2058         return 0;
2059 }
2060
2061 static struct kvm_device_ops kvm_arm_vgic_its_ops = {
2062         .name = "kvm-arm-vgic-its",
2063         .create = vgic_its_create,
2064         .destroy = vgic_its_destroy,
2065         .set_attr = vgic_its_set_attr,
2066         .get_attr = vgic_its_get_attr,
2067         .has_attr = vgic_its_has_attr,
2068 };
2069
2070 int kvm_vgic_register_its_device(void)
2071 {
2072         return kvm_register_device_ops(&kvm_arm_vgic_its_ops,
2073                                        KVM_DEV_TYPE_ARM_VGIC_ITS);
2074 }
2075
2076 /*
2077  * Registers all ITSes with the kvm_io_bus framework.
2078  * To follow the existing VGIC initialization sequence, this has to be
2079  * done as late as possible, just before the first VCPU runs.
2080  */
2081 int vgic_register_its_iodevs(struct kvm *kvm)
2082 {
2083         struct kvm_device *dev;
2084         int ret = 0;
2085
2086         list_for_each_entry(dev, &kvm->devices, vm_node) {
2087                 if (dev->ops != &kvm_arm_vgic_its_ops)
2088                         continue;
2089
2090                 ret = vgic_register_its_iodev(kvm, dev->private);
2091                 if (ret)
2092                         return ret;
2093                 /*
2094                  * We don't need to care about tearing down previously
2095                  * registered ITSes, as the kvm_io_bus framework removes
2096                  * them for us if the VM gets destroyed.
2097                  */
2098         }
2099
2100         return ret;
2101 }