4 * Copyright (C) 2015,2016 ARM Ltd.
5 * Author: Andre Przywara <andre.przywara@arm.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/cpu.h>
21 #include <linux/kvm.h>
22 #include <linux/kvm_host.h>
23 #include <linux/interrupt.h>
24 #include <linux/list.h>
25 #include <linux/uaccess.h>
27 #include <linux/irqchip/arm-gic-v3.h>
29 #include <asm/kvm_emulate.h>
30 #include <asm/kvm_arm.h>
31 #include <asm/kvm_mmu.h>
34 #include "vgic-mmio.h"
36 static int vgic_its_save_tables_v0(struct vgic_its *its);
37 static int vgic_its_restore_tables_v0(struct vgic_its *its);
38 static int vgic_its_commit_v0(struct vgic_its *its);
39 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
40 struct kvm_vcpu *filter_vcpu);
43 * Creates a new (reference to a) struct vgic_irq for a given LPI.
44 * If this LPI is already mapped on another ITS, we increase its refcount
45 * and return a pointer to the existing structure.
46 * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
47 * This function returns a pointer to the _unlocked_ structure.
49 static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid,
50 struct kvm_vcpu *vcpu)
52 struct vgic_dist *dist = &kvm->arch.vgic;
53 struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq;
56 /* In this case there is no put, since we keep the reference. */
60 irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL);
62 return ERR_PTR(-ENOMEM);
64 INIT_LIST_HEAD(&irq->lpi_list);
65 INIT_LIST_HEAD(&irq->ap_list);
66 spin_lock_init(&irq->irq_lock);
68 irq->config = VGIC_CONFIG_EDGE;
69 kref_init(&irq->refcount);
71 irq->target_vcpu = vcpu;
73 spin_lock(&dist->lpi_list_lock);
76 * There could be a race with another vgic_add_lpi(), so we need to
77 * check that we don't add a second list entry with the same LPI.
79 list_for_each_entry(oldirq, &dist->lpi_list_head, lpi_list) {
80 if (oldirq->intid != intid)
83 /* Someone was faster with adding this LPI, lets use that. */
88 * This increases the refcount, the caller is expected to
89 * call vgic_put_irq() on the returned pointer once it's
90 * finished with the IRQ.
92 vgic_get_irq_kref(irq);
97 list_add_tail(&irq->lpi_list, &dist->lpi_list_head);
98 dist->lpi_list_count++;
101 spin_unlock(&dist->lpi_list_lock);
104 * We "cache" the configuration table entries in our struct vgic_irq's.
105 * However we only have those structs for mapped IRQs, so we read in
106 * the respective config data from memory here upon mapping the LPI.
108 ret = update_lpi_config(kvm, irq, NULL);
112 ret = vgic_v3_lpi_sync_pending_status(kvm, irq);
120 struct list_head dev_list;
122 /* the head for the list of ITTEs */
123 struct list_head itt_head;
124 u32 num_eventid_bits;
129 #define COLLECTION_NOT_MAPPED ((u32)~0)
131 struct its_collection {
132 struct list_head coll_list;
138 #define its_is_collection_mapped(coll) ((coll) && \
139 ((coll)->target_addr != COLLECTION_NOT_MAPPED))
142 struct list_head ite_list;
144 struct vgic_irq *irq;
145 struct its_collection *collection;
151 * struct vgic_its_abi - ITS abi ops and settings
152 * @cte_esz: collection table entry size
153 * @dte_esz: device table entry size
154 * @ite_esz: interrupt translation table entry size
155 * @save tables: save the ITS tables into guest RAM
156 * @restore_tables: restore the ITS internal structs from tables
157 * stored in guest RAM
158 * @commit: initialize the registers which expose the ABI settings,
159 * especially the entry sizes
161 struct vgic_its_abi {
165 int (*save_tables)(struct vgic_its *its);
166 int (*restore_tables)(struct vgic_its *its);
167 int (*commit)(struct vgic_its *its);
170 static const struct vgic_its_abi its_table_abi_versions[] = {
171 [0] = {.cte_esz = 8, .dte_esz = 8, .ite_esz = 8,
172 .save_tables = vgic_its_save_tables_v0,
173 .restore_tables = vgic_its_restore_tables_v0,
174 .commit = vgic_its_commit_v0,
178 #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions)
180 inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its)
182 return &its_table_abi_versions[its->abi_rev];
185 int vgic_its_set_abi(struct vgic_its *its, int rev)
187 const struct vgic_its_abi *abi;
190 abi = vgic_its_get_abi(its);
191 return abi->commit(its);
195 * Find and returns a device in the device table for an ITS.
196 * Must be called with the its_lock mutex held.
198 static struct its_device *find_its_device(struct vgic_its *its, u32 device_id)
200 struct its_device *device;
202 list_for_each_entry(device, &its->device_list, dev_list)
203 if (device_id == device->device_id)
210 * Find and returns an interrupt translation table entry (ITTE) for a given
211 * Device ID/Event ID pair on an ITS.
212 * Must be called with the its_lock mutex held.
214 static struct its_ite *find_ite(struct vgic_its *its, u32 device_id,
217 struct its_device *device;
220 device = find_its_device(its, device_id);
224 list_for_each_entry(ite, &device->itt_head, ite_list)
225 if (ite->event_id == event_id)
231 /* To be used as an iterator this macro misses the enclosing parentheses */
232 #define for_each_lpi_its(dev, ite, its) \
233 list_for_each_entry(dev, &(its)->device_list, dev_list) \
234 list_for_each_entry(ite, &(dev)->itt_head, ite_list)
237 * We only implement 48 bits of PA at the moment, although the ITS
238 * supports more. Let's be restrictive here.
240 #define BASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16))
241 #define CBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12))
243 #define GIC_LPI_OFFSET 8192
245 #define VITS_TYPER_IDBITS 16
246 #define VITS_TYPER_DEVBITS 16
247 #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1)
248 #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1)
251 * Finds and returns a collection in the ITS collection table.
252 * Must be called with the its_lock mutex held.
254 static struct its_collection *find_collection(struct vgic_its *its, int coll_id)
256 struct its_collection *collection;
258 list_for_each_entry(collection, &its->collection_list, coll_list) {
259 if (coll_id == collection->collection_id)
266 #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED)
267 #define LPI_PROP_PRIORITY(p) ((p) & 0xfc)
270 * Reads the configuration data for a given LPI from guest memory and
271 * updates the fields in struct vgic_irq.
272 * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
273 * VCPU. Unconditionally applies if filter_vcpu is NULL.
275 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
276 struct kvm_vcpu *filter_vcpu)
278 u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser);
282 ret = kvm_read_guest(kvm, propbase + irq->intid - GIC_LPI_OFFSET,
288 spin_lock(&irq->irq_lock);
290 if (!filter_vcpu || filter_vcpu == irq->target_vcpu) {
291 irq->priority = LPI_PROP_PRIORITY(prop);
292 irq->enabled = LPI_PROP_ENABLE_BIT(prop);
294 vgic_queue_irq_unlock(kvm, irq);
296 spin_unlock(&irq->irq_lock);
303 * Create a snapshot of the current LPI list, so that we can enumerate all
304 * LPIs without holding any lock.
305 * Returns the array length and puts the kmalloc'ed array into intid_ptr.
307 static int vgic_copy_lpi_list(struct kvm *kvm, u32 **intid_ptr)
309 struct vgic_dist *dist = &kvm->arch.vgic;
310 struct vgic_irq *irq;
312 int irq_count = dist->lpi_list_count, i = 0;
315 * We use the current value of the list length, which may change
316 * after the kmalloc. We don't care, because the guest shouldn't
317 * change anything while the command handling is still running,
318 * and in the worst case we would miss a new IRQ, which one wouldn't
319 * expect to be covered by this command anyway.
321 intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL);
325 spin_lock(&dist->lpi_list_lock);
326 list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
327 /* We don't need to "get" the IRQ, as we hold the list lock. */
328 intids[i] = irq->intid;
329 if (++i == irq_count)
332 spin_unlock(&dist->lpi_list_lock);
339 * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
340 * is targeting) to the VGIC's view, which deals with target VCPUs.
341 * Needs to be called whenever either the collection for a LPIs has
342 * changed or the collection itself got retargeted.
344 static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite)
346 struct kvm_vcpu *vcpu;
348 if (!its_is_collection_mapped(ite->collection))
351 vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr);
353 spin_lock(&ite->irq->irq_lock);
354 ite->irq->target_vcpu = vcpu;
355 spin_unlock(&ite->irq->irq_lock);
359 * Updates the target VCPU for every LPI targeting this collection.
360 * Must be called with the its_lock mutex held.
362 static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its,
363 struct its_collection *coll)
365 struct its_device *device;
368 for_each_lpi_its(device, ite, its) {
369 if (!ite->collection || coll != ite->collection)
372 update_affinity_ite(kvm, ite);
376 static u32 max_lpis_propbaser(u64 propbaser)
378 int nr_idbits = (propbaser & 0x1f) + 1;
380 return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS);
384 * Scan the whole LPI pending table and sync the pending bit in there
385 * with our own data structures. This relies on the LPI being
388 static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu)
390 gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser);
391 struct vgic_irq *irq;
392 int last_byte_offset = -1;
397 nr_irqs = vgic_copy_lpi_list(vcpu->kvm, &intids);
401 for (i = 0; i < nr_irqs; i++) {
402 int byte_offset, bit_nr;
405 byte_offset = intids[i] / BITS_PER_BYTE;
406 bit_nr = intids[i] % BITS_PER_BYTE;
409 * For contiguously allocated LPIs chances are we just read
410 * this very same byte in the last iteration. Reuse that.
412 if (byte_offset != last_byte_offset) {
413 ret = kvm_read_guest(vcpu->kvm, pendbase + byte_offset,
419 last_byte_offset = byte_offset;
422 irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]);
423 spin_lock(&irq->irq_lock);
424 irq->pending_latch = pendmask & (1U << bit_nr);
425 vgic_queue_irq_unlock(vcpu->kvm, irq);
426 vgic_put_irq(vcpu->kvm, irq);
434 static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm,
435 struct vgic_its *its,
436 gpa_t addr, unsigned int len)
438 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
439 u64 reg = GITS_TYPER_PLPIS;
442 * We use linear CPU numbers for redistributor addressing,
443 * so GITS_TYPER.PTA is 0.
444 * Also we force all PROPBASER registers to be the same, so
445 * CommonLPIAff is 0 as well.
446 * To avoid memory waste in the guest, we keep the number of IDBits and
447 * DevBits low - as least for the time being.
449 reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT;
450 reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT;
451 reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT;
453 return extract_bytes(reg, addr & 7, len);
456 static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm,
457 struct vgic_its *its,
458 gpa_t addr, unsigned int len)
462 val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK;
463 val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM;
467 static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm,
468 struct vgic_its *its,
469 gpa_t addr, unsigned int len,
472 u32 rev = GITS_IIDR_REV(val);
474 if (rev >= NR_ITS_ABIS)
476 return vgic_its_set_abi(its, rev);
479 static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
480 struct vgic_its *its,
481 gpa_t addr, unsigned int len)
483 switch (addr & 0xffff) {
485 return 0x92; /* part number, bits[7:0] */
487 return 0xb4; /* part number, bits[11:8] */
489 return GIC_PIDR2_ARCH_GICv3 | 0x0b;
491 return 0x40; /* This is a 64K software visible page */
492 /* The following are the ID registers for (any) GIC. */
507 * Find the target VCPU and the LPI number for a given devid/eventid pair
508 * and make this IRQ pending, possibly injecting it.
509 * Must be called with the its_lock mutex held.
510 * Returns 0 on success, a positive error value for any ITS mapping
511 * related errors and negative error values for generic errors.
513 static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its,
514 u32 devid, u32 eventid)
516 struct kvm_vcpu *vcpu;
522 ite = find_ite(its, devid, eventid);
523 if (!ite || !its_is_collection_mapped(ite->collection))
524 return E_ITS_INT_UNMAPPED_INTERRUPT;
526 vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr);
528 return E_ITS_INT_UNMAPPED_INTERRUPT;
530 if (!vcpu->arch.vgic_cpu.lpis_enabled)
533 spin_lock(&ite->irq->irq_lock);
534 ite->irq->pending_latch = true;
535 vgic_queue_irq_unlock(kvm, ite->irq);
540 static struct vgic_io_device *vgic_get_its_iodev(struct kvm_io_device *dev)
542 struct vgic_io_device *iodev;
544 if (dev->ops != &kvm_io_gic_ops)
547 iodev = container_of(dev, struct vgic_io_device, dev);
549 if (iodev->iodev_type != IODEV_ITS)
556 * Queries the KVM IO bus framework to get the ITS pointer from the given
558 * We then call vgic_its_trigger_msi() with the decoded data.
559 * According to the KVM_SIGNAL_MSI API description returns 1 on success.
561 int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
564 struct kvm_io_device *kvm_io_dev;
565 struct vgic_io_device *iodev;
568 if (!vgic_has_its(kvm))
571 if (!(msi->flags & KVM_MSI_VALID_DEVID))
574 address = (u64)msi->address_hi << 32 | msi->address_lo;
576 kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address);
580 iodev = vgic_get_its_iodev(kvm_io_dev);
584 mutex_lock(&iodev->its->its_lock);
585 ret = vgic_its_trigger_msi(kvm, iodev->its, msi->devid, msi->data);
586 mutex_unlock(&iodev->its->its_lock);
592 * KVM_SIGNAL_MSI demands a return value > 0 for success and 0
593 * if the guest has blocked the MSI. So we map any LPI mapping
594 * related error to that.
602 /* Requires the its_lock to be held. */
603 static void its_free_ite(struct kvm *kvm, struct its_ite *ite)
605 list_del(&ite->ite_list);
607 /* This put matches the get in vgic_add_lpi. */
609 vgic_put_irq(kvm, ite->irq);
614 static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size)
616 return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1);
619 #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8)
620 #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32)
621 #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1)
622 #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32)
623 #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32)
624 #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16)
625 #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8)
626 #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32)
627 #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1)
630 * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
631 * Must be called with the its_lock mutex held.
633 static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its,
636 u32 device_id = its_cmd_get_deviceid(its_cmd);
637 u32 event_id = its_cmd_get_id(its_cmd);
641 ite = find_ite(its, device_id, event_id);
642 if (ite && ite->collection) {
644 * Though the spec talks about removing the pending state, we
645 * don't bother here since we clear the ITTE anyway and the
646 * pending state is a property of the ITTE struct.
648 its_free_ite(kvm, ite);
652 return E_ITS_DISCARD_UNMAPPED_INTERRUPT;
656 * The MOVI command moves an ITTE to a different collection.
657 * Must be called with the its_lock mutex held.
659 static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its,
662 u32 device_id = its_cmd_get_deviceid(its_cmd);
663 u32 event_id = its_cmd_get_id(its_cmd);
664 u32 coll_id = its_cmd_get_collection(its_cmd);
665 struct kvm_vcpu *vcpu;
667 struct its_collection *collection;
669 ite = find_ite(its, device_id, event_id);
671 return E_ITS_MOVI_UNMAPPED_INTERRUPT;
673 if (!its_is_collection_mapped(ite->collection))
674 return E_ITS_MOVI_UNMAPPED_COLLECTION;
676 collection = find_collection(its, coll_id);
677 if (!its_is_collection_mapped(collection))
678 return E_ITS_MOVI_UNMAPPED_COLLECTION;
680 ite->collection = collection;
681 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
683 spin_lock(&ite->irq->irq_lock);
684 ite->irq->target_vcpu = vcpu;
685 spin_unlock(&ite->irq->irq_lock);
691 * Check whether an ID can be stored into the corresponding guest table.
692 * For a direct table this is pretty easy, but gets a bit nasty for
693 * indirect tables. We check whether the resulting guest physical address
694 * is actually valid (covered by a memslot and guest accessible).
695 * For this we have to read the respective first level entry.
697 static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id)
699 int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
700 u64 indirect_ptr, type = GITS_BASER_TYPE(baser);
701 int esz = GITS_BASER_ENTRY_SIZE(baser);
706 case GITS_BASER_TYPE_DEVICE:
707 if (id >= BIT_ULL(VITS_TYPER_DEVBITS))
710 case GITS_BASER_TYPE_COLLECTION:
711 /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */
712 if (id >= BIT_ULL(16))
719 if (!(baser & GITS_BASER_INDIRECT)) {
722 if (id >= (l1_tbl_size / esz))
725 addr = BASER_ADDRESS(baser) + id * esz;
726 gfn = addr >> PAGE_SHIFT;
728 return kvm_is_visible_gfn(its->dev->kvm, gfn);
731 /* calculate and check the index into the 1st level */
732 index = id / (SZ_64K / esz);
733 if (index >= (l1_tbl_size / sizeof(u64)))
736 /* Each 1st level entry is represented by a 64-bit value. */
737 if (kvm_read_guest(its->dev->kvm,
738 BASER_ADDRESS(baser) + index * sizeof(indirect_ptr),
739 &indirect_ptr, sizeof(indirect_ptr)))
742 indirect_ptr = le64_to_cpu(indirect_ptr);
744 /* check the valid bit of the first level entry */
745 if (!(indirect_ptr & BIT_ULL(63)))
749 * Mask the guest physical address and calculate the frame number.
750 * Any address beyond our supported 48 bits of PA will be caught
751 * by the actual check in the final step.
753 indirect_ptr &= GENMASK_ULL(51, 16);
755 /* Find the address of the actual entry */
756 index = id % (SZ_64K / esz);
757 indirect_ptr += index * esz;
758 gfn = indirect_ptr >> PAGE_SHIFT;
760 return kvm_is_visible_gfn(its->dev->kvm, gfn);
763 static int vgic_its_alloc_collection(struct vgic_its *its,
764 struct its_collection **colp,
767 struct its_collection *collection;
769 if (!vgic_its_check_id(its, its->baser_coll_table, coll_id))
770 return E_ITS_MAPC_COLLECTION_OOR;
772 collection = kzalloc(sizeof(*collection), GFP_KERNEL);
774 collection->collection_id = coll_id;
775 collection->target_addr = COLLECTION_NOT_MAPPED;
777 list_add_tail(&collection->coll_list, &its->collection_list);
783 static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id)
785 struct its_collection *collection;
786 struct its_device *device;
790 * Clearing the mapping for that collection ID removes the
791 * entry from the list. If there wasn't any before, we can
794 collection = find_collection(its, coll_id);
798 for_each_lpi_its(device, ite, its)
799 if (ite->collection &&
800 ite->collection->collection_id == coll_id)
801 ite->collection = NULL;
803 list_del(&collection->coll_list);
807 /* Must be called with its_lock mutex held */
808 static struct its_ite *vgic_its_alloc_ite(struct its_device *device,
809 struct its_collection *collection,
810 u32 lpi_id, u32 event_id)
814 ite = kzalloc(sizeof(*ite), GFP_KERNEL);
816 return ERR_PTR(-ENOMEM);
818 ite->event_id = event_id;
819 ite->collection = collection;
822 list_add_tail(&ite->ite_list, &device->itt_head);
827 * The MAPTI and MAPI commands map LPIs to ITTEs.
828 * Must be called with its_lock mutex held.
830 static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its,
833 u32 device_id = its_cmd_get_deviceid(its_cmd);
834 u32 event_id = its_cmd_get_id(its_cmd);
835 u32 coll_id = its_cmd_get_collection(its_cmd);
837 struct kvm_vcpu *vcpu = NULL;
838 struct its_device *device;
839 struct its_collection *collection, *new_coll = NULL;
840 struct vgic_irq *irq;
843 device = find_its_device(its, device_id);
845 return E_ITS_MAPTI_UNMAPPED_DEVICE;
847 if (event_id >= BIT_ULL(device->num_eventid_bits))
848 return E_ITS_MAPTI_ID_OOR;
850 if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI)
851 lpi_nr = its_cmd_get_physical_id(its_cmd);
854 if (lpi_nr < GIC_LPI_OFFSET ||
855 lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser))
856 return E_ITS_MAPTI_PHYSICALID_OOR;
858 /* If there is an existing mapping, behavior is UNPREDICTABLE. */
859 if (find_ite(its, device_id, event_id))
862 collection = find_collection(its, coll_id);
864 int ret = vgic_its_alloc_collection(its, &collection, coll_id);
867 new_coll = collection;
870 ite = vgic_its_alloc_ite(device, collection, lpi_nr, event_id);
873 vgic_its_free_collection(its, coll_id);
877 if (its_is_collection_mapped(collection))
878 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
880 irq = vgic_add_lpi(kvm, lpi_nr, vcpu);
883 vgic_its_free_collection(its, coll_id);
884 its_free_ite(kvm, ite);
892 /* Requires the its_lock to be held. */
893 static void vgic_its_unmap_device(struct kvm *kvm, struct its_device *device)
895 struct its_ite *ite, *temp;
898 * The spec says that unmapping a device with still valid
899 * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
900 * since we cannot leave the memory unreferenced.
902 list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list)
903 its_free_ite(kvm, ite);
905 list_del(&device->dev_list);
909 /* Must be called with its_lock mutex held */
910 static struct its_device *vgic_its_alloc_device(struct vgic_its *its,
911 u32 device_id, gpa_t itt_addr,
914 struct its_device *device;
916 device = kzalloc(sizeof(*device), GFP_KERNEL);
918 return ERR_PTR(-ENOMEM);
920 device->device_id = device_id;
921 device->itt_addr = itt_addr;
922 device->num_eventid_bits = num_eventid_bits;
923 INIT_LIST_HEAD(&device->itt_head);
925 list_add_tail(&device->dev_list, &its->device_list);
930 * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
931 * Must be called with the its_lock mutex held.
933 static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its,
936 u32 device_id = its_cmd_get_deviceid(its_cmd);
937 bool valid = its_cmd_get_validbit(its_cmd);
938 u8 num_eventid_bits = its_cmd_get_size(its_cmd);
939 gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd);
940 struct its_device *device;
942 if (!vgic_its_check_id(its, its->baser_device_table, device_id))
943 return E_ITS_MAPD_DEVICE_OOR;
945 if (valid && num_eventid_bits > VITS_TYPER_IDBITS)
946 return E_ITS_MAPD_ITTSIZE_OOR;
948 device = find_its_device(its, device_id);
951 * The spec says that calling MAPD on an already mapped device
952 * invalidates all cached data for this device. We implement this
953 * by removing the mapping and re-establishing it.
956 vgic_its_unmap_device(kvm, device);
959 * The spec does not say whether unmapping a not-mapped device
960 * is an error, so we are done in any case.
965 device = vgic_its_alloc_device(its, device_id, itt_addr,
968 return PTR_ERR(device);
974 * The MAPC command maps collection IDs to redistributors.
975 * Must be called with the its_lock mutex held.
977 static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its,
982 struct its_collection *collection;
985 valid = its_cmd_get_validbit(its_cmd);
986 coll_id = its_cmd_get_collection(its_cmd);
987 target_addr = its_cmd_get_target_addr(its_cmd);
989 if (target_addr >= atomic_read(&kvm->online_vcpus))
990 return E_ITS_MAPC_PROCNUM_OOR;
993 vgic_its_free_collection(its, coll_id);
995 collection = find_collection(its, coll_id);
1000 ret = vgic_its_alloc_collection(its, &collection,
1004 collection->target_addr = target_addr;
1006 collection->target_addr = target_addr;
1007 update_affinity_collection(kvm, its, collection);
1015 * The CLEAR command removes the pending state for a particular LPI.
1016 * Must be called with the its_lock mutex held.
1018 static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its,
1021 u32 device_id = its_cmd_get_deviceid(its_cmd);
1022 u32 event_id = its_cmd_get_id(its_cmd);
1023 struct its_ite *ite;
1026 ite = find_ite(its, device_id, event_id);
1028 return E_ITS_CLEAR_UNMAPPED_INTERRUPT;
1030 ite->irq->pending_latch = false;
1036 * The INV command syncs the configuration bits from the memory table.
1037 * Must be called with the its_lock mutex held.
1039 static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its,
1042 u32 device_id = its_cmd_get_deviceid(its_cmd);
1043 u32 event_id = its_cmd_get_id(its_cmd);
1044 struct its_ite *ite;
1047 ite = find_ite(its, device_id, event_id);
1049 return E_ITS_INV_UNMAPPED_INTERRUPT;
1051 return update_lpi_config(kvm, ite->irq, NULL);
1055 * The INVALL command requests flushing of all IRQ data in this collection.
1056 * Find the VCPU mapped to that collection, then iterate over the VM's list
1057 * of mapped LPIs and update the configuration for each IRQ which targets
1058 * the specified vcpu. The configuration will be read from the in-memory
1059 * configuration table.
1060 * Must be called with the its_lock mutex held.
1062 static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its,
1065 u32 coll_id = its_cmd_get_collection(its_cmd);
1066 struct its_collection *collection;
1067 struct kvm_vcpu *vcpu;
1068 struct vgic_irq *irq;
1072 collection = find_collection(its, coll_id);
1073 if (!its_is_collection_mapped(collection))
1074 return E_ITS_INVALL_UNMAPPED_COLLECTION;
1076 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
1078 irq_count = vgic_copy_lpi_list(kvm, &intids);
1082 for (i = 0; i < irq_count; i++) {
1083 irq = vgic_get_irq(kvm, NULL, intids[i]);
1086 update_lpi_config(kvm, irq, vcpu);
1087 vgic_put_irq(kvm, irq);
1096 * The MOVALL command moves the pending state of all IRQs targeting one
1097 * redistributor to another. We don't hold the pending state in the VCPUs,
1098 * but in the IRQs instead, so there is really not much to do for us here.
1099 * However the spec says that no IRQ must target the old redistributor
1100 * afterwards, so we make sure that no LPI is using the associated target_vcpu.
1101 * This command affects all LPIs in the system that target that redistributor.
1103 static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its,
1106 struct vgic_dist *dist = &kvm->arch.vgic;
1107 u32 target1_addr = its_cmd_get_target_addr(its_cmd);
1108 u32 target2_addr = its_cmd_mask_field(its_cmd, 3, 16, 32);
1109 struct kvm_vcpu *vcpu1, *vcpu2;
1110 struct vgic_irq *irq;
1112 if (target1_addr >= atomic_read(&kvm->online_vcpus) ||
1113 target2_addr >= atomic_read(&kvm->online_vcpus))
1114 return E_ITS_MOVALL_PROCNUM_OOR;
1116 if (target1_addr == target2_addr)
1119 vcpu1 = kvm_get_vcpu(kvm, target1_addr);
1120 vcpu2 = kvm_get_vcpu(kvm, target2_addr);
1122 spin_lock(&dist->lpi_list_lock);
1124 list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
1125 spin_lock(&irq->irq_lock);
1127 if (irq->target_vcpu == vcpu1)
1128 irq->target_vcpu = vcpu2;
1130 spin_unlock(&irq->irq_lock);
1133 spin_unlock(&dist->lpi_list_lock);
1139 * The INT command injects the LPI associated with that DevID/EvID pair.
1140 * Must be called with the its_lock mutex held.
1142 static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its,
1145 u32 msi_data = its_cmd_get_id(its_cmd);
1146 u64 msi_devid = its_cmd_get_deviceid(its_cmd);
1148 return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data);
1152 * This function is called with the its_cmd lock held, but the ITS data
1153 * structure lock dropped.
1155 static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its,
1160 mutex_lock(&its->its_lock);
1161 switch (its_cmd_get_command(its_cmd)) {
1163 ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd);
1166 ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd);
1169 ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1171 case GITS_CMD_MAPTI:
1172 ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1175 ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd);
1177 case GITS_CMD_DISCARD:
1178 ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd);
1180 case GITS_CMD_CLEAR:
1181 ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd);
1183 case GITS_CMD_MOVALL:
1184 ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd);
1187 ret = vgic_its_cmd_handle_int(kvm, its, its_cmd);
1190 ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd);
1192 case GITS_CMD_INVALL:
1193 ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd);
1196 /* we ignore this command: we are in sync all of the time */
1200 mutex_unlock(&its->its_lock);
1205 static u64 vgic_sanitise_its_baser(u64 reg)
1207 reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK,
1208 GITS_BASER_SHAREABILITY_SHIFT,
1209 vgic_sanitise_shareability);
1210 reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK,
1211 GITS_BASER_INNER_CACHEABILITY_SHIFT,
1212 vgic_sanitise_inner_cacheability);
1213 reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK,
1214 GITS_BASER_OUTER_CACHEABILITY_SHIFT,
1215 vgic_sanitise_outer_cacheability);
1217 /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */
1218 reg &= ~GENMASK_ULL(15, 12);
1220 /* We support only one (ITS) page size: 64K */
1221 reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K;
1226 static u64 vgic_sanitise_its_cbaser(u64 reg)
1228 reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK,
1229 GITS_CBASER_SHAREABILITY_SHIFT,
1230 vgic_sanitise_shareability);
1231 reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK,
1232 GITS_CBASER_INNER_CACHEABILITY_SHIFT,
1233 vgic_sanitise_inner_cacheability);
1234 reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK,
1235 GITS_CBASER_OUTER_CACHEABILITY_SHIFT,
1236 vgic_sanitise_outer_cacheability);
1239 * Sanitise the physical address to be 64k aligned.
1240 * Also limit the physical addresses to 48 bits.
1242 reg &= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12));
1247 static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm,
1248 struct vgic_its *its,
1249 gpa_t addr, unsigned int len)
1251 return extract_bytes(its->cbaser, addr & 7, len);
1254 static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its,
1255 gpa_t addr, unsigned int len,
1258 /* When GITS_CTLR.Enable is 1, this register is RO. */
1262 mutex_lock(&its->cmd_lock);
1263 its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val);
1264 its->cbaser = vgic_sanitise_its_cbaser(its->cbaser);
1267 * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1268 * it to CREADR to make sure we start with an empty command buffer.
1270 its->cwriter = its->creadr;
1271 mutex_unlock(&its->cmd_lock);
1274 #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12)
1275 #define ITS_CMD_SIZE 32
1276 #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5))
1278 /* Must be called with the cmd_lock held. */
1279 static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its)
1284 /* Commands are only processed when the ITS is enabled. */
1288 cbaser = CBASER_ADDRESS(its->cbaser);
1290 while (its->cwriter != its->creadr) {
1291 int ret = kvm_read_guest(kvm, cbaser + its->creadr,
1292 cmd_buf, ITS_CMD_SIZE);
1294 * If kvm_read_guest() fails, this could be due to the guest
1295 * programming a bogus value in CBASER or something else going
1296 * wrong from which we cannot easily recover.
1297 * According to section 6.3.2 in the GICv3 spec we can just
1298 * ignore that command then.
1301 vgic_its_handle_command(kvm, its, cmd_buf);
1303 its->creadr += ITS_CMD_SIZE;
1304 if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser))
1310 * By writing to CWRITER the guest announces new commands to be processed.
1311 * To avoid any races in the first place, we take the its_cmd lock, which
1312 * protects our ring buffer variables, so that there is only one user
1313 * per ITS handling commands at a given time.
1315 static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its,
1316 gpa_t addr, unsigned int len,
1324 mutex_lock(&its->cmd_lock);
1326 reg = update_64bit_reg(its->cwriter, addr & 7, len, val);
1327 reg = ITS_CMD_OFFSET(reg);
1328 if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1329 mutex_unlock(&its->cmd_lock);
1334 vgic_its_process_commands(kvm, its);
1336 mutex_unlock(&its->cmd_lock);
1339 static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm,
1340 struct vgic_its *its,
1341 gpa_t addr, unsigned int len)
1343 return extract_bytes(its->cwriter, addr & 0x7, len);
1346 static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm,
1347 struct vgic_its *its,
1348 gpa_t addr, unsigned int len)
1350 return extract_bytes(its->creadr, addr & 0x7, len);
1353 static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm,
1354 struct vgic_its *its,
1355 gpa_t addr, unsigned int len,
1361 mutex_lock(&its->cmd_lock);
1368 cmd_offset = ITS_CMD_OFFSET(val);
1369 if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1374 its->creadr = cmd_offset;
1376 mutex_unlock(&its->cmd_lock);
1380 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
1381 static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm,
1382 struct vgic_its *its,
1383 gpa_t addr, unsigned int len)
1387 switch (BASER_INDEX(addr)) {
1389 reg = its->baser_device_table;
1392 reg = its->baser_coll_table;
1399 return extract_bytes(reg, addr & 7, len);
1402 #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
1403 static void vgic_mmio_write_its_baser(struct kvm *kvm,
1404 struct vgic_its *its,
1405 gpa_t addr, unsigned int len,
1408 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1409 u64 entry_size, device_type;
1410 u64 reg, *regptr, clearbits = 0;
1412 /* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1416 switch (BASER_INDEX(addr)) {
1418 regptr = &its->baser_device_table;
1419 entry_size = abi->dte_esz;
1420 device_type = GITS_BASER_TYPE_DEVICE;
1423 regptr = &its->baser_coll_table;
1424 entry_size = abi->cte_esz;
1425 device_type = GITS_BASER_TYPE_COLLECTION;
1426 clearbits = GITS_BASER_INDIRECT;
1432 reg = update_64bit_reg(*regptr, addr & 7, len, val);
1433 reg &= ~GITS_BASER_RO_MASK;
1436 reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
1437 reg |= device_type << GITS_BASER_TYPE_SHIFT;
1438 reg = vgic_sanitise_its_baser(reg);
1443 static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu,
1444 struct vgic_its *its,
1445 gpa_t addr, unsigned int len)
1449 mutex_lock(&its->cmd_lock);
1450 if (its->creadr == its->cwriter)
1451 reg |= GITS_CTLR_QUIESCENT;
1453 reg |= GITS_CTLR_ENABLE;
1454 mutex_unlock(&its->cmd_lock);
1459 static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its,
1460 gpa_t addr, unsigned int len,
1463 mutex_lock(&its->cmd_lock);
1465 its->enabled = !!(val & GITS_CTLR_ENABLE);
1468 * Try to process any pending commands. This function bails out early
1469 * if the ITS is disabled or no commands have been queued.
1471 vgic_its_process_commands(kvm, its);
1473 mutex_unlock(&its->cmd_lock);
1476 #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \
1478 .reg_offset = off, \
1480 .access_flags = acc, \
1485 #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\
1487 .reg_offset = off, \
1489 .access_flags = acc, \
1492 .uaccess_its_write = uwr, \
1495 static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its,
1496 gpa_t addr, unsigned int len, unsigned long val)
1501 static struct vgic_register_region its_registers[] = {
1502 REGISTER_ITS_DESC(GITS_CTLR,
1503 vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4,
1505 REGISTER_ITS_DESC_UACCESS(GITS_IIDR,
1506 vgic_mmio_read_its_iidr, its_mmio_write_wi,
1507 vgic_mmio_uaccess_write_its_iidr, 4,
1509 REGISTER_ITS_DESC(GITS_TYPER,
1510 vgic_mmio_read_its_typer, its_mmio_write_wi, 8,
1511 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1512 REGISTER_ITS_DESC(GITS_CBASER,
1513 vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8,
1514 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1515 REGISTER_ITS_DESC(GITS_CWRITER,
1516 vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8,
1517 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1518 REGISTER_ITS_DESC_UACCESS(GITS_CREADR,
1519 vgic_mmio_read_its_creadr, its_mmio_write_wi,
1520 vgic_mmio_uaccess_write_its_creadr, 8,
1521 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1522 REGISTER_ITS_DESC(GITS_BASER,
1523 vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40,
1524 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1525 REGISTER_ITS_DESC(GITS_IDREGS_BASE,
1526 vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30,
1530 /* This is called on setting the LPI enable bit in the redistributor. */
1531 void vgic_enable_lpis(struct kvm_vcpu *vcpu)
1533 if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ))
1534 its_sync_lpi_pending_table(vcpu);
1537 static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its)
1539 struct vgic_io_device *iodev = &its->iodev;
1542 if (!its->initialized)
1545 if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base))
1548 iodev->regions = its_registers;
1549 iodev->nr_regions = ARRAY_SIZE(its_registers);
1550 kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops);
1552 iodev->base_addr = its->vgic_its_base;
1553 iodev->iodev_type = IODEV_ITS;
1555 mutex_lock(&kvm->slots_lock);
1556 ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr,
1557 KVM_VGIC_V3_ITS_SIZE, &iodev->dev);
1558 mutex_unlock(&kvm->slots_lock);
1563 #define INITIAL_BASER_VALUE \
1564 (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \
1565 GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \
1566 GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \
1567 GITS_BASER_PAGE_SIZE_64K)
1569 #define INITIAL_PROPBASER_VALUE \
1570 (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \
1571 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \
1572 GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1574 static int vgic_its_create(struct kvm_device *dev, u32 type)
1576 struct vgic_its *its;
1578 if (type != KVM_DEV_TYPE_ARM_VGIC_ITS)
1581 its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL);
1585 mutex_init(&its->its_lock);
1586 mutex_init(&its->cmd_lock);
1588 its->vgic_its_base = VGIC_ADDR_UNDEF;
1590 INIT_LIST_HEAD(&its->device_list);
1591 INIT_LIST_HEAD(&its->collection_list);
1593 dev->kvm->arch.vgic.has_its = true;
1594 its->initialized = false;
1595 its->enabled = false;
1598 its->baser_device_table = INITIAL_BASER_VALUE |
1599 ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT);
1600 its->baser_coll_table = INITIAL_BASER_VALUE |
1601 ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT);
1602 dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE;
1606 return vgic_its_set_abi(its, NR_ITS_ABIS - 1);
1609 static void vgic_its_destroy(struct kvm_device *kvm_dev)
1611 struct kvm *kvm = kvm_dev->kvm;
1612 struct vgic_its *its = kvm_dev->private;
1613 struct its_device *dev;
1614 struct its_ite *ite;
1615 struct list_head *dev_cur, *dev_temp;
1616 struct list_head *cur, *temp;
1619 * We may end up here without the lists ever having been initialized.
1620 * Check this and bail out early to avoid dereferencing a NULL pointer.
1622 if (!its->device_list.next)
1625 mutex_lock(&its->its_lock);
1626 list_for_each_safe(dev_cur, dev_temp, &its->device_list) {
1627 dev = container_of(dev_cur, struct its_device, dev_list);
1628 list_for_each_safe(cur, temp, &dev->itt_head) {
1629 ite = (container_of(cur, struct its_ite, ite_list));
1630 its_free_ite(kvm, ite);
1636 list_for_each_safe(cur, temp, &its->collection_list) {
1638 kfree(container_of(cur, struct its_collection, coll_list));
1640 mutex_unlock(&its->its_lock);
1645 int vgic_its_has_attr_regs(struct kvm_device *dev,
1646 struct kvm_device_attr *attr)
1648 const struct vgic_register_region *region;
1649 gpa_t offset = attr->attr;
1652 align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7;
1657 region = vgic_find_mmio_region(its_registers,
1658 ARRAY_SIZE(its_registers),
1666 int vgic_its_attr_regs_access(struct kvm_device *dev,
1667 struct kvm_device_attr *attr,
1668 u64 *reg, bool is_write)
1670 const struct vgic_register_region *region;
1671 struct vgic_its *its;
1677 offset = attr->attr;
1680 * Although the spec supports upper/lower 32-bit accesses to
1681 * 64-bit ITS registers, the userspace ABI requires 64-bit
1682 * accesses to all 64-bit wide registers. We therefore only
1683 * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID
1686 if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4))
1694 mutex_lock(&dev->kvm->lock);
1696 if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) {
1701 region = vgic_find_mmio_region(its_registers,
1702 ARRAY_SIZE(its_registers),
1709 if (!lock_all_vcpus(dev->kvm)) {
1714 addr = its->vgic_its_base + offset;
1716 len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4;
1719 if (region->uaccess_its_write)
1720 ret = region->uaccess_its_write(dev->kvm, its, addr,
1723 region->its_write(dev->kvm, its, addr, len, *reg);
1725 *reg = region->its_read(dev->kvm, its, addr, len);
1727 unlock_all_vcpus(dev->kvm);
1729 mutex_unlock(&dev->kvm->lock);
1733 u32 compute_next_devid_offset(struct list_head *h, struct its_device *dev)
1735 struct its_device *next;
1738 if (list_is_last(&dev->dev_list, h))
1740 next = list_next_entry(dev, dev_list);
1741 next_offset = next->device_id - dev->device_id;
1743 return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET);
1746 u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite)
1748 struct its_ite *next;
1751 if (list_is_last(&ite->ite_list, h))
1753 next = list_next_entry(ite, ite_list);
1754 next_offset = next->event_id - ite->event_id;
1756 return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET);
1760 * entry_fn_t - Callback called on a table entry restore path
1762 * @id: id of the entry
1763 * @entry: pointer to the entry
1764 * @opaque: pointer to an opaque data
1766 * Return: < 0 on error, 0 if last element was identified, id offset to next
1769 typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry,
1773 * scan_its_table - Scan a contiguous table in guest RAM and applies a function
1777 * @base: base gpa of the table
1778 * @size: size of the table in bytes
1779 * @esz: entry size in bytes
1780 * @start_id: the ID of the first entry in the table
1781 * (non zero for 2d level tables)
1782 * @fn: function to apply on each entry
1784 * Return: < 0 on error, 0 if last element was identified, 1 otherwise
1785 * (the last element may not be found on second level tables)
1787 int scan_its_table(struct vgic_its *its, gpa_t base, int size, int esz,
1788 int start_id, entry_fn_t fn, void *opaque)
1790 void *entry = kzalloc(esz, GFP_KERNEL);
1791 struct kvm *kvm = its->dev->kvm;
1792 unsigned long len = size;
1801 ret = kvm_read_guest(kvm, gpa, entry, esz);
1805 next_offset = fn(its, id, entry, opaque);
1806 if (next_offset <= 0) {
1811 byte_offset = next_offset * esz;
1824 * vgic_its_save_device_tables - Save the device table and all ITT
1827 static int vgic_its_save_device_tables(struct vgic_its *its)
1833 * vgic_its_restore_device_tables - Restore the device table and all ITT
1834 * from guest RAM to internal data structs
1836 static int vgic_its_restore_device_tables(struct vgic_its *its)
1842 * vgic_its_save_collection_table - Save the collection table into
1845 static int vgic_its_save_collection_table(struct vgic_its *its)
1851 * vgic_its_restore_collection_table - reads the collection table
1852 * in guest memory and restores the ITS internal state. Requires the
1853 * BASER registers to be restored before.
1855 static int vgic_its_restore_collection_table(struct vgic_its *its)
1861 * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM
1862 * according to v0 ABI
1864 static int vgic_its_save_tables_v0(struct vgic_its *its)
1866 struct kvm *kvm = its->dev->kvm;
1869 mutex_lock(&kvm->lock);
1870 mutex_lock(&its->its_lock);
1872 if (!lock_all_vcpus(kvm)) {
1873 mutex_unlock(&its->its_lock);
1874 mutex_unlock(&kvm->lock);
1878 ret = vgic_its_save_device_tables(its);
1882 ret = vgic_its_save_collection_table(its);
1885 unlock_all_vcpus(kvm);
1886 mutex_unlock(&its->its_lock);
1887 mutex_unlock(&kvm->lock);
1892 * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM
1893 * to internal data structs according to V0 ABI
1896 static int vgic_its_restore_tables_v0(struct vgic_its *its)
1898 struct kvm *kvm = its->dev->kvm;
1901 mutex_lock(&kvm->lock);
1902 mutex_lock(&its->its_lock);
1904 if (!lock_all_vcpus(kvm)) {
1905 mutex_unlock(&its->its_lock);
1906 mutex_unlock(&kvm->lock);
1910 ret = vgic_its_restore_collection_table(its);
1914 ret = vgic_its_restore_device_tables(its);
1917 unlock_all_vcpus(kvm);
1918 mutex_unlock(&its->its_lock);
1919 mutex_unlock(&kvm->lock);
1925 * On restore path, MSI injections can happen before the
1926 * first VCPU run so let's complete the GIC init here.
1928 return kvm_vgic_map_resources(its->dev->kvm);
1931 static int vgic_its_commit_v0(struct vgic_its *its)
1933 const struct vgic_its_abi *abi;
1935 abi = vgic_its_get_abi(its);
1936 its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
1937 its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
1939 its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5)
1940 << GITS_BASER_ENTRY_SIZE_SHIFT);
1942 its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5)
1943 << GITS_BASER_ENTRY_SIZE_SHIFT);
1947 static int vgic_its_has_attr(struct kvm_device *dev,
1948 struct kvm_device_attr *attr)
1950 switch (attr->group) {
1951 case KVM_DEV_ARM_VGIC_GRP_ADDR:
1952 switch (attr->attr) {
1953 case KVM_VGIC_ITS_ADDR_TYPE:
1957 case KVM_DEV_ARM_VGIC_GRP_CTRL:
1958 switch (attr->attr) {
1959 case KVM_DEV_ARM_VGIC_CTRL_INIT:
1961 case KVM_DEV_ARM_ITS_SAVE_TABLES:
1963 case KVM_DEV_ARM_ITS_RESTORE_TABLES:
1967 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS:
1968 return vgic_its_has_attr_regs(dev, attr);
1973 static int vgic_its_set_attr(struct kvm_device *dev,
1974 struct kvm_device_attr *attr)
1976 struct vgic_its *its = dev->private;
1979 switch (attr->group) {
1980 case KVM_DEV_ARM_VGIC_GRP_ADDR: {
1981 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
1982 unsigned long type = (unsigned long)attr->attr;
1985 if (type != KVM_VGIC_ITS_ADDR_TYPE)
1988 if (copy_from_user(&addr, uaddr, sizeof(addr)))
1991 ret = vgic_check_ioaddr(dev->kvm, &its->vgic_its_base,
1996 its->vgic_its_base = addr;
2000 case KVM_DEV_ARM_VGIC_GRP_CTRL: {
2001 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2003 switch (attr->attr) {
2004 case KVM_DEV_ARM_VGIC_CTRL_INIT:
2005 its->initialized = true;
2008 case KVM_DEV_ARM_ITS_SAVE_TABLES:
2009 return abi->save_tables(its);
2010 case KVM_DEV_ARM_ITS_RESTORE_TABLES:
2011 return abi->restore_tables(its);
2014 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
2015 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2018 if (get_user(reg, uaddr))
2021 return vgic_its_attr_regs_access(dev, attr, ®, true);
2027 static int vgic_its_get_attr(struct kvm_device *dev,
2028 struct kvm_device_attr *attr)
2030 switch (attr->group) {
2031 case KVM_DEV_ARM_VGIC_GRP_ADDR: {
2032 struct vgic_its *its = dev->private;
2033 u64 addr = its->vgic_its_base;
2034 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2035 unsigned long type = (unsigned long)attr->attr;
2037 if (type != KVM_VGIC_ITS_ADDR_TYPE)
2040 if (copy_to_user(uaddr, &addr, sizeof(addr)))
2044 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
2045 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2049 ret = vgic_its_attr_regs_access(dev, attr, ®, false);
2052 return put_user(reg, uaddr);
2061 static struct kvm_device_ops kvm_arm_vgic_its_ops = {
2062 .name = "kvm-arm-vgic-its",
2063 .create = vgic_its_create,
2064 .destroy = vgic_its_destroy,
2065 .set_attr = vgic_its_set_attr,
2066 .get_attr = vgic_its_get_attr,
2067 .has_attr = vgic_its_has_attr,
2070 int kvm_vgic_register_its_device(void)
2072 return kvm_register_device_ops(&kvm_arm_vgic_its_ops,
2073 KVM_DEV_TYPE_ARM_VGIC_ITS);
2077 * Registers all ITSes with the kvm_io_bus framework.
2078 * To follow the existing VGIC initialization sequence, this has to be
2079 * done as late as possible, just before the first VCPU runs.
2081 int vgic_register_its_iodevs(struct kvm *kvm)
2083 struct kvm_device *dev;
2086 list_for_each_entry(dev, &kvm->devices, vm_node) {
2087 if (dev->ops != &kvm_arm_vgic_its_ops)
2090 ret = vgic_register_its_iodev(kvm, dev->private);
2094 * We don't need to care about tearing down previously
2095 * registered ITSes, as the kvm_io_bus framework removes
2096 * them for us if the VM gets destroyed.