2 * VGIC MMIO handling functions
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/bitops.h>
15 #include <linux/bsearch.h>
16 #include <linux/kvm.h>
17 #include <linux/kvm_host.h>
18 #include <kvm/iodev.h>
19 #include <kvm/arm_vgic.h>
22 #include "vgic-mmio.h"
24 unsigned long vgic_mmio_read_raz(struct kvm_vcpu *vcpu,
25 gpa_t addr, unsigned int len)
30 unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu,
31 gpa_t addr, unsigned int len)
36 void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr,
37 unsigned int len, unsigned long val)
43 * Read accesses to both GICD_ICENABLER and GICD_ISENABLER return the value
44 * of the enabled bit, so there is only one function for both here.
46 unsigned long vgic_mmio_read_enable(struct kvm_vcpu *vcpu,
47 gpa_t addr, unsigned int len)
49 u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
53 /* Loop over all IRQs affected by this read */
54 for (i = 0; i < len * 8; i++) {
55 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
64 void vgic_mmio_write_senable(struct kvm_vcpu *vcpu,
65 gpa_t addr, unsigned int len,
68 u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
71 for_each_set_bit(i, &val, len * 8) {
72 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
74 spin_lock(&irq->irq_lock);
76 vgic_queue_irq_unlock(vcpu->kvm, irq);
80 void vgic_mmio_write_cenable(struct kvm_vcpu *vcpu,
81 gpa_t addr, unsigned int len,
84 u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
87 for_each_set_bit(i, &val, len * 8) {
88 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
90 spin_lock(&irq->irq_lock);
94 spin_unlock(&irq->irq_lock);
98 static int match_region(const void *key, const void *elt)
100 const unsigned int offset = (unsigned long)key;
101 const struct vgic_register_region *region = elt;
103 if (offset < region->reg_offset)
106 if (offset >= region->reg_offset + region->len)
112 /* Find the proper register handler entry given a certain address offset. */
113 static const struct vgic_register_region *
114 vgic_find_mmio_region(const struct vgic_register_region *region, int nr_regions,
117 return bsearch((void *)(uintptr_t)offset, region, nr_regions,
118 sizeof(region[0]), match_region);
122 * kvm_mmio_read_buf() returns a value in a format where it can be converted
123 * to a byte array and be directly observed as the guest wanted it to appear
124 * in memory if it had done the store itself, which is LE for the GIC, as the
125 * guest knows the GIC is always LE.
127 * We convert this value to the CPUs native format to deal with it as a data
130 unsigned long vgic_data_mmio_bus_to_host(const void *val, unsigned int len)
132 unsigned long data = kvm_mmio_read_buf(val, len);
138 return le16_to_cpu(data);
140 return le32_to_cpu(data);
142 return le64_to_cpu(data);
147 * kvm_mmio_write_buf() expects a value in a format such that if converted to
148 * a byte array it is observed as the guest would see it if it could perform
149 * the load directly. Since the GIC is LE, and the guest knows this, the
150 * guest expects a value in little endian format.
152 * We convert the data value from the CPUs native format to LE so that the
153 * value is returned in the proper format.
155 void vgic_data_host_to_mmio_bus(void *buf, unsigned int len,
162 data = cpu_to_le16(data);
165 data = cpu_to_le32(data);
168 data = cpu_to_le64(data);
171 kvm_mmio_write_buf(buf, len, data);
175 struct vgic_io_device *kvm_to_vgic_iodev(const struct kvm_io_device *dev)
177 return container_of(dev, struct vgic_io_device, dev);
180 static bool check_region(const struct vgic_register_region *region,
183 if ((region->access_flags & VGIC_ACCESS_8bit) && len == 1)
185 if ((region->access_flags & VGIC_ACCESS_32bit) &&
186 len == sizeof(u32) && !(addr & 3))
188 if ((region->access_flags & VGIC_ACCESS_64bit) &&
189 len == sizeof(u64) && !(addr & 7))
195 static int dispatch_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
196 gpa_t addr, int len, void *val)
198 struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev);
199 const struct vgic_register_region *region;
200 struct kvm_vcpu *r_vcpu;
203 region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions,
204 addr - iodev->base_addr);
205 if (!region || !check_region(region, addr, len)) {
210 r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu;
211 data = region->read(r_vcpu, addr, len);
212 vgic_data_host_to_mmio_bus(val, len, data);
216 static int dispatch_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
217 gpa_t addr, int len, const void *val)
219 struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev);
220 const struct vgic_register_region *region;
221 struct kvm_vcpu *r_vcpu;
222 unsigned long data = vgic_data_mmio_bus_to_host(val, len);
224 region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions,
225 addr - iodev->base_addr);
229 if (!check_region(region, addr, len))
232 r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu;
233 region->write(r_vcpu, addr, len, data);
237 struct kvm_io_device_ops kvm_io_gic_ops = {
238 .read = dispatch_mmio_read,
239 .write = dispatch_mmio_write,
242 int vgic_register_dist_iodev(struct kvm *kvm, gpa_t dist_base_address,
245 struct vgic_io_device *io_device = &kvm->arch.vgic.dist_iodev;
251 len = vgic_v2_init_dist_iodev(io_device);
257 io_device->base_addr = dist_base_address;
258 io_device->redist_vcpu = NULL;
260 mutex_lock(&kvm->slots_lock);
261 ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, dist_base_address,
262 len, &io_device->dev);
263 mutex_unlock(&kvm->slots_lock);