virt/kvm/arm/vgic-v2.c

   1 /*
   2  * Copyright (C) 2012,2013 ARM Limited, All Rights Reserved.
   3  * Author: Marc Zyngier <marc.zyngier@arm.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <linux/cpu.h>
  19 #include <linux/kvm.h>
  20 #include <linux/kvm_host.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/io.h>
  23 #include <linux/of.h>
  24 #include <linux/of_address.h>
  25 #include <linux/of_irq.h>
  26
  27 #include <linux/irqchip/arm-gic.h>
  28
  29 #include <asm/kvm_emulate.h>
  30 #include <asm/kvm_arm.h>
  31 #include <asm/kvm_mmu.h>
  32
  33 static struct vgic_lr vgic_v2_get_lr(const struct kvm_vcpu *vcpu, int lr)
  34 {
  35         struct vgic_lr lr_desc;
  36         u32 val = vcpu->arch.vgic_cpu.vgic_v2.vgic_lr[lr];
  37
  38         lr_desc.irq     = val & GICH_LR_VIRTUALID;
  39         if (lr_desc.irq <= 15)
  40                 lr_desc.source  = (val >> GICH_LR_PHYSID_CPUID_SHIFT) & 0x7;
  41         else
  42                 lr_desc.source = 0;
  43         lr_desc.state   = 0;
  44
  45         if (val & GICH_LR_PENDING_BIT)
  46                 lr_desc.state |= LR_STATE_PENDING;
  47         if (val & GICH_LR_ACTIVE_BIT)
  48                 lr_desc.state |= LR_STATE_ACTIVE;
  49         if (val & GICH_LR_EOI)
  50                 lr_desc.state |= LR_EOI_INT;
  51         if (val & GICH_LR_HW) {
  52                 lr_desc.state |= LR_HW;
  53                 lr_desc.hwirq = (val & GICH_LR_PHYSID_CPUID) >> GICH_LR_PHYSID_CPUID_SHIFT;
  54         }
  55
  56         return lr_desc;
  57 }
  58
  59 static void vgic_v2_set_lr(struct kvm_vcpu *vcpu, int lr,
  60                            struct vgic_lr lr_desc)
  61 {
  62         u32 lr_val;
  63
  64         lr_val = lr_desc.irq;
  65
  66         if (lr_desc.state & LR_STATE_PENDING)
  67                 lr_val |= GICH_LR_PENDING_BIT;
  68         if (lr_desc.state & LR_STATE_ACTIVE)
  69                 lr_val |= GICH_LR_ACTIVE_BIT;
  70         if (lr_desc.state & LR_EOI_INT)
  71                 lr_val |= GICH_LR_EOI;
  72
  73         if (lr_desc.state & LR_HW) {
  74                 lr_val |= GICH_LR_HW;
  75                 lr_val |= (u32)lr_desc.hwirq << GICH_LR_PHYSID_CPUID_SHIFT;
  76         }
  77
  78         if (lr_desc.irq < VGIC_NR_SGIS)
  79                 lr_val |= (lr_desc.source << GICH_LR_PHYSID_CPUID_SHIFT);
  80
  81         vcpu->arch.vgic_cpu.vgic_v2.vgic_lr[lr] = lr_val;
  82 }
  83
  84 static void vgic_v2_sync_lr_elrsr(struct kvm_vcpu *vcpu, int lr,
  85                                   struct vgic_lr lr_desc)
  86 {
  87         if (!(lr_desc.state & LR_STATE_MASK))
  88                 vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr |= (1ULL << lr);
  89         else
  90                 vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr &= ~(1ULL << lr);
  91 }
  92
  93 static u64 vgic_v2_get_elrsr(const struct kvm_vcpu *vcpu)
  94 {
  95         return vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr;
  96 }
  97
  98 static u64 vgic_v2_get_eisr(const struct kvm_vcpu *vcpu)
  99 {
 100         return vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr;
 101 }
 102
 103 static void vgic_v2_clear_eisr(struct kvm_vcpu *vcpu)
 104 {
 105         vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr = 0;
 106 }
 107
 108 static u32 vgic_v2_get_interrupt_status(const struct kvm_vcpu *vcpu)
 109 {
 110         u32 misr = vcpu->arch.vgic_cpu.vgic_v2.vgic_misr;
 111         u32 ret = 0;
 112
 113         if (misr & GICH_MISR_EOI)
 114                 ret |= INT_STATUS_EOI;
 115         if (misr & GICH_MISR_U)
 116                 ret |= INT_STATUS_UNDERFLOW;
 117
 118         return ret;
 119 }
 120
 121 static void vgic_v2_enable_underflow(struct kvm_vcpu *vcpu)
 122 {
 123         vcpu->arch.vgic_cpu.vgic_v2.vgic_hcr |= GICH_HCR_UIE;
 124 }
 125
 126 static void vgic_v2_disable_underflow(struct kvm_vcpu *vcpu)
 127 {
 128         vcpu->arch.vgic_cpu.vgic_v2.vgic_hcr &= ~GICH_HCR_UIE;
 129 }
 130
 131 static void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
 132 {
 133         u32 vmcr = vcpu->arch.vgic_cpu.vgic_v2.vgic_vmcr;
 134
 135         vmcrp->ctlr = (vmcr & GICH_VMCR_CTRL_MASK) >> GICH_VMCR_CTRL_SHIFT;
 136         vmcrp->abpr = (vmcr & GICH_VMCR_ALIAS_BINPOINT_MASK) >> GICH_VMCR_ALIAS_BINPOINT_SHIFT;
 137         vmcrp->bpr  = (vmcr & GICH_VMCR_BINPOINT_MASK) >> GICH_VMCR_BINPOINT_SHIFT;
 138         vmcrp->pmr  = (vmcr & GICH_VMCR_PRIMASK_MASK) >> GICH_VMCR_PRIMASK_SHIFT;
 139 }
 140
 141 static void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
 142 {
 143         u32 vmcr;
 144
 145         vmcr  = (vmcrp->ctlr << GICH_VMCR_CTRL_SHIFT) & GICH_VMCR_CTRL_MASK;
 146         vmcr |= (vmcrp->abpr << GICH_VMCR_ALIAS_BINPOINT_SHIFT) & GICH_VMCR_ALIAS_BINPOINT_MASK;
 147         vmcr |= (vmcrp->bpr << GICH_VMCR_BINPOINT_SHIFT) & GICH_VMCR_BINPOINT_MASK;
 148         vmcr |= (vmcrp->pmr << GICH_VMCR_PRIMASK_SHIFT) & GICH_VMCR_PRIMASK_MASK;
 149
 150         vcpu->arch.vgic_cpu.vgic_v2.vgic_vmcr = vmcr;
 151 }
 152
 153 static void vgic_v2_enable(struct kvm_vcpu *vcpu)
 154 {
 155         /*
 156          * By forcing VMCR to zero, the GIC will restore the binary
 157          * points to their reset values. Anything else resets to zero
 158          * anyway.
 159          */
 160         vcpu->arch.vgic_cpu.vgic_v2.vgic_vmcr = 0;
 161
 162         /* Get the show on the road... */
 163         vcpu->arch.vgic_cpu.vgic_v2.vgic_hcr = GICH_HCR_EN;
 164 }
 165
 166 static const struct vgic_ops vgic_v2_ops = {
 167         .get_lr                 = vgic_v2_get_lr,
 168         .set_lr                 = vgic_v2_set_lr,
 169         .sync_lr_elrsr          = vgic_v2_sync_lr_elrsr,
 170         .get_elrsr              = vgic_v2_get_elrsr,
 171         .get_eisr               = vgic_v2_get_eisr,
 172         .clear_eisr             = vgic_v2_clear_eisr,
 173         .get_interrupt_status   = vgic_v2_get_interrupt_status,
 174         .enable_underflow       = vgic_v2_enable_underflow,
 175         .disable_underflow      = vgic_v2_disable_underflow,
 176         .get_vmcr               = vgic_v2_get_vmcr,
 177         .set_vmcr               = vgic_v2_set_vmcr,
 178         .enable                 = vgic_v2_enable,
 179 };
 180
 181 static struct vgic_params vgic_v2_params;
 182
 183 /**
 184  * vgic_v2_probe - probe for a GICv2 compatible interrupt controller in DT
 185  * @node:       pointer to the DT node
 186  * @ops:        address of a pointer to the GICv2 operations
 187  * @params:     address of a pointer to HW-specific parameters
 188  *
 189  * Returns 0 if a GICv2 has been found, with the low level operations
 190  * in *ops and the HW parameters in *params. Returns an error code
 191  * otherwise.
 192  */
 193 int vgic_v2_probe(struct device_node *vgic_node,
 194                   const struct vgic_ops **ops,
 195                   const struct vgic_params **params)
 196 {
 197         int ret;
 198         struct resource vctrl_res;
 199         struct resource vcpu_res;
 200         struct vgic_params *vgic = &vgic_v2_params;
 201
 202         vgic->maint_irq = irq_of_parse_and_map(vgic_node, 0);
 203         if (!vgic->maint_irq) {
 204                 kvm_err("error getting vgic maintenance irq from DT\n");
 205                 ret = -ENXIO;
 206                 goto out;
 207         }
 208
 209         ret = of_address_to_resource(vgic_node, 2, &vctrl_res);
 210         if (ret) {
 211                 kvm_err("Cannot obtain GICH resource\n");
 212                 goto out;
 213         }
 214
 215         vgic->vctrl_base = of_iomap(vgic_node, 2);
 216         if (!vgic->vctrl_base) {
 217                 kvm_err("Cannot ioremap GICH\n");
 218                 ret = -ENOMEM;
 219                 goto out;
 220         }
 221
 222         vgic->nr_lr = readl_relaxed(vgic->vctrl_base + GICH_VTR);
 223         vgic->nr_lr = (vgic->nr_lr & 0x3f) + 1;
 224
 225         ret = create_hyp_io_mappings(vgic->vctrl_base,
 226                                      vgic->vctrl_base + resource_size(&vctrl_res),
 227                                      vctrl_res.start);
 228         if (ret) {
 229                 kvm_err("Cannot map VCTRL into hyp\n");
 230                 goto out_unmap;
 231         }
 232
 233         if (of_address_to_resource(vgic_node, 3, &vcpu_res)) {
 234                 kvm_err("Cannot obtain GICV resource\n");
 235                 ret = -ENXIO;
 236                 goto out_unmap;
 237         }
 238
 239         if (!PAGE_ALIGNED(vcpu_res.start)) {
 240                 kvm_err("GICV physical address 0x%llx not page aligned\n",
 241                         (unsigned long long)vcpu_res.start);
 242                 ret = -ENXIO;
 243                 goto out_unmap;
 244         }
 245
 246         if (!PAGE_ALIGNED(resource_size(&vcpu_res))) {
 247                 kvm_err("GICV size 0x%llx not a multiple of page size 0x%lx\n",
 248                         (unsigned long long)resource_size(&vcpu_res),
 249                         PAGE_SIZE);
 250                 ret = -ENXIO;
 251                 goto out_unmap;
 252         }
 253
 254         vgic->can_emulate_gicv2 = true;
 255         kvm_register_device_ops(&kvm_arm_vgic_v2_ops, KVM_DEV_TYPE_ARM_VGIC_V2);
 256
 257         vgic->vcpu_base = vcpu_res.start;
 258
 259         kvm_info("%s@%llx IRQ%d\n", vgic_node->name,
 260                  vctrl_res.start, vgic->maint_irq);
 261
 262         vgic->type = VGIC_V2;
 263         vgic->max_gic_vcpus = VGIC_V2_MAX_CPUS;
 264         *ops = &vgic_v2_ops;
 265         *params = vgic;
 266         goto out;
 267
 268 out_unmap:
 269         iounmap(vgic->vctrl_base);
 270 out:
 271         of_node_put(vgic_node);
 272         return ret;
 273 }