- ldr r0, _TEXT_BASE /* r0 <- Text base */
- sub r9, r7, r0 /* r9 <- relocation offset */
- ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
- add r10, r10, r0 /* r10 <- sym table in FLASH */
- ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
- add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
- ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
- add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
-fixloop:
- ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
- add r0, r9 /* r0 <- location to fix up in RAM */
- ldr r1, [r2, #4]
- and r8, r1, #0xff
- cmp r8, #23 /* relative fixup? */
- beq fixrel
- cmp r8, #2 /* absolute fixup? */
- beq fixabs
- /* ignore unknown type of fixup */
- b fixnext
-fixabs:
- /* absolute fix: set location to (offset) symbol value */
- mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
- add r1, r10, r1 /* r1 <- address of symbol in table */
- ldr r1, [r1, #4] /* r1 <- symbol value */
- add r1, r9 /* r1 <- relocated sym addr */
- b fixnext
-fixrel:
- /* relative fix: increase location by offset */
- ldr r1, [r0]
- add r1, r1, r9
-fixnext:
- str r1, [r0]
- add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
- cmp r2, r3
- blo fixloop
-#endif /* #ifndef CONFIG_PRELOADER */
-
-clear_bss:
-#ifndef CONFIG_PRELOADER
- ldr r0, _bss_start_ofs
- ldr r1, _bss_end_ofs
- ldr r3, _TEXT_BASE /* Text base */
- mov r4, r7 /* reloc addr */
- add r0, r0, r4
- add r1, r1, r4
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- bne clbss_l
-#endif /* #ifndef CONFIG_PRELOADER */
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_ONENAND_IPL
- ldr r0, _start_oneboot_ofs
- mov pc, r0
-
-_start_oneboot_ofs
- : .word start_oneboot
-#else
- ldr r0, _board_init_r_ofs
- adr r1, _start
- add lr, r0, r1
- add lr, lr, r9
- /* setup parameters for board_init_r */
- mov r0, r5 /* gd_t */
- mov r1, r7 /* dest_addr */
- /* jump to it ... */
- mov pc, lr
-
-_board_init_r_ofs:
- .word board_init_r - _start
-#endif /* CONFIG_ONENAND_IPL */
-
-_rel_dyn_start_ofs:
- .word __rel_dyn_start - _start
-_rel_dyn_end_ofs:
- .word __rel_dyn_end - _start
-_dynsym_start_ofs:
- .word __dynsym_start - _start
-
-#else /* CONFIG_PRELOADER */
-
-/****************************************************************************/
-/* */
-/* the actual reset code for OneNAND IPL */
-/* */
-/****************************************************************************/
-
-#ifndef CONFIG_PXA27X
-#error OneNAND IPL is not supported on PXA25x and 26x due to lack of SRAM
-#endif
-
-reset:
- /* Set CPU to SVC32 mode */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0x13
- msr cpsr,r0
-
- /* Point stack at the end of SRAM and leave 32 words for abort-stack */
- ldr sp, =0x5c03ff80
-
- /* Start OneNAND IPL */
- ldr pc, =start_oneboot
-
-#endif /* CONFIG_PRELOADER */