+commit cf7e399fb35b3aea90a27d1df72f45f5d6156204
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Jan 27 16:12:21 2009 -0500
+
+ SATA: do not auto-initialize during boot
+
+ Rather than have the board code initialize SATA automatically during boot,
+ make the user manually run "sata init". This brings the SATA subsystem in
+ line with common U-Boot policy.
+
+ Rather than having a dedicated weak function "is_sata_supported", people
+ can override sata_initialize() to do their weird board stuff. Then they
+ can call the actual __sata_initialize().
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 50970839712dda35399e2fa83fe818df9354d618
+Author: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+Date: Mon Jan 26 08:45:14 2009 -0500
+
+ part_efi: Fix partition size calculation due to inclusive ending LBA.
+
+ The ending LBA is inclusive. Hence, the partition size should be
+ ((ending-LBA + 1) - starting-LBA) to get the proper partition size.
+
+ This is confirmed against the results from the parted tool.
+ (e.g. use parted /dev/sda -s unit S print) and observe the size.
+
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+
+commit b5b004ad8a0ac6f98bd5708ec8b22fbddd1c1042
+Author: Tomasz Figa <tomasz.figa@gmail.com>
+Date: Tue Dec 30 18:35:57 2008 +0100
+
+ jffs2: Fix zero sector_size when not using CONFIG_JFFS2_CMDLINE
+
+ This patch fixes a bug (?) introduced after inclusion of the new
+ JFFS2 code.
+
+ When not using CONFIG_JFFS2_CMDLINE, the code in cmd_jffs2.c doesn't
+ fill in part->sector_size (keeping it as 0), but a correct value is
+ needed by the code in jffs2_1pass.c. This causes all JFFS2 accesses
+ to be in the same place of the memory, what obviously means
+ impossibility to use the JFFS2 partition.
+
+ This problem is fixed in this patch by including sector size
+ calculation in non-CONFIG_JFFS2_CMDLINE mtdparts_init variant.
+
+ Signed-off-by: Tomasz Figa <tomasz.figa_at_gmail.com>
+
+commit ba69dc26a5fd606da49573bb2f15e756a34f3f98
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Dec 30 02:59:25 2008 -0500
+
+ saveenv: standardize enablement
+
+ Rather than special casing each environment type for enabling the saveenv
+ command, have them all behave the same. This avoids bitrot as new env
+ sources are added/removed.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 2ac6985a7466a1c8a7aa8b2fa24d360925a82764
+Author: Andrew Dyer <adyer@righthandtech.com>
+Date: Mon Dec 29 17:36:01 2008 -0600
+
+ soft_i2c.c add option for repeated start in i2c_read()
+
+ This patch adds a #define to optionally change the behaviour of
+ i2c_read() in soft_i2c.c to send an I2C repeated start instead of a
+ stop-start between sending the device address pointer write and
+ reading back the data. The current behaviour is retained as the
+ default.
+
+ While most devices will work either way, I have a smart battery(*)
+ that requires repeated start, and someone at some point found a
+ device that required a stop-start.
+
+ (*) http://www.inspired-energy.com/Standard_Products/NL2054/NL2054%20Rev1.0%20Data%20Sheet.pdf
+
+ Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
+
+commit 3429071700963ca2f944c51d695a7481af0cee33
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Jan 27 22:07:14 2009 +0100
+
+ {delta,zylonite}/lowlevel_init.S: fix typo
+
+ Commit 9d803d8c mistakenly changed some constants
+ from 0x300 into 300 - this patch fixes it.
+
+ Pointed out by Tom Evans <tom@ceos.com.au>, see
+ http://article.gmane.org/gmane.comp.boot-loaders.u-boot/51992 for
+ details.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 1bc434373013af241835c14011ac3f291dccbf53
+Author: Stefan Althoefer <stefan.althoefer@web.de>
+Date: Sat Dec 20 19:40:41 2008 +0100
+
+ drivers/net/e1000.c: missing terminator for supported devices
+
+ Signed-off-by: Stefan Althoefer <stefan.althoefer@web.de>
+
+commit 65f7d41031a70b1649b35020995c505edca91533
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Jan 27 21:36:28 2009 +0100
+
+ fat.c: fix warning: array subscript is above array bounds
+
+ Fix based on suggestion by David Hawkins <dwh@ovro.caltech.edu>.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 107b801cf3fe39612d69d70581ebc3bf5e215554
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Jan 2 15:11:41 2009 +0100
+
+ Fix gunzip in case of insufficient output buffer
+
+ U-Boot's gunzip() function does not handle the return code
+ of zlib's inflate() function correctly. gunzip() is implemented
+ to uncompress all input data in one run. So the correct return
+ code for the good case is Z_STREAM_END. In case of insufficient
+ output buffer memory inflate returns Z_OK. For gunzip() this
+ is an error.
+
+ It also makes sense to me to call inflateEnd() also in case
+ of an error.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 2a61eff6a82f0d6e2335d968799b3fbeb3ff4d8e
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 21 17:25:01 2009 +0100
+
+ MIPS: Add VCT board series support (Part 3/3)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ae691e5719c48f1d2826cb72722497d1d162765b
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 21 17:24:49 2009 +0100
+
+ MIPS: Add VCT board series support (Part 2/3)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 50752790bc9285c0c1c5235e88f3a4ef2eec1e72
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 21 17:24:39 2009 +0100
+
+ MIPS: Add VCT board series support (Part 1/3)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 03d3bfb00806b5441f1871c7408c1749863e0fdc
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 21 17:20:20 2009 +0100
+
+ MIPS: Add flush_dcache_range() and invalidate_dcache_range()
+
+ This patch adds flush_/invalidate_dcache_range() to the MIPS architecture.
+ Those functions are needed for the upcoming dcache support for the USB
+ EHCI driver. I chose this API because those cache handling functions are
+ already present in the PPC architecture.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit e8eac437189430d8e04a5d254ed92c58bc534a79
+Author: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+Date: Wed Jan 14 08:44:26 2009 -0500
+
+ CFI: Add geometry reversal for STMicro M29W320ET
+
+ Added flash_fixup_stm to fix geometry reversal on STMicro M29W320ET flash chip.
+
+ Modeled after flash_fixup_amd, this patch handles the geometry reversal
+ or erase sectors that exist for ST Micro (now Numonyx) M29W320ET flash.
+ Since I cannot test all STM's chips, the detection is implemented as
+ narrow as possible for now.
+
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0f8e851e897b535959a0781171910cd97f33c30c
+Author: Jens Gehrlein <sew_s@tqs.de>
+Date: Tue Dec 16 17:25:55 2008 +0100
+
+ CFI: increase performance of function find_sector()
+
+ Tested on TQM5200S-BD with Samsung K8P2815UQB
+
+ Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a7292871a79cc48d98e3a708dd3c3b81580db6ef
+Author: Jens Gehrlein <sew_s@tqs.de>
+Date: Tue Dec 16 17:25:54 2008 +0100
+
+ CFI: avoid redundant function call in single word programming mode
+
+ The function find_sector() doesn't need to be called twice in
+ the case of AMD command set.
+ Tested on TQM5200S-BD with Samsung K8P2815UQB.
+
+ Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c8901f46a71ec16e084e604596a09e23bfb0f6ac
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jan 26 10:15:23 2009 +0100
+
+ ppc4xx: Remove compilation warning in gdppc440etc.c
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 91f33534728e6416d332ad2b53ad1d6fde57f7fc
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Jan 2 12:19:47 2009 +0100
+
+ ppc4xx: Remove CONFIG_SYS_IGNORE_405_UART_ERRATA_59 from config files
+
+ Lot's of 405 board config files use CONFIG_SYS_IGNORE_405_UART_ERRATA_59.
+ Either they define or undef it. Because it's not used in any source
+ files this patch removes any references to it.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 89b8619aaeafc922ca0c3bb249872591050c8dcc
+Author: Dirk Eibach <eibach@gdsys.de>
+Date: Tue Dec 9 13:12:40 2008 +0100
+
+ ppc4xx: Add GDsys PowerPC 440 ETX board support.
+
+ Board support for the Guntermann & Drunck PowerPC 440 ETX module.
+ Based on the AMCC Yosemite board support by Stefan Roese.
+
+ Signed-off-by: Dirk Eibach <eibach@gdsys.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3943d2ff6cc40dd601a9feeb39eb6d3d5090ea6d
+Author: Dirk Eibach <eibach@gdsys.de>
+Date: Tue Dec 9 11:00:07 2008 +0100
+
+ ppc4xx: Improve DDR autodetect
+
+ Added support for a second memory bank to DDR autodetection for 440
+ platforms.
+ Made hardcoded values configurable.
+
+ Signed-off-by: Dirk Eibach <eibach@gdsys.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 24113a44ed5cd3257a0237c3961e121812fca6db
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Dec 30 03:15:38 2008 -0500
+
+ easylogo: add optional gzip support
+
+ Some images can be quite large, so add an option to compress the
+ image data with gzip in the U-Boot image. Then at runtime, the
+ board can decompress it with the normal zlib functions.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 7e4b9b4f6f43838fad3ad72c029a3d7fc7c7d48c
+Author: Bryan Wu <bryan.wu@analog.com>
+Date: Fri Jan 2 20:47:45 2009 -0500
+
+ fat: fix unaligned errors
+
+ A couple of buffers in the fat code are declared as an array of bytes.
+ But it is then cast up to a structure with 16bit and 32bit members.
+ Since GCC assumes structure alignment here, we have to force the
+ buffers to be aligned according to the structure usage.
+
+ Signed-off-by: Bryan Wu <bryan.wu@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 68f8718df2ed4c2f43031407ccf6cfa81125dddc
+Author: Brad Bozarth <bflinux@yumbrad.com>
+Date: Thu Jan 1 22:45:47 2009 -0500
+
+ spi flash: fix crash due to spi flash miscommunication
+
+ Higher spi flash layers expect to be given back a pointer that was
+ malloced so that it can free the result, but the lower layers return
+ a pointer that is in the middle of the malloced memory. Reorder the
+ members of the lower spi structures so that things work out.
+
+ Signed-off-by: Brad Bozarth <bflinux@yumbrad.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit ce82ff05388b5ddafdf6082ef0776cce72c40b1c
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Sat Dec 20 14:54:21 2008 +0300
+
+ FPU POST: fix warnings when building with 2.18 binutils
+
+ When compile u-boot with the 2.18 binutils the following
+ warning messages for each object file in post/lib_ppc/fpu/ is
+ produced at the linking stage:
+
+ post/libpost.a(acc1.o) uses hard float, u-boot uses soft-float
+ ...
+
+ This is because of the fact that, in general, the soft-float and
+ hard-float ABIs are incompatible; the 2.18 binutils do checking
+ of the Tag_GNU_Power_ABI_FP attribute of the files to be linked, and
+ produce the worning like above if these are not compatible.
+
+ The incompatibility of ABIs is concerned only the float values:
+ e.g. the soft-float ABI assumes the float argument passing in the
+ pair of rX registers, and the hard-float ABI assumes passing of
+ the float argument in the fX register. When we don't pass the float
+ arguments between the functions compiled with different floatness,
+ then such an application will work correctly.
+ This is the case for the FPU POST: u-boot (compiled with soft-float)
+ doesn't pass to (and doesn't get from) the FPU POST functions any
+ floats; there are no functions exported from the post/lib_ppc/fpu/
+ objects which would work with float parameters/returns too. So, we
+ can reassure the linker not to worry about the difference in ABI
+ attributes of linking files just by setting the 'soft-float'
+ attribute for the objects in post/lib_ppc/fpu. And this patch does
+ this.
+
+ Also, to avoid passing both soft- and hard-float options in CFLAGS
+ when compiling the files from post/lib_ppc/fpu (which is OK, but
+ looks rather dirty) this patch removes the soft-float string from
+ CFLAGS in post/lib_ppc/fpu/Makefile.
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+
+commit a7c9310457e85b4598abe5b304108edf11332e2f
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Dec 17 16:36:22 2008 -0600
+
+ Add support for Maxim's DS4510 I2C device
+
+ Initial support for the DS4510, a CPU supervisor with
+ integrated EEPROM, SRAM, and 4 programmable non-volatile
+ GPIO pins. The CONFIG_DS4510 define enables support
+ for the device while the CONFIG_CMD_DS4510 define
+ enables the ds4510 command. The additional
+ CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and
+ CONFIG_DS4510_RST defines add additional sub-commands
+ to the ds4510 command when defined.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit b6fc6fd49a84543e1324e1620b9f301ff7c1f27f
+Author: Dirk Eibach <eibach@gdsys.de>
+Date: Tue Dec 16 14:51:56 2008 +0100
+
+ common: Iteration limit for memory test.
+
+ The iteration limit is passed to mtest as a fourth parameter:
+ [start [end [pattern [iterations]]]]
+ If no fourth parameter is supplied, there is no iteration limit and the
+ test will loop forever.
+
+ Signed-off-by: Dirk Eibach <eibach@gdsys.de>
+
+commit 97cae3a4c68d856374ccc70fd2c5f8714cc94f7d
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Dec 15 15:40:12 2008 +0100
+
+ serial: Rename driver vcth to vct to support other board variants
+
+ Moved driver vcth.c to vct.c to better reflect the VCT board series.
+ This driver is now used by the VCT platforms:
+
+ vct_premium
+ vct_platinum
+ vct_platinumsvc
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 36ede4d63e59c9277ec180b09c39b8bf46425ba2
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Fri Dec 12 00:45:27 2008 +0900
+
+ nios: Move README.nios_CONFIG_SYS_NIOS_CPU to doc/ dir
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit c3284b030b1cd492b4f46c576aea01bef258599d
+Author: Peter Korsgaard <jacmet@sunsite.dk>
+Date: Wed Dec 10 16:24:16 2008 +0100
+
+ common/main: support bootdelay=0 for CONFIG_AUTOBOOT_KEYED
+
+ Support bootdelay=0 in abortboot for the CONFIG_AUTOBOOT_KEYED case
+ similar to the CONFIG_ZERO_BOOTDELAY_CHECK support for the
+ !CONFIG_AUTOBOOT_KEYED case.
+
+ Do this by reversing the loop so we do at least one iteration before
+ checking for timeout.
+
+ Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
+
+commit 94f9279f7bbdc01bbc7cf85aedf9b545943b94c3
+Author: Niklaus Giger <niklaus.giger@netstal.com>
+Date: Mon Dec 8 17:24:08 2008 +0100
+
+ Added legacy flash ST Micro M29W040B
+
+commit 626d07348e5f9f302f4ea182161a89f7362a0488
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Mon Dec 8 20:04:51 2008 +1100
+
+ Fixed off-by-one errors in lib_m68k/interrupts.c
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit a5989c42ae5e295f274a795c426c47819bbdbfda
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sun Dec 7 10:29:05 2008 +1100
+
+ Removed all references to CONFIG_SYS_RESET_GENERIC
+
+ Generic i386 reset - #define made redundant by weak function
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 2b5360eb2bc0b741ae5cb3c84d35ccdd17667c8a
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sun Dec 7 10:29:04 2008 +1100
+
+ Remove #ifdef CONFIG_SC520 in source code
+
+ CONFIG_SC520 is now used for conditional compile
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit ead056bc206f6b7ee6dc98766678b64635ea20b8
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sun Dec 7 10:29:03 2008 +1100
+
+ Added MMCR reset functionality
+
+ Reset function specific to AMD SC520 microcontroller - Is more of a
+ 'hard reset' that the triple fault.
+
+ Requires CONFIG_SYS_RESET_SC520 to be defined in config
+
+ I would have liked to add this to a new file (cpu/i386/sc520/reset.c)
+ but ld requires that a object file in a library arhive MUST contain
+ at least one function which does not override a weak function (and is
+ called from outside the object file) in order for that object file to
+ be extracted from the archive. This would be the only function on the
+ new file, and hence, will never get linked in.
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 3f5f18d12d32ee0661bf51dfc55752c005230d6e
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sun Dec 7 10:29:02 2008 +1100
+
+ Moved generic (triple fault) reset code
+
+ Moved from interrupts.c to cpu.c and made into a weak function to
+ allow vendor specific override
+
+ Vendor specific CPU reset (like the AMD SC520 MMCR reset) can now be
+ added to the vendor specific code without the need to remember to
+ #undef usage of the generic method and if you forget to include your
+ custom reset method, you will always get the default.
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 9933d609020c297788f53f334c8465fa7a99b10c
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sun Dec 7 10:29:01 2008 +1100
+
+ Moved definition of set_vector() to new header file
+
+ This allows for future tidy ups and functionality that will require
+ set_vector ()
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 407976185e0dda2c90e89027121a1071b9c77bfb
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sun Dec 7 10:29:00 2008 +1100
+
+ Moved sc520 specific code into new cpu/i386/sc520 folder
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 85ffbbd51914925a542d8528be7f072e5ab02157
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sun Dec 7 10:28:58 2008 +1100
+
+ Renamed cpu/i386/reset.S to resetvec.S
+
+ Brings i386 in line with other CPUs with a reset vector and frees up reset.c
+ for CPU reset functions
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit a3f4c123f569474e80ea012b8db0de46afdb6443
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Jan 24 01:01:49 2009 +0100
+
+ Makefile: keep lists sorted.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c620c01e96814558470698ed5cab1bf2f504d1b5
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sun Dec 7 10:28:57 2008 +1100
+
+ Added initial eNET board support
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 0c0ccf401ee03a5008fc2c19b05a662bce1a1086
+Author: Gary Jennejohn <garyj@denx.de>
+Date: Thu Nov 20 11:37:26 2008 +0100
+
+ POWERPC 82xx: add the SCC as an HDLC controller
+
+ Right now this is only used by keymile.
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+
+commit 1e8f4e78ca393b3d8e86bd8055758dd465d9113f
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Nov 20 09:59:09 2008 +0100
+
+ powerpc, keymile boards: extract identical config options
+
+ This patch extracts the identical config options for the
+ keymile boards mgcoge, mgsuvd and kmeter1 in a new
+ common config file keymile-common.h.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 210c8c00aad3328145204adab434bb7d70b06b75
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Nov 21 08:29:40 2008 +0100
+
+ powerpc: keymile: Add a check for the PIGGY debug board
+
+ Check the presence of the PIGGY on the keymile boards mgcoge,
+ mgsuvd and kmeter1. If the PIGGY is not present, dont register
+ this Ethernet device.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Acked-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit de0443614af4d16675ab436665aeb11ddc9f7214
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Nov 20 09:57:47 2008 +0100
+
+ powerpc: 83xx: add support for the kmeter1 board
+
+ This patch adds support for the kmeter1 board from Keymile,
+ based on a Freescale MPC8360 CPU.
+
+ - serial console on UART 1
+ - 256 MB DDR2 RAM
+ - 64 MB NOR Flash
+ - Ethernet RMII Mode over UCC4
+ - PHY SMSC LAN8700
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 3feb647f3fd0881382c7a29f4cf280b66473ae0a
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Tue Nov 4 13:51:18 2008 +0100
+
+ Add a do_div() wrapper macro, lldiv().
+
+ Add a do_div() wrapper, lldiv(). The new inline function doesn't modify
+ the dividend and returns the result of division, so it is useful
+ in complex expressions, i.e. "return(a/b)" -> "return(lldiv(a,b))"
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 18af1c5f0f7402dc0d6a71b012c68025dd97cf72
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Jan 23 14:22:14 2009 -0600
+
+ 85xx: Add a 36-bit physical configuration for MPC8572DS
+
+ We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
+ to allow for larger memory sizes.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c51fc5d53c4560abc4d0a6126c06fc68133d1528
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Jan 23 14:22:13 2009 -0600
+
+ 85xx: Handle eLBC difference w/36-bit physical
+
+ The eLBC only handles 32-bit physical address in systems with 36-bit
+ physical. The previos generation of LBC handled 34-bit physical
+ address in 36-bit systems. Added a new CONFIG option to convey
+ the difference between the LBC and eLBC.
+
+ Also added defines for XAM bits used in LBC for the extended 34-bit
+ support.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 72a9414a8e21e9536822c7353bc08d21ce5ad53d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Jan 23 14:22:12 2009 -0600
+
+ 85xx: Use BR_ADDR macro for NAND chipselects
+
+ Use the new BR_ADDR macro to properly setup the address field of the
+ localbus chipselects used by NAND.
+
+ This allows us to deal with 36-bit phys on these boards in the future.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 2fc7eb0cfc608c9369001d57a0411af5e6a58f7c
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Thu Jan 15 11:58:35 2009 -0500
+
+ Add secondary CPUs processor frequency for e500 core
+
+ This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS,
+ and prints each CPU's frequency separately. It also fixes up each CPU's
+ frequency in "clock-frequency" of fdt blob.
+
+ Signed-off-by: James Yang <James.Yang@freescale.com>
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit bf5b1f0c0d28ce062e1d368680632dfb099de692
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Nov 21 16:31:53 2008 +0800
+
+ 85xx: enable the auto self refresh for wake up ARP
+
+ The wake up ARP feature need use the memory to process
+ wake up packet, we enable auto self refresh to support it.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit b4983e16d150ab7d039704c310aacbd2f4dc1e0f
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Nov 21 16:31:43 2008 +0800
+
+ fsl-ddr: use the 1T timing as default configuration
+
+ For light loaded system, we use the 1T timing to gain better
+ memory performance, but for some heavily loaded system,
+ you have to add the 2T timing options to board files.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 22cca7e1cd54590e967c73558b07ffbdccd39504
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Nov 21 16:31:35 2008 +0800
+
+ fsl-ddr: make the self refresh idle threshold configurable
+
+ Some 85xx processors have the advanced power management feature,
+ such as wake up ARP, that needs enable the automatic self refresh.
+
+ If the DDR controller pass the SR_IT (self refresh idle threshold)
+ idle cycles, it will automatically enter self refresh. However,
+ anytime one transaction is issued to the DDR controller, it will
+ reset the counter and exit self refresh state.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 22ff3d01348e0a2dc369b7efcbac30e4ce86d178
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Nov 21 16:31:29 2008 +0800
+
+ fsl-ddr: clean up the ddr code for DDR3 controller
+
+ - The DDR3 controller is expanding the bits for timing config
+ - Add the DDR3 32-bit bus mode support
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 80ee3ce6d7fe9441b4352d7cfaf6afc2507b1106
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Nov 21 16:31:22 2008 +0800
+
+ fsl-ddr: update the bit mask for DDR3 controller
+
+ According to the latest 8572 UM, the DDR3 controller
+ is expanding the bit mask, and we use the extend ACTTOPRE
+ mode when tRAS more than 19 MCLK.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit aca5f018a8386b85469482ed9867e3e29a2437d0
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 2 16:08:40 2008 -0600
+
+ 85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boards
+
+ Introduce a new define to seperate out the virtual address that PCI
+ IO space is at from the physical address. In most situations these are
+ mapped 1:1. However any code accessing the bus should use VIRT.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 5af0fdd81c3370c3a51421208fda568bdcbbec23
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 2 16:08:39 2008 -0600
+
+ 85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boards
+
+ Introduce a new define to seperate out the virtual address that PCI
+ memory is at from the physical address. In most situations these are
+ mapped 1:1. However any code accessing the bus should use VIRT.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit a6e04c344ad1eefd47a75484441b385da815b8df
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 2 16:08:38 2008 -0600
+
+ 85xx: Use CONFIG_SYS_{PCI*,RIO*}_MEM_PHYS for physical address on FSL boards
+
+ Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields
+ of TLBs. This is what we should have always been using from the start.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 5f91ef6acdbadec33e0192049e2b24a1d9692f1d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 2 16:08:37 2008 -0600
+
+ 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards
+
+ Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead
+ of _IO_BASE so we are more explicit.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 10795f42cb94e71bcb262b615084f69dd886399a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 2 16:08:36 2008 -0600
+
+ 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards
+
+ Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead
+ of _MEM_BASE so we are more explicit.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit c953ddfd56b3ae3f28910fe3aed6de6968d1c9aa
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 2 14:19:34 2008 -0600
+
+ 85xx: separate FLASH BASE virtual from physical address
+
+ Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and
+ maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash.
+
+ This allows us to deal with 36-bit phys on these boards in the future.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 52b565f5ad23b682489055b187767d8bf1c2e444
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 2 14:19:33 2008 -0600
+
+ 85xx: separate PIXIS virtual from physical address
+
+ Added a PIXIS_BASE_PHYS for use as the physical address and maintain
+ PIXIS_BASE as the virtual address of the PIXIS fpga registers.
+
+ This allows us to deal with 36-bit phys on these boards in the future.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 30837e5b21d5a742983581ab9ee3fac085311d19
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Tue Nov 11 08:52:09 2008 -0500
+
+ Add README file for MPC8572DS board
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 6dadc9195ad642cc662632f4d92f92d3d71e8bf2
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Oct 20 16:15:04 2008 -0400
+
+ Blackfin: use common strmhz() in system output
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 5bb907a4925397789c90d074f4f7e92ce6b39402
+Author: Ron Madrid <ron_madrid@sbcglobal.net>
+Date: Thu Jan 22 15:05:24 2009 -0800
+
+ mpc83xx: New board support for SIMPC8313
+
+ This patch will create a new board, SIMPC8313, from Sheldon Instruments. This
+ board boots from NAND devices and is configureable for either large or small
+ page devices. The board supports non-soldered DDR2, one ethernet port, a
+ Marvell 88E1118 PHY, and PCI host support. The board also has a FPGA connected
+ to the eLBC providing glue logic to a TMS320C67xx DSP.
+
+ Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit d4bade8d77aa20e2846fa4accff0e7fa7961a134
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sun Jan 18 19:46:06 2009 -0500
+
+ nand: fixup printf modifiers to match types used
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 389e6620e2271096df3316917528003627db4021
+Author: Schlaegl Manfred jun <manfred.schlaegl@gmx.at>
+Date: Tue Jan 20 16:57:55 2009 +0100
+
+ nand read.jffs2 (nand_legacy) in common/cmd_nand.c
+
+ Error with CONFIG_NAND_LEGACY in common/cmd_nand.c:
+ With current code "nand read.jffs2s" (read and skip bad blocks) is always interpreted as
+ "nand read.jffs2" (read and fill bad blocks with 0xff). This is because ".jffs2" is
+ tested before ".jffs2s" and only the first two characters are compared.
+
+ Correction:
+ Test for ".jffs2s" first and compare the first 7 characters.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 6c869637fef31e66380f0ea1d49690a2e26ec0d7
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Fri Jan 16 18:55:54 2009 +0100
+
+ NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS
+
+ This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
+ changes the default from 8 to 1 for the legacy and the new MTD
+ NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
+ in the board config files because none of the boards use multi
+ chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
+ define
+
+ #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
+
+ but that's bogus and did not work anyhow.
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit c70564e6b1bd08f3230182392238907f3531a87e
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Dec 2 11:48:51 2008 +0800
+
+ NAND: Fix cache and memory inconsistency issue
+
+ We load the secondary stage u-boot image from NAND to
+ system memory by nand_load, but we did not flush d-cache
+ to memory, nor invalidate i-cache before we jump to RAM.
+ When the system has cache enabled and the TLB/page attribute
+ of system memory is cacheable, it will cause issues.
+
+ - 83xx family is using the d-cache lock, so all of d-cache
+ access is cache-inhibited. so you can't see the issue.
+ - 85xx family is using d-cache, i-cache enable, partial
+ cache lock. you will see the issue.
+
+ This patch fixes the cache issue.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 50657c273278f74378e1ac39b41d612b92fdffa0
+Author: Nishanth Menon <menon.nishanth@gmail.com>
+Date: Sat Dec 13 09:43:06 2008 -0600
+
+ NAND: Enable nand lock, unlock feature
+
+ Enable nand lock, unlock and status of lock feature.
+ Not every device and platform requires this, hence,
+ it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK
+
+ Nand unlock and status operate on block boundary instead
+ of page boundary. Details in:
+ http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT
+
+ Intial solution provided by Vikram Pandita <vikram.pandita@ti.com>
+ Includes preliminary suggestions from Scott Wood
+
+ Signed-off-by: Nishanth Menon <nm@ti.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 69fb8be4fc07162fdf6edf04bdc7233b0e9a920e
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sat Dec 6 02:40:55 2008 -0500
+
+ NAND: move board_nand_init to nand.h
+
+ Rather than putting the function prototype for board_nand_init() in the one
+ place where it gets called, put it into nand.h so that every place that also
+ defines it gets the prototype. Otherwise, errors can go silently unnoticed
+ such as using the wrong return value (void rather than int) when defining
+ the function.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 1ae39862044ebb1e682234b51f94421e3f871d6a
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Dec 2 11:06:47 2008 +0100
+
+ OneNAND: Additional sync with 2.6.27
+
+ - Add subpage write support
+ - Add onenand_oob_64/32 ecclayout
+
+ This has been missing and without it UBI has some incompatibilies issues
+ with the current (>= 2.6.27) Linux kernel version. vid_hdr_offset is
+ placed differently (2048 instead of 512) without this fix.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 1714f51a2009baaecf3d4f6e3bd8c4e93a8d3f23
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Thu Nov 13 15:14:33 2008 +0900
+
+ Add markbad function
+
+ Add missing markbad function
+ If not, it's hang when it entered the mtd->mark_bad().
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit c438ea175d8d002c1063b7a94b0c0e26668d1ac9
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 12 13:47:24 2008 +0100
+
+ OneNAND: Bad block aware read/write command support
+
+ Update OneNAND command to support bad block awareness.
+ Also change the OneNAND command style to better match the
+ NAND version.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit 8cf11f3aa78673730e9ecbbe4b75213b53f212c8
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 11 10:29:09 2008 +0100
+
+ OneNAND: Save version_id in onenand_chip struct
+
+ The version (ver_id) was not stored in the onenand_chip structure and
+ because of this the continuous locking scheme could be enabled on some
+ chips.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4fca3310d611cc0f51d7295ef3557afbdbd91dc3
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 11 10:28:53 2008 +0100
+
+ OneNAND: Fix compiler warnings
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1ac5744e33ee0aa6d6ddab3b99f9e70953156e69
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Nov 4 14:55:06 2008 +0800
+
+ mpc83xx: enable eLBC NAND support for MPC8315ERDB board
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit ef0921d6b05aeb9034158f9bef5323d6da9c925e
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Tue Nov 4 09:24:07 2008 +0900
+
+ Sync with 2.6.27
+
+ Sync with OneNAND kernel codes
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit e7f325be9edeb84bb457301776bbac1f7257dafc
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon Jan 5 13:35:31 2009 +0100
+
+ microblaze: Use cache functions (especially cache status)
+ in systems which are configured without flash
+
+commit e9b737deb2c30125362d20e24170617476026e94
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon Jan 5 13:29:32 2009 +0100
+
+ microblaze: Add cache flush
+
+commit b4f8dda35bfad447b4106828232705b2e878d168
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon Jan 5 13:28:40 2009 +0100
+
+ microblaze: Add bootup messages to board.c
+
+commit 330e55459bc9983341da6c1d5c7fe00a664436fe
+Author: Michal Simek <monstr@monstr.eu>
+Date: Fri Dec 19 13:25:55 2008 +0100
+
+ microblaze: Change microblaze-generic config file
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 52a822ed9c37a2ea0ed112a26d8ff5a6cb1c6f10
+Author: Michal Simek <monstr@monstr.eu>
+Date: Fri Dec 19 13:14:05 2008 +0100
+
+ microblaze: Rename ml401 to microblaze-generic
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 6677876181cc8772bca8a372479a500d160f3993
+Author: Scott Wood <scottwood@freescale.com>
+Date: Tue Jan 20 11:56:11 2009 -0600
+
+ 83xx: Use the proper sequence for updating IMMR.
+
+ This ensures that subsequent accesses properly hit the new window.
+
+ The dcbi during the NAND loop was accidentally working around this;
+ it's no longer necessary, as the cache is not enabled.
+
+ Reported-by: Suchit Lepcha <Suchit.Lepcha@freescale.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 8b34557c546e5e9f34ebf83c93413dad973d93df
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Jan 8 04:26:19 2009 +0300
+
+ mpc83xx: Add PCI-E support for MPC837XEMDS boards
+
+ MPC837XEMDS boards can support PCI-E via "PCI-E riser card". The card
+ provides two PCI-E (x2) ports. Though, only one port can be used in x2
+ mode. Two ports can function simultaneously in x1 mode.
+
+ PCI-E x1/x2 modes can be switched via "pex_x2" environment variable.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 8f11e34b31a7be124a3239653f33af9510502045
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Jan 8 04:26:17 2009 +0300
+
+ mpc83xx: Add PCI-E support for MPC8315ERDB boards
+
+ MPC8315ERDB boards features PCI-E x1 and Mini PCI-E x1 ports. Let's
+ support them.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit fd6646c0b9ebe7e5afc4ae4c78097d9cd317a5e8
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Jan 8 04:26:12 2009 +0300
+
+ mpc83xx: Add support for MPC83xx PCI-E controllers
+
+ This patch adds support for MPC83xx PCI-E controllers in Root Complex
+ mode.
+
+ The patch is based on Tony Li and Dave Liu work[1].
+
+ Though unlike the original patch, by default we don't register PCI-E
+ buses for use in U-Boot, we only configure the controllers for future
+ use in other OSes (Linux). This is done because we don't have enough
+ of spare BATs to map all the PCI-E regions.
+
+ To actually use PCI-E in U-Boot, users should explicitly define
+ CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
+ only then U-Boot will able to access PCI-E, but at the cost of disabled
+ address translation.
+
+ [1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html
+
+ Signed-off-by: Tony Li <tony.li@freescale.com>
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Acked-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 88ecf55cabd7aea28fe8093720e208f53ccfdcf5
+Author: Ira Snyder <iws@ovro.caltech.edu>
+Date: Mon Jan 12 13:33:17 2009 -0800
+
+ MPC8349EMDS: do not setup unused PCI clock outputs in PCI agent mode
+
+ When running in PCI agent mode, the PCI_CLK_OUT signals are not used, so do
+ not enable them. See the MPC8349EA Reference Manual, Section 4.4.2
+ "Clocking in PCI Agent Mode".
+
+ Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 75f35209f702bb26826855ed8c8e4d108ab5f412
+Author: Ira Snyder <iws@ovro.caltech.edu>
+Date: Mon Jan 12 13:32:26 2009 -0800
+
+ 83xx: PCI agent mode fixes for multi-board systems
+
+ When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
+ the boards will lock up the PCI bus by scanning against each other.
+
+ The boards lock against each other by trying to access the PCI bus before
+ clearing their configuration lock bit. Both boards end up in a loop,
+ sending and receiving "Target Not Ready" messages forever.
+
+ When running in PCI agent mode, the scanning now takes place after the
+ boards have cleared their configuration lock bit.
+
+ Also, add a missing declaration to the mpc83xx.h header file, fixing a
+ build warning.
+
+ Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 455a46915b82896cc2070eb326d075555c2bc580
+Author: Ron Madrid <ron_madrid@sbcglobal.net>
+Date: Fri Dec 12 13:12:45 2008 -0800
+
+ mpc83xx: Size optimization of start.S
+
+ Currently there are in excess of 100 bytes located at the beginning of the image
+ built by start.S that are not being utilized. This patch moves a few functions
+ into this part of the image. This will create a greater number of *available*
+ bytes that can be used by board specific code in NAND builds and will decrease
+ the size of the assembled code in other builds.
+
+ Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 72d15e705bc3983884105cb7755c7ba80e74a0a5
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jan 21 23:08:12 2009 +0100
+
+ Prepare v2009.01
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 635e5f8fc82365e6e9734b3132bc95135a6de679
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jan 18 21:37:48 2009 +0100
+
+ Prepare 2009.01-rc3
+
+ Update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 4cda437898f7873752f0201757cd33f12196ce87
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sat Jan 17 13:32:42 2009 -0500
+
+ build system: treat all Darwin's alike
+
+ The x86 based version of Darwin behaves the same quirky way as the powerpc
+ Darwin, so only check HOSTOS when setting up Darwin workarounds.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit c088a108c75db565e07292fd668dfa5491e85bc2
+Author: Peter Korsgaard <jacmet@sunsite.dk>
+Date: Wed Jan 14 13:52:24 2009 +0100
+
+ fdt_resize(): fix actualsize calculations with unaligned blobs
+
+ The code in fdt_resize() to extend the fdt size to end on a page boundary
+ is wrong for fdt's not located at an address aligned on a page boundary.
+ What's even worse, the code would make actualsize shrink rather than grow
+ if (blob & 0xfff) was bigger than the amount of padding added by ALIGN(),
+ causing fdt_add_mem_rsv to fail.
+
+ Fix it by aligning end address (blob + size) to a page boundary instead.
+ For aligned fdt's this is equivalent to what we had before.
+
+ Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
+
+commit fadad1573fb16c90025f08a2861d6047d093cba7
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Jan 9 04:38:17 2009 -0500
+
+ ncb: use socklen_t
+
+ The recvfrom() function takes a socklen_t, not an int.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit fc83c9273cec6e6e542f4a0ea3b653b7d0513ffa
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Jan 11 16:35:16 2009 +0100
+
+ sh: serial: use readx/writex accessors
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 9e1fa628bdb64745811cdd26c4f953846c076180
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Jan 11 16:35:15 2009 +0100
+
+ sh: serial: coding style cleanup
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit c9935c992575922b7ef13eec0656ed8665d324e3
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Sun Jan 11 17:48:56 2009 +0900
+
+ sh: Fix compile error on lowlevel_init file
+
+ lowlevel_init of SH was corrected to use the write/readXX macro.
+ However, there was a problem that was not able to be compiled partially.
+ This patch corrected this.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit a5b04d00bfeb940c62232972ce644d50b45797f9
+Author: Kieran Bingham <kieranbingham@gmail.com>
+Date: Tue Dec 30 01:16:03 2008 +0000
+
+ sh: Fix up rsk7203 target for out of tree build
+
+ Fix up rsk7203 target to build successfully using out-of-tree build.
+
+ Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit f7e78f3b74aae9caca2997bad865a72338326c0a
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Dec 20 19:29:49 2008 +0100
+
+ sh: use write{8,16,32} in all lowlevel_init
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit e4430779623af500de1cee7892c379f07ef59813
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Dec 20 19:29:48 2008 +0100
+
+ sh: lowlevel_init coding style cleanup
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 85cb052ee41675ca361e6a4c69455dc715c8f2d9
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Dec 20 15:27:45 2008 +0100
+
+ sh: update sh2/sh2a timer coding style
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 1e15ff999322e81af4c0c0c548908f38944ba39c
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Dec 20 15:25:22 2008 +0100
+
+ sh: update sh timer coding style
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 0e3ece33801e377be67ffa29f083421ad820f28b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jan 14 23:26:05 2009 +0100
+
+ Prepare 2009.01-rc2
+
+ Update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit e92c9a860e44c14513c8909ce4299e253a775eeb
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jan 14 22:35:30 2009 +0100
+
+ cpu/mpc824x/Makefile: fix warning with parallel builds
+
+ Parallel builds would occasionally issue this build warning:
+
+ ln: creating symbolic link `cpu/mpc824x/bedbug_603e.c': File exists
+
+ Use "ln -sf" as quick work around for the issue.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 3ba605d4beec649438539e7df97b5fedb26592fb
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Jan 2 12:18:49 2009 +0100
+
+ ppc4xx: Add loadpci command to esd's CPCI4052 and CPCI405AB boards
+
+ This patch adds esd's loadpci BSP command to CPCI4052 and
+ CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 600fe46fb3dab7f07604f9009904f31584415114
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Jan 2 12:18:12 2009 +0100
+
+ ppc4xx: Disable pci node in device tree on CPCI405 pci adapters
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f6a1f490d224c600a09137e58d1026d150b8e679
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Jan 2 12:17:36 2009 +0100
+
+ ppc4xx: Cleanup CPCI405 board code
+
+ This patch cleans up CPCI405 board support:
+ - wrap long lines
+ - unification of spaces in function calls
+ - remove dead code
+
+ Use correct io accessors on peripherals.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit fceebb45a0b97e92f9889861f8c3b9cb885e706f
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Jan 2 12:16:35 2009 +0100
+
+ ppc4xx: Enable auto RS485 mode on PLU405 boards
+
+ This patch turns on the auto RS485 mode in the 2nd external
+ uart on PLU405 boards. This is a special mode of the used
+ Exar XR16C2850 uart. Because these boards only have a 485 physical
+ layer connected it's a good idea to turn it on by default.
+
+ Signed-off-by: Matthias Fuchs <mf@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b5f65dfa9aa8e068e62aba4733dc4fd97b1d9bf6
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Tue Jan 13 16:29:28 2009 -0500
+
+ Some changes of TLB entry setting for MPC8572DS
+
+ - Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode,
+ all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0
+ can not access PIXIS_BASE anymore (any access will cause DataTLBError exception)
+
+ - Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 950264317eb9594b2b5ee2fb65206200a1c6007a
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Tue Jan 13 16:29:22 2009 -0500
+
+ Change DDR tlb start entry to CONFIG param for 85xx
+
+ So that we can locate the DDR tlb start entry to the value other than 8. By
+ default, it is still 8.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 6d3a10f73ece7ffb736890c10e023222612a4aa0
+Author: Roy Zang <tie-fei.zang@freescale.com>
+Date: Fri Jan 9 16:02:35 2009 +0800
+
+ Change PCIE1&2 deciide logic on MPC8544DS board more readable
+
+ The IO port selection for MPC8544DS board:
+ Port cfg_io_ports
+ PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7
+ PCIE2 0x4, 0x5, 0x6, 0x7
+ PCIE3 0x6, 0x7
+ This patch changes the PCIE12 and PCIE2 logic more readable.
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 028e116811d28a031660f1ad9e20ac1293b3c5c7
+Author: Roy Zang <tie-fei.zang@freescale.com>
+Date: Fri Jan 9 16:01:52 2009 +0800
+
+ PCIE2 and PCIE3 are decided by corresponing bit in devdisr instead of PCIE1 bit
+
+ PCIE2 and PCIE3 should be decided by corresponing bit in devdisr instead of
+ PCIE1 bit.
+ On MPC8572DS board, PCIE refers to PCIE1.
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 9afc2ef0307aecf52482df67c31b75d5f9e66b47
+Author: Roy Zang <tie-fei.zang@freescale.com>
+Date: Fri Jan 9 16:00:55 2009 +0800
+
+ Fix IO port selection issue on MPC8544DS and MPC8572DS boards
+
+ The IO port selection is not correct on MPC8572DS and MPC8544DS board.
+ This patch fixes this issue.
+ For MPC8572
+ Port cfg_io_ports
+ PCIE1 0x2, 0x3, 0x7, 0xb, 0xc, 0xf
+ PCIE2 0x3, 0x7
+ PCIE3 0x7
+
+ For MPC8544
+ Port cfg_io_ports
+ PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7
+ PCIE2 0x4, 0x5, 0x6, 0x7
+ PCIE3 0x6, 0x7
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 3e3fffe3baf3befde287fec1fcbfe55052fb8946
+Author: Becky Bruce <beckyb@kernel.crashing.org>
+Date: Wed Dec 3 22:36:44 2008 -0600
+
+ mpc8610hpcd: Fix PCI mapping concepts
+
+ Rename _BASE to _BUS, as it's actually a PCI bus address,
+ separate virtual and physical addresses into _VIRT and _PHYS,
+ and use each appopriately. This makes the code easier to read
+ and understand, and facilitates mapping changes going forward.
+
+ Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+
+commit 79e436cad3b4a7db88408c3f05175028f30d700d
+Author: Becky Bruce <beckyb@kernel.crashing.org>
+Date: Wed Dec 3 22:36:26 2008 -0600
+
+ sbc8641d: Fix PCI mapping concepts
+
+ Rename _BASE to _BUS, as it's actually a PCI bus address,
+ separate virtual and physical addresses into _VIRT and _PHYS,
+ and use each appopriately. This makes the code easier to read
+ and understand, and facilitates mapping changes going forward.
+
+ Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+
+commit a9f3acbcd07da72b5446ce557531a3ed8b8beff0
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jan 12 14:50:35 2009 +0100
+
+ MPC86xx: fix build warnings
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 032a1c934ef4dc003281f57302b6e693062c1868
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Jan 5 16:09:44 2009 -0500
+
+ bf537-stamp/nand: fix board_nand_init prototype
+
+ The board_nand_init() function should return an int, not void.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 687f952e4119594ab913be11c90f7f018c2a7a79
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Dec 11 07:04:48 2008 -0500
+
+ Blackfin: drop CONFIG_SPI handling in board init
+
+ The eeprom SPI init functions are duplicated as the common code already
+ executes these for us.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit e7e684b10d73a303902208594c7c3e7e0d753282
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Oct 24 17:51:57 2008 -0400
+
+ Blackfin: fix out-of-tree building with ldscripts
+
+ Many of the Blackfin board linker scripts are preprocessed, so make sure we
+ output the linker script into the build tree rather than the source tree.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit b9eecc342f767b50e1476fbc1aad7d88dd4ce5eb
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Oct 24 17:48:54 2008 -0400
+
+ Blackfin: fix linker scripts to work with --gc-sections
+
+ Make sure all .text sections get pulled in and the entry point is properly
+ referenced so they don't get discarded when linking with --gc-sections.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 509fc553bc6087a6f705b3bf52f3950d7d1eaa58
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sat Oct 11 20:45:44 2008 -0400
+
+ Blackfin: set proper LDRFLAGS for parallel booting LDRs
+
+ In order to boot an LDR out of parallel flash, the ldr utility needs a few
+ flags to tell it to generate the right header.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 3dd9395a0d7ce69a335d0e743c04b9caedd681d3
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Jan 6 21:41:59 2009 +0100
+
+ at91rm9200: move define from lowlevel_init to header
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 8a48686fac2030287765f1970ea046bd5734b733
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Jan 3 17:22:26 2009 +0100
+
+ m501sk: move to the common memory setup
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit d481c80d78f954133c035dae6c7d22de3625795d
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Jan 3 17:22:25 2009 +0100
+
+ at91rm9200: rename lowlevel init value to CONFIG_SYS_
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 4e170b16625291aa10d0d9abc3f34e8a5945d157
+Author: Nicolas Ferre <nicolas.ferre@atmel.com>
+Date: Tue Jan 6 21:13:14 2009 +0100
+
+ at91: add at91sam9xeek board support
+
+ At91sam9xe is basically an at91sam9260 with embedded flash. We can manage
+ it as another entry for at91sam9260 in the Makefile.
+
+ Check documentation at :
+ http://www.atmel.com/dyn/products/product_card.asp?part_id=4263
+
+ Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 9ffd53db870a7da134f9a1ae76894a6b31237be5
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Jan 6 21:15:57 2009 +0100
+
+ fix bmp_logo.h make dependencies to allow parallel build
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit e12d9a8fb48d24176efffccc072b445e60a3afe4
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Jan 3 17:22:24 2009 +0100
+
+ at91: Fix Atmel's at91sam9 boards out of tree build
+
+ introduced in commit 89a7a87f084c
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0668236bafaa1c11c521652a2facebc74beecbf0
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 30 22:56:11 2008 +0100
+
+ README: update mailing list name and hits to patch submission.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d9011f9b75561a0bd9254934c2bb2bc799d4f645
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Dec 23 16:32:01 2008 -0600
+
+ 85xx: Enable inbound PCI config cycles for X-ES boards cleanup
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 1f03cbfae221b24ba1341a0a3f62ff01c5c874df
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Dec 23 16:32:00 2008 -0600
+
+ XPedite5200 board support cleanup
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit fea91edee8ae0295e3c30b1ff544df51f4d668e1
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Dec 2 21:58:04 2008 +0100
+
+ usb_kbd: fix usb_kbd_deregister when DEVICE_DEREGISTER not enable
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Remy Böhmer <linux@bohmer.net>
+
+commit ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28
+Author: Trent Piepho <tpiepho@freescale.com>
+Date: Wed Dec 3 15:16:37 2008 -0800
+
+ mpc8[56]xx: Put localbus clock in sysinfo and gd
+
+ Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
+ and print it out, but don't save it.
+
+ This changes where its calculated and stored to be more consistent with the
+ CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.
+
+ The localbus frequency is added to sysinfo and calculated when sysinfo is
+ set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.
+
+ get_clocks() copies the frequency into the global data, as the other
+ frequencies are, into a new field that is only enabled for MPC85xx and
+ MPC86xx.
+
+ checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
+ from sysinfo, like the other frequencies, instead of calculating it on the
+ spot.
+
+ Signed-off-by: Trent Piepho <tpiepho@freescale.com>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit 9863d6aca11405e1e0d8aba2045d78aeec4d4ee7
+Author: Trent Piepho <tpiepho@freescale.com>
+Date: Wed Dec 3 15:16:36 2008 -0800
+
+ mpc86xx: Double local bus clock divider
+
+ The local bus clock divider should be doubled for both 8610 and 8641.
+
+ Signed-off-by: Trent Piepho <tpiepho@freescale.com>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit 446c381e3e16f19857b72ea0d06241267b8b9d58
+Author: Trent Piepho <tpiepho@freescale.com>
+Date: Wed Dec 3 15:16:35 2008 -0800
+
+ mpc8568: Double local bus clock divider
+
+ The clock divider for the MPC8568 local bus should be doubled, like the
+ other newer MPC85xx chips.
+
+ Since there are now more chips with a 2x divider than a 1x, and any new
+ 85xx chips will probably be 2x, invert the sense of the #if so that it
+ lists the 1x chips instead of the 2x ones.
+
+ Signed-off-by: Trent Piepho <tpiepho@freescale.com>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit f51f07eb58fad12de9294ba4ee6c09a0ddeaee03
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Dec 16 12:09:27 2008 +0800
+
+ 85xx: Fix the boot window issue
+
+ If one custom board is using the 8MB flash, it is set
+ as FLASH_BASE = 0xef000000, TEXT_BASE = 0xef780000.
+ The current start.S code will be broken at switch_as.
+
+ It is because the TLB1[15] is set as 16MB page size,
+ EPN = TEXT_BASE & 0xff000000, RPN = 0xff000000.
+
+ For the 8MB flash case, the EPN = 0xefxxxxxx,
+ RPN = 0xffxxxxxx. Assume the virt address of switch_as
+ is 0xef7ff18c, the real address of the instruction at
+ switch_as should be 0xff7ff18c. the 0xff7ff18c is out
+ of the range of the default 8MB boot LAW window
+ 0xff800000 - 0xffffffff.
+
+ So when we switch to AS1 address space at switch_as,
+ the core can't fetch the instruction at switch_as any
+ more. It will cause broken issue.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 58da8890d5fbd074746037722a423de9ac408616
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Thu Dec 11 15:47:50 2008 -0500
+
+ sbc8548: use proper PHY address
+
+ The values given for the PHY address were wrong, so the code
+ read no valid PHY ID, and fell through to the generic PHY
+ support, which would work on 1000M but would not auto negotiate
+ down to 100M or 10M.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+
+commit ad22f9273c6f24fbfa917e867680e9688e0c59c5
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Thu Dec 11 15:47:51 2008 -0500
+
+ sbc8548: enable command line editing by default.
+
+ Lets make things a bit more user friendly. It isn't 1985 anymore.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+
+commit bd93105fa171184a71ca8b22be03dc2705cfbd3f
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Thu Dec 11 15:47:49 2008 -0500
+
+ sbc8548: don't enable the 3rd and 4th eTSEC
+
+ These interfaces don't have usable connectors on the board, so don't
+ bother enumerating or configuring them.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+
+commit 181a3650113883728927928b3ac81ad6dade4b2c
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Wed Dec 3 10:08:19 2008 -0500
+
+ Set IVPR to kenrel entry point in second core boot page
+
+ Assuming the OSes exception vectors start from the base of kernel address, and
+ the kernel physical starting address can be relocated to an non-zero address.
+ This patch enables the second core to have a valid IVPR for debugger before
+ kernel setting IVPR in CAMP mode. Otherwise, IVPR is 0x0 and it is not a valid
+ value for second core which runs kernel at different physical address other
+ than 0x0.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit a5d212a263c58cc746481bf1fc878510533ce7d6
+Author: Trent Piepho <tpiepho@freescale.com>
+Date: Wed Dec 3 15:16:34 2008 -0800
+
+ mpc8xxx: LCRR[CLKDIV] is sometimes five bits
+
+ On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
+ instead of four.
+
+ In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It
+ should be safe as the fifth bit was defined as reserved and set to 0.
+
+ Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.
+
+ Signed-off-by: Trent Piepho <tpiepho@freescale.com>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit 58ec4866ed916c7e422f5107bb27b0822084728e
+Author: Trent Piepho <tpiepho@freescale.com>
+Date: Wed Dec 3 15:16:38 2008 -0800
+
+ mpc8[56]xx: Put localbus clock in device tree
+
+ Export the localbus frequency in the device tree, the same way the CPU, TB,
+ CCB, and various other frequencies are exported in their respective device
+ tree nodes.
+
+ Some localbus devices need this information to be programed correctly, so
+ it makes sense to export it along with the other frequencies.
+
+ Unfortunately, when someone wrote the localbus dts bindings, they didn't
+ bother to define what the "compatible" property should be. So it seems no
+ one was quite sure what to put in their dts files.
+
+ Based on current existing dts files in the kernel source, I've used
+ "fsl,pq3-localbus" and "fsl,elbc" for MPC85xx, which are used by almost all
+ of the 85xx devices, and are looked for by the Linux code. The eLBC is
+ apparently not entirely backward compatible with the pq3 LBC and so eLBC
+ equipped platforms like 8572 won't use pq3-localbus.
+
+ For MPC86xx, I've used "fsl,elbc" which is used by some of the 86xx systems
+ and is also looked for by the Linux code. On MPC8641, I've also used
+ "fsl,mpc8641-localbus" as it is also commonly used in dts files, some of
+ which don't use "fsl,elbc" or any other acceptable name to match on.
+
+ Signed-off-by: Trent Piepho <tpiepho@freescale.com>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit 9d94aff699eed38b286814fcbb335f3eb8516a0e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 16 14:59:22 2008 -0600
+
+ NAND FSL elbc: Use virt_to_phys to determine which bank is in use
+
+ The current code that determines which bank/chipselect is used for a
+ given NAND instance only worked for 32-bit addresses and assumed
+ a 1:1 mapping. This breaks in 36-bit physical configs.
+
+ The proper way to handle this is to use the virt_to_phys() and
+ BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address
+ with the the virtual address the NAND code uses.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Scott Wood <scottwood@freescale.com>
+
+commit 77c8115b1f1871811633eae77a5a700fac1f0e50
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 16 14:59:21 2008 -0600
+
+ ppc: Use addrmap in virt_to_phys and map_physmem.
+
+ If we have addr map support enabled use the mapping functions to
+ implement virt_to_phys() and map_physmem().
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ecf5b98c7a6a2e2256dfddd48fab26678dcd6b90
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 16 14:59:20 2008 -0600
+
+ 85xx: Add support to populate addr map based on TLB settings
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 78bbc5ce151c5a484bb51bf1866b4a993ffc16ec
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Dec 1 13:47:13 2008 -0600
+
+ XPedite5200 board support
+
+ Initial support for Extreme Engineering Solutions XPedite5200 -
+ a MPC8548-based PMC single board computer.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 487dcb4fb89be0992bc06ec1341090017bd9cf2f
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Oct 29 12:39:27 2008 -0500
+
+ 85xx: Enable inbound PCI config cycles for X-ES boards
+
+ Update X-ES Freescale boards to allow inbound PCI configuration
+ cycles when configured as agent/endpoint.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit ccf0fdd02b97323f8caae18d06cc9daeac2f192f
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Dec 17 16:36:23 2008 -0600
+
+ XPedite5370 board support
+
+ Initial support for Extreme Engineering Solutions XPedite5370 -
+ a MPC8572-based 3U VPX single board computer with a PMC/XMC
+ site.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit e92739d34e2d6b6aca93b2598248210710897ce8
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Dec 17 16:36:21 2008 -0600
+
+ Add support for PCA953x I2C gpio devices
+
+ Initial support for NXP's 4 and 8 bit I2C gpio expanders
+ (eg pca9537, pca9557, etc). The CONFIG_PCA953X define
+ enables support for the devices while the CONFIG_CMD_PCA953X
+ define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO
+ define enables an 'info' sub-command which provides summary
+ information for the given pca953x device.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 7a8979591171676417ab36852d8811a8c46accd8
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Oct 29 12:39:26 2008 -0500
+
+ pci/fsl_pci_init: Enable inbound PCI config cycles
+
+ Add fsl_pci_config_unlock() function to enable a
+ PCI/PCIe interface configured in agent/endpoint mode to
+ respond to inbound PCI configuration cycles.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Wed Dec 17 16:43:18 2008 +0100
+
+ avr32: Remove second definition of virt_to_phys()
+
+ The second definition introduced by 65e43a1063 conflicts with the
+ existing one.
+
+ Also, convert the existing definition to use phys_addr_t. The volatile
+ qualifier is still needed due to brain damage elsewhere.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit b616f2b545f73757669b37386f0b37bb61fc6797
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Mon Sep 8 22:27:18 2008 +0200
+
+ MIPS: qemu_mips: update doc to generate and to use qemu flash, ide file
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 16cdf816779f5b602a9b3b4d2ea4dea05095c35b
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Dec 16 22:10:31 2008 +0100
+
+ MIPS: qemu_mips: update doc to use all disk and boot linux kernel
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 13095b2f07dacb1f863772266c1789d47a523a8a
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Dec 16 22:10:30 2008 +0100
+
+ MIPS: qemu_mips: move env storage just after u-boot
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit aced78d852d0b009e8aaa1445af8cb40861ee549
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 16 23:48:27 2008 +0100
+
+ Prepare 2009.01-rc1
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 9e2a79b4c585ad31138fb90b68fd0234d64a8da8
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 16 23:13:46 2008 +0100
+
+ include/configs/at91cap9adk.h: fix typo.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 45ca04f2377361593151d2d4da51f8ba4832d233
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 16 22:32:25 2008 +0100
+
+ board/trab/memory.c: Fix compile problems.
+
+ Apply changes from commit 44b4dbed to board/trab/memory.c, too.
+
+ Actually we'd need a major cleanup here - as it turns out,
+ board/trab/memory.c is more or less a verbatim copy of
+ post/drivers/memory.c ... but then, trab is EOL anyway,r
+ so this is not worth the effort.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit ff49ea8977b56916edd5b1766d9939010e30b181
+Author: Scott Wood <scottwood@freescale.com>
+Date: Tue Dec 16 14:24:16 2008 -0600
+
+ NAND: Mark the BBT as scanned prior to calling scan_bbt.
+
+ Otherwise, recursion can occur if scan_bbt does not find a bad block
+ table, and tries to write one, and the attempt to erase the BBT area
+ causes a bad block check.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 584eedab66d0828f2d571a24b10526c4e65f547b
+Author: Ilya Yanok <yanok@emcraft.com>
+Date: Thu Dec 11 05:51:57 2008 +0300
+
+ jffs2: include <linux/mtd/compat.h> instead of defining own min_t
+
+ Include <linux/mtd/compat.h> header for min_t definition instead of
+ providing our own one. Removes warnings in case of OneNAND support
+ enabled.
+
+ Although I thinks it's a bit silly to include <linux/mtd/compat.h>
+ just for min_t...
+
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit b1ffecec37b57a59c139042267faac458e5324e9
+Author: Becky Bruce <beckyb@kernel.crashing.org>
+Date: Wed Dec 3 23:04:37 2008 -0600
+
+ powerpc: fix io.h build warning with CONFIG_PHYS_64BIT
+
+ Casting a pointer to a phys_addr_t when it's an unsigned long long
+ on a 32-bit system without first casting to a non-pointer type
+ generates a compiler warning. Fix this.
+
+ Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+
+commit 6cdadcb3f1b6eac4a1c4256acaa1438413f95351
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 16 16:22:50 2008 +0100
+
+ trab: make trab_fkt standalone code independent of libgcc
+
+ Use our own local functions in lib_arm/ instead.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit aa1bcca3d2e22af4dea9f02132f9b56a30378ded
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 16 14:44:06 2008 +0100
+
+ post/Makefile: fix dependency problem with parallel builds
+
+ Parallel builds (using "make -jN") would occasionally fail with error
+ messages like
+ ppc_4xxFP-objdump: string.o: File format not recognized
+ or
+ post/libpost.a(cpu.o): In function `cpu_post_test':
+ /home/wd/git/u-boot/work/post/lib_ppc/cpu.c:130: undefined reference to `cpu_post_test_string'
+ or similar. We now make sure to run the 'postdeps" step before
+ attempting to build the specific POST libraries.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 4a0f7538c5c0805fd9a791967bbabacc41deadd9
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 16 14:41:02 2008 +0100
+
+ Makefile: fix dependency problem with parallel builds
+
+ Parallel builds (using "make -jN") would occasionally fail with error
+ messages like
+ include/autoconf.mk:212: *** missing separator. Stop.
+ Line numbers and affected boards were changing. Obviously some
+ Makefiles included autoconf.mk while it was still being written to.
+ As a fix, we now write to a temporary file first and then rename it,
+ so that it is really ready to use as soon as it appears.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 455ae7e87f67c44e6aea68865c83acadd3fcd36c
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 16 01:02:17 2008 +0100
+
+ Coding style cleanup, update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 84bc72d90c505fec3ef4b693995407a0bd4064e5
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Dec 11 18:39:08 2008 -0500
+
+ spi/stmicro: fix debug() display of cmd
+
+ The stmicro_wait_ready() func tries to show the actual opcode that was sent
+ to the device, but instead it displays the array pointer. Fix it to pull
+ out the opcode from the start of the array.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 5b3375ac8c36c29c87abb132fede0509eb21e5c9
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Dec 11 06:23:37 2008 -0500
+
+ env_sf: support embedded environments
+
+ If both CONFIG_ENV_SECT_SIZE and CONFIG_ENV_SIZE are defined, and the sect
+ size is larger than the env size, then it means the env is embedded in a
+ block. So we have to save/restore the part of the sector which is not the
+ environment. Previously, saving the environment in SPI flash in this
+ setup would probably brick the board as the rest of the sector tends to
+ contain actual U-Boot data/code.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit ecf5f077c8e77454f532eaac3e3afb7cfc48c62d
+Author: Timur Tabi <timur@freescale.com>
+Date: Wed Dec 3 11:28:30 2008 -0600
+
+ i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functions
+
+ All implementations of the functions i2c_reg_read() and
+ i2c_reg_write() are identical. We can save space and simplify the
+ code by converting these functions into inlines and putting them in
+ i2c.h.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Acked-By: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit e39cd81c44740d7355d277ed3d38536cbe1e003d
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Dec 5 15:36:14 2008 +0800
+
+ lib_ppc: rework the flush_cache
+
+ - It is possible to miss flush/invalidate the last
+ cache line, we fix it at here.
+ - add the volatile and memory clobber.
+
+ They are pointed by Scott Wood.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 63240ba88cd6a220057a0f28e5bf97f5b17ac84b
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Sat Dec 13 17:20:28 2008 -0600
+
+ Introduce addr_map library
+
+ Add a library that helps in translating between virtual and physical
+ addresses. This library can be useful as a simple means to implement
+ map_physmem() and virt_to_phys() for platforms that need functionality
+ beyond the simple 1:1 mapping.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 65e43a10631537dcb92c302d36301a12308216c3
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Sat Dec 13 17:20:27 2008 -0600
+
+ Introduce virt_to_phys()
+
+ virt_to_phys() returns the physical address given a virtual. In most
+ cases this will be just the input value as the vast majority of
+ systems run in a 1:1 mode.
+
+ However in systems that are not running this way it should report the
+ physical address or ~0 if no mapping exists for the given virtual
+ address.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 45845301af3de8675c1f7bbc815c6de35452605a
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Sun Dec 7 22:12:50 2008 +0100
+
+ POST Make: fix the sub-dir dependencies missing.
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+
+commit 22525779cb51f1bbe4e96fea7b778de1935a5a69
+Author: Martin Michlmayr <tbm@cyrius.com>
+Date: Wed Aug 6 14:44:05 2008 +0300
+
+ Fix a typo in fw_env.config
+
+ Reported-by: Martin Michlmayr <tbm@cyrius.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit ba490b7761c62b549c222a9723e532dc801a3899
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Dec 1 16:22:45 2008 -0600
+
+ Remove unused CONFIG_ADDR_STREAMING defines
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit d16da93430520d3e46c1ab52eedacf36ab7a2311
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Nov 24 11:54:47 2008 -0600
+
+ cmd_mem: Remove unused variable
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 3aed3aa2c128ce9fb39ca3f4e9385a7499e93dbf
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Dec 14 10:29:39 2008 +0100
+
+ Fix new found CFG_
+
+ Also fix some minor typos.
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 0e0c862efe7279e9609db74d758cd1b84c6c7209
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Sep 19 12:07:34 2008 +0200
+
+ Remove compiler warning: target CPU does not support interworking
+
+ This warning is issued by modern ARM-EABI GCC on non-thumb targets.
+
+ Signed-off-by: Vladimir Panfilov <pvr@emcraft.com>
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit cd6734510a9ff0f41c4a73567d4080ea0033d2c1
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Mon Nov 24 13:33:51 2008 +0100
+
+ Fix FIT and FDT support to have CONFIG_OF_LIBFDT and CONFIG_FIT independent
+
+ FDT support is used for both FIT style images and for architectures
+ that can pass a fdt blob to an OS (ppc, m68k, sparc).
+
+ For other architectures and boards which do not pass a fdt blob to an
+ OS but want to use the new uImage format, we just need FIT support.
+
+ Now we can have the 4 following configurations :
+
+ 1) FIT only CONFIG_FIT
+ 2) fdt blob only CONFIG_OF_LIBFDT
+ 3) both CONFIG_OF_LIBFDT & CONFIG_FIT
+ 4) none none
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 19ef4f7a6ef3b725aa9fe4b4f5fb676a84160172
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Wed Dec 10 15:13:32 2008 +0100
+
+ ppc4xx: Disable EEPROM write access on PMC440 boards
+
+ This patch disables EEPROM wrtie access by default on PMC440 board.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 5b67a1439a73ba6c34007d9ff60a2c6aa90265df
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Wed Dec 10 15:12:56 2008 +0100
+
+ ppc4xx: Fix Ethernet PHY LED configuration on PMC440 boards
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 71fa0714fe5134bc8718c38d5261d267e88582ba
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 18 16:36:12 2008 +0100
+
+ MIPS: Flush data cache upon relocation
+
+ This patch now adds a flush to the data cache upon relocation. The
+ current implementation is missing this. Only a comment states that it
+ should be done. So let's really do it now.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 44174343688dba32571a34550dba08971c65fef1
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 18 16:36:22 2008 +0100
+
+ MIPS: Add CONFIG_SKIP_LOWLEVEL_INIT
+
+ This patch adds the CONFIG_SKIP_LOWLEVEL_INIT option to start.S. This
+ enables support for boards where the lowlevel initialization is
+ already done when U-Boot runs (e.g. via OnChip ROM).
+
+ This will be used in the upcoming VCTH board support.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit db08ecaa6eb8176904b3bae103a85ee8f735dc40
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 12 13:18:02 2008 +0100
+
+ MIPS: Add board_early_init_f() to init_sequence
+
+ This patch adds the board_early_init_f() call to the MIPS init
+ sequence. A weak dummy implementation is also added which can be
+ overridden by a board specific version.
+
+ This will be used by the upcoming VCTH board support.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 9d23fc584c4b7b8bb9ecbee48920b1b04b08fa1b
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 12 13:18:19 2008 +0100
+
+ MIPS: Add onenand_init() to board.c and move nand_init()
+
+ This patch adds a call to onenand_init() for OneNAND support and moves
+ the nand_init() call to an earlier place, so that the environment can
+ be used from NAND and OneNAND.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit d8bbc51c7ba9b737a20984333d19fe28a3526431
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Tue Dec 9 11:32:46 2008 +0900
+
+ sh: Update sh2/sh2a timer
+
+ Renesas SH2/SH2A timer broken.
+ This patch fix timer function.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit a319f1496210117b73198e3d889ffffaf6825d00
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Dec 5 07:27:37 2008 +0100
+
+ sh: r2dplus fix register access
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 4d4a96055f6917335a89dbdf2e5556fa5ac329f6
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Dec 2 07:40:03 2008 +0100
+
+ sh: r2dplus/lowlevel_init: coding style fix
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit c54b9a42d8f5ab5b2a039b3a2e6fde8b427745e5
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Tue Nov 25 11:05:19 2008 +0900
+
+ sh: Changed value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT
+
+ SH4 is different a value of CACHE_OC_NUM_ENTRIES and
+ CACHE_OC_WAY_SHIFT every CPU.
+ This patch corrects these values.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit e9d5f35497885b3c65d494d09a525d443dcccd3b
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Thu Nov 20 16:44:42 2008 +0900
+
+ sh: Update sh timer function
+
+ Change to write/readX function and fix timer problem.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit b81786cff476c41e332eaeb679158f6527cd67d4
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Tue Nov 4 11:58:58 2008 +0900
+
+ sh: Migo-R: Update BSC value
+
+ A value of BSC CS4 was wrong, Fixed it.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 5783758fd260a02f44566ad8f29f899565cd0403
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Mon Nov 17 16:52:09 2008 +0900
+
+ sh: Update ms7722se board config
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 15e2697c9f7fb2ba672a1a70f07cd6d9d4e92b51
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Mon Nov 17 16:53:09 2008 +0900
+
+ sh: Update SuperH serial driver
+
+ The address of SCFSR register is wrong at SH7720/SH7721.
+ This patch fix this.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 9a1d3557dcd47365c12eeab584b822e57d994352
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Nov 11 22:20:15 2008 +0100
+
+ sh: fix rsk7203 and MigoR out of tree build
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 1951f847f0a851853871b613ad7cf21a5242226c
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Wed Dec 10 14:41:25 2008 +0100
+
+ ppc4xx: Update TEXT_BASE for CPCI405 boards
+
+ This patch fixes building U-Boot for CPCI405 boards.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8c92af7b2fbd60ae87379477f93c7ec9441b7452
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Dec 9 20:08:01 2008 +0100
+
+ ppc4xx: Remove some features from ALPR to fit into 256k again
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3b089e4f889a2902449d55e081c886ae607cae89
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Dec 10 10:32:59 2008 +0100
+
+ UBI: Set ubi_dev.type back to DEV_TYPE_NONE upon failing initialization
+
+ With this patch we set the type back to NONE upon failing UBI partition
+ initialization. Otherwise further calls to the UBI subsystem would try
+ to really access the non-existing UBI partition.
+
+ Thanks to Michael Lawnick for pointing this out.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 817329351639a8895cd9b87b33aeff043f3d5a44
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Dec 10 10:28:33 2008 +0100
+
+ UBI: Return -ENOMEM upon failing malloc
+
+ Return with correct error code (-ENOMEM) from ubi_attach_mtd_dev() upon
+ failing malloc().
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2145188bea2df8f2b47a87ec3071b55027e8d0ae
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Tue Dec 9 23:34:15 2008 -0800
+
+ Fix compile error in building MBX860T.
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 8fab49ea911fe925392fa5afcc9bc7373a3d0cee
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue Nov 25 11:42:20 2008 +0100
+
+ microblaze: Remove XUPV2P board
+
+ ---
+
+ Microblaze platforms use generic settings and to have
+ many platforms is confusing that's why I decided to remove this
+ platform from U-BOOT. ml401 tree is sufficient for covering
+ all Microblaze platforms.
+
+ This change will go through microblaze custodian tree.
+
+commit 99ba6f353582720defff6e6e6761dc455a207d31
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon Nov 24 18:25:41 2008 +0100
+
+ microblaze: Remove CONFIG_LIBFDT due to error in common files
+
+commit e7d591e823a991513833af7030468409e25a3b13
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon Nov 24 11:43:00 2008 +0100
+
+ microblaze: Fix ml401 uart16550 setting
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit c85ff0553a8cfbcca51c15b947e1ed55d3810a39
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon Nov 24 11:38:22 2008 +0100
+
+ microblaze: Set up relocation is done
+
+commit bcb6dd9187d4b23c748704767bd12d20c829e996
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Dec 9 23:20:31 2008 -0500
+
+ tools/netconsole: new script for working with netconsole over UDP
+
+ While the doc/README.NetConsole does have a snippet for people to
+ create their own netcat script, it's a lot easier to make a simple
+ dedicated script and tell people to use it.
+
+ Also spruce it up a bit to make it user friendly.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 8c5170a7d088601d5f30d85093388dab1f1e8ec0
+Author: Sonic Zhang <Sonic.Zhang@analog.com>
+Date: Tue Dec 9 23:20:18 2008 -0500
+
+ fs/fat: handle FAT on SATA
+
+ The FAT file system driver should also handle FAT on SATA devices.
+
+ Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 97a24a78ee6f34b89b821cb70eda1cf34aa11d97
+Author: Jerry Van Baren <gvb.uboot@gmail.com>
+Date: Mon Nov 24 08:15:02 2008 -0500
+
+ libfdt: Fix redefined uintptr_t warning for USE_HOSTCC
+
+ Compiling U-Boot in an old OS environment (RedHat-7.3 :-) gives the
+ following warnings from FDT:
+
+ include/libfdt_env.h:50: warning: redefinition of 'uintptr_t'
+ /usr/include/stdint.h:129: warning: 'uintptr_t' previously declared here
+
+ Fix: Protect the definition of uintptr_t when compiling on the host
+ system.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 1fc2b165c51d6f40c8d505f1b3eaefdb6599b17b
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sat Nov 22 08:43:29 2008 +1100
+
+ Moved sc520 PCI definitions to stand-alone file
+
+ Signed Off By: Graeme Russ <graeme.russ@gmail.com>
+
+commit 1f5070c0c18fa5684bfce09c8abdf10c04ed48fa
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sat Nov 22 08:43:21 2008 +1100
+
+ Fixed path to sc520 SSI include file
+
+ Signed Off By: Graeme Russ <graeme.russ@gmail.com>
+
+commit d4f70da544c33db3e4fce6473dea4ecca4322545
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Fri Nov 21 06:28:05 2008 +1100
+
+ Fixed build error due to #define of _LINUX_STRING_H_ in 82559_eeprom.c
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit c034075a713b60e654c64e88e87da29440f31bb4
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 12 13:30:10 2008 +0100
+
+ serial: Add vcth UART driver
+
+ This patch adds the UART driver for the upcoming VCTH board support.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 142a80ffc3b537a9c45acd2444a42a77f147c602
+Author: Ilya Yanok <yanok@emcraft.com>
+Date: Thu Nov 13 19:49:36 2008 +0300
+
+ jffs2: cache data_crc results
+
+ As we moved data_crc() invocation from jffs2_1pass_build_lists() to
+ jffs2_1pass_read_inode() data_crc is going to be calculated on each
+ inode access. This patch adds caching of data_crc() results. There
+ is no significant improvement in speed (because of flash access
+ caching added in previous patch I think, crc in RAM is really fast)
+ but this patch impacts memory usage -- every b_node structure uses
+ 12 bytes instead of 8.
+
+ Signed-off-by: Alexey Neyman <avn@emcraft.com>
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit 9b7076229ec6a958bd835ab70745f7676297ce82
+Author: Ilya Yanok <yanok@emcraft.com>
+Date: Thu Nov 13 19:49:35 2008 +0300
+
+ jffs2: summary support
+
+ This patch adds support for reading fs information from summary
+ node instead of scanning full eraseblock.
+
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit 70741004dc28946cd82c7af6789c4ddb3fc94526
+Author: Ilya Yanok <yanok@emcraft.com>
+Date: Thu Nov 13 19:49:34 2008 +0300
+
+ jffs2: add buffer to cache flash accesses
+
+ With this patch JFFS2 code allocates memory buffer of max_totlen size
+ (size of the largest node, calculated during scan time) and uses it to
+ store entire node. Speeds up loading. If malloc fails we use old ways
+ to do things.
+
+ Signed-off-by: Alexey Neyman <avn@emcraft.com>
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit 8a36d31f72411144ac0412ee7e1880e801acd754
+Author: Ilya Yanok <yanok@emcraft.com>
+Date: Thu Nov 13 19:49:33 2008 +0300
+
+ jffs2: rewrite jffs2 scanning code based on Linux one
+
+ Rewrites jffs2_1pass_build_lists() function in style of Linux's
+ jffs2_scan_medium() and jffs2_scan_eraseblock().
+ This includes:
+ - Caching flash acceses
+ - Smart dealing with free space
+
+ Signed-off-by: Alexey Neyman <avn@emcraft.com>
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit e0b5532579eda8b4629f1b4f6e49c3cc60f52237
+Author: Ilya Yanok <yanok@emcraft.com>
+Date: Thu Nov 13 19:49:32 2008 +0300
+
+ jffs2: add sector_size field to part_info structure
+
+ This patch adds sector_size field to part_info structure (used
+ by new JFFS2 code).
+
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit f73846956778a7dfee83403ef9747aff77198848
+Author: Ilya Yanok <yanok@emcraft.com>
+Date: Thu Nov 13 19:49:31 2008 +0300
+
+ jffs2: fix searching for latest version in jffs2_1pass_list_inodes()
+
+ We need to update i_version inside cycle to find really latest version
+ inside jffs2_1pass_list_inodes(). With that fixed we can use isize inside
+ dump_inode() instead of calling expensive jffs2_1pass_read_inode().
+
+ Signed-off-by: Alexey Neyman <avn@emcraft.com>
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit 1113cb764b3da256ef8a1f9539f4efbe221ff3c4
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 9 23:13:51 2008 +0100
+
+ evb64260: fix "cast to pointer from integer of different size" warnings
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d2776827315c3d469b8cb4cec14d58877798daa2
+Author: Stefan Althoefer <stefan.althoefer@web.de>
+Date: Sun Dec 7 19:39:11 2008 +0100
+
+ USB: descriptor handling
+
+ Hi,
+
+ I found a bug when working with the u-boot USB subsystem on IXP425 processor
+ (big endian Xscale aka ARMv5).
+ I recognized that the second usb_endpoint_descriptor of the attached memory
+ stick was corrupted.
+
+ The reason for this are the packed structures below (either u-boot and
+ u-boot-usb):
+
+ --------------
+ /* Endpoint descriptor */
+ struct usb_endpoint_descriptor {
+ unsigned char bLength;
+ unsigned char bDescriptorType;
+ unsigned char bEndpointAddress;
+ unsigned char bmAttributes;
+ unsigned short wMaxPacketSize;
+ unsigned char bInterval;
+ unsigned char bRefresh;
+ unsigned char bSynchAddress;
+
+ } __attribute__ ((packed));
+ /* Interface descriptor */
+ struct usb_interface_descriptor {
+ unsigned char bLength;
+ unsigned char bDescriptorType;
+ unsigned char bInterfaceNumber;
+ unsigned char bAlternateSetting;
+ unsigned char bNumEndpoints;
+ unsigned char bInterfaceClass;
+ unsigned char bInterfaceSubClass;
+ unsigned char bInterfaceProtocol;
+ unsigned char iInterface;
+
+ unsigned char no_of_ep;
+ unsigned char num_altsetting;
+ unsigned char act_altsetting;
+ struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
+ } __attribute__ ((packed));
+ ------------
+
+ As usb_endpoint_descriptor is only 7byte in length, the start of all
+ odd ep_desc[] structures is not word aligned. This makes wMaxPacketSize
+ of these structures also not word aligned.
+
+ ARMv5 Architecture however does not support non-aligned multibyte
+ data type (see A2.8 of ARM Architecture Reference Manual).
+
+ Signed-off-by: Stefan Althoefer <stefan.althoefer@web.de>
+ Signed-off-by: Remy Böhmer <linux@bohmer.net>
+
+commit 4c253fdb2a175ea3472c38a1455a16faa58e81f0
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Dec 9 10:27:33 2008 -0600
+
+ drivers/fsl_pci_init: Fix compile warning
+
+ fsl_pci_init.c: In function 'fsl_pci_setup_inbound_windows':
+ fsl_pci_init.c:122: warning: comparison is always true due to limited range of data type
+
+ The check only makes sense if we are CONFIG_PHYS_64BIT
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit dedacc18a8c2b3951581eb721fa055a4e0ac4845
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Dec 7 09:45:35 2008 +0100
+
+ usbtty/omap: update to current API
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Remy Böhmer <linux@bohmer.net>
+
+commit ee2e9ba917a62cc2e3a484bb79c8da0e01cb93ed
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Tue Dec 9 17:52:05 2008 +0100
+
+ video: fix FADS823 and RRvision compiling issues
+
+ Since commit 561858ee building for FADS823 and RRvision
+ doesn't work. Let's include version.h and timestamp.h
+ unconditionally to fix the problem.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 2d2e05727fe4013f807ffa814dff0e75259a1db4
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Dec 2 10:53:47 2008 +0100
+
+ UBI: Fix size parsing in "ubi create"
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2ee951ba2ac9874d2a93d52e7a187d3184be937e
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Nov 27 14:07:09 2008 +0100
+
+ UBI: Enable re-initializing of the "ubi part" command
+
+ With this patch now, the user can call "ubi part" multiple times to
+ re-connect the UBI device to another MTD partition.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9def12cae33d2d3ea2dd56b197fd3dfb3ad60bf4
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Nov 27 14:05:15 2008 +0100
+
+ MTD: Fix problem based on non-working relocation (list head mtd_partitions)
+
+ Don't use LIST_HEAD() but initialize the struct via INIT_LIST_HEAD() upon
+ first call of add_mtd_partitions(). Otherwise this won't work on platforms
+ where the relocation is broken (like MIPS or PPC).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5e3ab68e9acf9edf304b8aa32ad7e005483a2c47
+Author: Trent Piepho <tpiepho@freescale.com>
+Date: Wed Nov 12 17:29:48 2008 -0800
+
+ Section name should be ".data", not "data"
+
+ Signed-off-by: Trent Piepho <tpiepho@freescale.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 7fa6a2f3b66579dea8bc1a9177646e1141731b15
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 9 00:39:08 2008 +0100
+
+ MAKEALL: Automatically use parallel builds
+
+ Add logic to the MAKEALL script to determine the number of CPU cores
+ on the system, and run a parallel build if there is more than one.
+ Usually this significantrly accelerates builds.
+
+ Allow to manually adjust the number of parallel make jobs by using
+ the "BUILD_NCPUS" environment variable.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 268405fa7c44156c5192a70779920c70906af8d6
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 9 00:24:30 2008 +0100
+
+ vxworks.h: Fix build problem introduced by commits 29a4c24d/e9084b23
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 153176a9414120ca1736f3cc4951623d6e14e6af
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Nov 11 06:08:59 2008 +0100
+
+ avr32/bootm: remove unused variable 'ret'
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 434c51a5e62f608a2a78ed5398ac43a1c77cc183
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Nov 12 13:06:48 2008 -0600
+
+ Remove unneeded CONFIG_SHELL references
+
+ Make should be using the bash shell by default which makes
+ CONFIG_SHELL unnecessary
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit cf7a7b99794bac936899819b95539be1dbd71708
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Nov 12 12:33:20 2008 -0600
+
+ Use bash for default GNU Make shell application
+
+ Some Make script commands rely on bash-specific features like brace
+ expansion, so default to bash for the SHELL variable with a fallback
+ to the standard sh shell
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 4b530018764934ad5689196e9aa5714a6f4d1a6c
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Nov 12 09:50:45 2008 +0100
+
+ jffs2: rename devices_init () in common/jffs2.c
+
+ rename devices_init () in common/jffs2.c to
+ jffs2_devices_init (), because there is also a
+ devices_init () in common/devices.c.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit af5eb847a10f1037590001355d88bab3fe7be48b
+Author: Daniel Hellstrom <daniel@gaisler.com>
+Date: Mon Nov 10 12:46:20 2008 +0000
+
+ SPARC: Fixed compiler error introduced by commit c160a9544743
+
+ This patch fixes a build error for the SPARC platform. It was
+ introduced by commit c160a9544743e80e8889edb2275538e7764ce334.
+
+ Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
+
+commit 4c60259899aa00f59db0d936b8807f9a26411c0f
+Author: Gary Jennejohn <garyj@denx.de>
+Date: Sun Nov 9 12:50:59 2008 +0100
+
+ mgsuvd add the board-specific part of the HDLC driver
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+
+commit 534a4359666af48bd69a3743d8a8c2bdb1d3ec70
+Author: Gary Jennejohn <garyj@denx.de>
+Date: Sun Nov 9 12:45:03 2008 +0100
+
+ mgcoge add the board-specific part of the HDLC driver
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+
+commit 135f5534538bb8ea4f38a7030da12187d22ef7e0
+Author: Gary Jennejohn <garyj@denx.de>
+Date: Sun Nov 9 12:36:15 2008 +0100
+
+ keymile add the common parts of the HDLC driver
+
+ This implements the ICN protocol used across the backplane and is
+ needed by all the keymile boards.
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+
+commit 1cb82a9207a550557399eabc7fe47f21bbd9ddf8
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Nov 7 22:46:22 2008 +0100
+
+ drivers/bios_emulator: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit bcdf1d2cf6b24fb905fd7da80da4b3c65a7995b5
+Author: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+Date: Thu Nov 6 14:01:51 2008 -0500
+
+ common/cmd_ide.c: Corrected endian order printing for compact flash serial number.
+
+ Corrected endian order printing for compact flash serial number.
+
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+
+commit 16a28ef219c27423a1ef502f19070c4d375079b8
+Author: Gary Jennejohn <garyj@denx.de>
+Date: Thu Nov 6 15:04:23 2008 +0100
+
+ IOMUX: Add console multiplexing support.
+
+ Modifications to support console multiplexing. This is controlled using
+ CONFIG_SYS_CONSOLE_MUX in the board configuration file.
+
+ This allows a user to specify multiple console devices in the environment
+ with a command like this: setenv stdin serial,nc. As a result, the user can
+ enter text on both the serial and netconsole interfaces.
+
+ All devices - stdin, stdout and stderr - can be set in this manner.
+
+ 1) common/iomux.c and include/iomux.h contain the environment setting
+ implementation.
+ 2) doc/README.iomux contains a somewhat more detailed description.
+ 3) The implementation in (1) is called from common/cmd_nvedit.c to
+ handle setenv and from common/console.c to handle initialization of
+ input/output devices at boot time.
+ 4) common/console.c also contains the code needed to poll multiple console
+ devices for input and send output to all devices registered for output.
+ 5) include/common.h includes iomux.h and common/Makefile generates iomux.o
+ when CONFIG_SYS_CONSOLE_MUX is set.
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+
+commit 774ce72026f74ac9641bcbbc588b20f2e13f7ab8
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Nov 4 16:03:46 2008 -0500
+
+ strings: use puts() rather than printf()
+
+ When running `strings` on really long strings, the stack tends to get
+ smashed due to printf(). Switch to puts() instead since we're only passing
+ the data through.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit b03150b52e3c491a86a3cc0945274f0e8f9872e7
+Author: Niklaus Giger <niklaus.giger@member.fsf.org>
+Date: Mon Nov 3 22:16:18 2008 +0100
+
+ Use new CONFIG_SYS_VXWORKS parameters for Netstal boards
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
+
+commit 29a4c24de99d8cb4ac32991c04cab87ed94ca1f9
+Author: Niklaus Giger <niklaus.giger@member.fsf.org>
+Date: Mon Nov 3 22:15:34 2008 +0100
+
+ cmd_elf.c: Cleanup bootvx and handle new CONFIG_SYS_VXWORKS parameters
+
+ - fix size too small by one in sprintf
+ - changed old (pre 2004) device name ibmEmac to emac
+ - boot device may be overriden in board config
+ - servername may be defined in board config
+ - additional parameters may be defined in board config
+ - fixed some line wrappings
+ - replaced redundant MAX define by max
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
+
+commit e9084b23d16102f44ace24379a1c0c352497ef80
+Author: Niklaus Giger <niklaus.giger@member.fsf.org>
+Date: Mon Nov 3 22:14:36 2008 +0100
+
+ Add vxworks.h to handle CONFIG_SYS_VXWORKS parameters
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
+
+commit 0b2f4ecad473d785959c7976f20d2a00bd0ee01f
+Author: Niklaus Giger <niklaus.giger@member.fsf.org>
+Date: Mon Nov 3 22:13:47 2008 +0100
+
+ README: Document CONFIG_SYS parameters for vxworks
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
+
+commit ace514837cac656e29c37a19569cb8ea83071126
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Fri Oct 31 11:12:38 2008 -0500
+
+ lcd: Let the board code show board-specific info cleanup
+
+ remove unneeded version.h from lcd.c
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 561858ee7d0274c3e89dc98d4d0698cb6fcf6fd9
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Nov 3 09:30:59 2008 -0600
+
+ Update U-Boot's build timestamp on every compile
+
+ Use the GNU 'date' command to auto-generate a new U-Boot
+ timestamp on every compile.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 83ad179e2f0f625b88adb8ef5696709e46fb9077
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Thu Dec 4 22:25:57 2008 +0100
+
+ Remove redundant armv4 flag from arm926ejs compile flags
+
+ Currently the arm926ejs tree has the armv4 option set during compilation.
+ This flag does not belong here because a arm926 CPU is always a armv5 CPU.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit 89a7a87f084c657f8e32b513a77b50eca07e17ec
+Author: Nicolas Ferre <nicolas.ferre@atmel.com>
+Date: Sat Dec 6 13:11:14 2008 +0100
+
+ at91: Choose environment variables location within make config target
+
+ This patch adds the possiblity to choose the media where the environment will
+ be located. This allow to choose this fundamental configuration without editing
+ config files.
+
+ Documentation file added.
+
+ Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
+ Acked-by: Stelian Pop <stelian@popies.net>
+ Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 1450c4a6682378567030414a9f1198c39b7730c7
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Mon Nov 3 15:30:34 2008 +0100
+
+ lwmon, tqm8xx: Fix build errors
+
+ Commit 6b59e03e0237a40a2305ea385defdfd92000978b
+ lcd: Let the board code show board-specific info
+
+ introduced some bugs which prevent U-Boot building
+ for lwmon board if CONFIG_LCD_INFO_BELOW_LOGO will
+ be defined in the board configuration.
+
+ Also "LCD enabled" building for TQM823L doesn't work
+ since this commit.
+
+ This patch fixes above-mentioned issues.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit bfa0af6b22ff25b0719a8910f9b6d1f975aa6fb0
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sun Nov 2 01:18:18 2008 -0400
+
+ ignore .gdb_history files
+
+ When using gdb, history files will often get generated. So ignore them.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit c8aa7dfc18f7cc90d0aea6c7becbb67dfc5bba4b
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Oct 31 12:26:55 2008 +0100
+
+ FPGA: move fpga drivers to drivers/fpga
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 6a86bb6c25376f0358478219fa28d7c84dd01ed0
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Dec 1 16:29:38 2008 -0600
+
+ net: Fix TftpStart() ip:filename bug
+
+ The TftpStart() function modifies the 'BootFile'
+ string when 'BootFile' contains both an IP address
+ and filename (eg 1.2.3.4:/path/file). This causes
+ subsequent calls to TftpStart to incorrectly parse
+ the TFTP filename and server IP address to use.
+ For example:
+
+ => tftp 0x100000 10.52.0.62:/home/ptyser/non_existant
+ Speed: 100, half duplex
+ Using eTSEC1 device
+ TFTP from server 10.52.0.62; our IP address is 10.52.253.79
+ ^^^^^^^^^^ CORRECT
+ Filename '/home/ptyser/non_existant'.
+ ^^^^^^^^^^^^^^^^^^^^^^^^^ CORRECT
+ Load address: 0x100000
+ Loading: *
+ TFTP error: 'File not found' (1)
+ Starting again
+
+ eTSEC2: No link.
+ Speed: 100, half duplex
+ Using eTSEC1 device
+ TFTP from server 10.52.0.33; our IP address is 10.52.253.79
+ ^^^^^^^^^^ WRONG
+ Filename '10.52.0.62'.
+ ^^^^^^^^^^ WRONG
+ Load address: 0x100000
+ Loading: *
+ TFTP error: 'File not found' (1)
+ Starting again
+
+ TftpStart() was modified to not modify the 'BootFile' string.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit d32c5be50bf0600bfdc54223ef341ee9c63db445
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Dec 1 16:26:21 2008 -0600
+
+ net: Add additional IP fragmentation check
+
+ Ignore IP packets which have the "more fragments" flag bit
+ set. This flag indicates the IP packet is fragmented and
+ must be ignored by U-Boot.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit e0c07b868cab405ab4b5335a0247899bfc5ea0b6
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Dec 1 16:26:20 2008 -0600
+
+ net: Define IP flag field values
+
+ These defines were pulled from the "Add simple
+ IP/UDP fragmentation support" patch from Frank
+ Haverkamp <haver@vnet.ibm.com>.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 23afaba65ec5206757e589ef334a8b38168c045f
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Tue Dec 2 10:31:04 2008 +0100
+
+ net: tsec: Fix Marvell 88E1121R phy init
+
+ This patch tries to ensure that phy interrupt pin
+ won't be asserted after booting. We experienced
+ following issues with current 88E1121R phy init:
+
+ Marvell 88E1121R phy can be hardware-configured
+ to share MDC/MDIO and interrupt pins for both ports
+ P0 and P1 (e.g. as configured on socrates board).
+ Port 0 interrupt pin will be shared by both ports
+ in such configuration. After booting Linux and
+ configuring eth0 interface, port 0 phy interrupts
+ are enabled. After rebooting without proper eth0
+ interface shutdown port 0 phy interrupts remain
+ enabled so any change on port 0 (link status, etc.)
+ cause assertion of the interrupt. Now booting Linux
+ and configuring eth1 interface will cause permanent
+ phy interrupt storm as the registered phy 1 interrupt
+ handler doesn't acknowledge phy 0 interrupts. This
+ of course should be fixed in Linux driver too.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 2e4970d8109d690adcf615d9e3cac7b5b2e8eaed
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Dec 2 12:59:51 2008 -0600
+
+ net: Fix download command parsing
+
+ When CONFIG_SYS_HUSH_PARSER is defined network download
+ commands with 1 argument in the format 'tftp "/path/file"'
+ do not work as expected. The hush command parser strips
+ the quotes from "/path/file" which causes the network
+ commands to interpret "/path/file" as an address
+ instead of the intended filename.
+
+ The previous check for a leading quote in netboot_common()
+ was replaced with a check which ensures only valid
+ numbers are treated as addresses.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 3c2c2f427905040c1513d0c51d637689cba48346
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Thu Nov 27 22:30:27 2008 +0100
+
+ Remove non-ascii characters from fat code
+
+ This code contains some non-ascii characters in comment lines and code.
+ Most editors do not display those characters properly and editing those
+ files results always in diffs at these places which are usually not required
+ to be changed at all. This is error prone.
+
+ So, remove those weird characters and replace them by normal C-style
+ equivalents for which the proper defines were already in the header.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit dc889e865356497d3e495570118c2245ebce2631
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Nov 28 20:16:58 2008 +0800
+
+ 85xx: fix the wrong DDR settings for MPC8572DS
+
+ The default DDR freq is 400MHz or 800M data rate,
+ the old settings is pure wrong for the default case.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 9df59533f77de2829b4b66e5b7620e04edaa391c
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Nov 24 10:29:26 2008 -0600
+
+ 85xx: init gd as early as possible
+
+ Moved up the initialization of GD so C code like set_tlb() can use
+ gd->flags to determine if we've relocated or not in the future.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit aed461af81012a398a205e9be67ab37667491838
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Nov 24 10:29:25 2008 -0600
+
+ 85xx: Fix relocation of CCSRBAR
+
+ If the virtual address for CCSRBAR is the same after relocation but
+ the physical address is changing we'd end up having two TLB entries with
+ the same VA. Instead we new us the new CCSRBAR virt address + 4k as a
+ temp virt address to access the old CCSRBAR to relocate it.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit ea154a1781135d822eedee7567cc156089eae93c
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Nov 24 10:25:14 2008 -0600
+
+ FSL: Moved BR_PHYS_ADDR for localbus to common header
+
+ The BR_PHYS_ADDR macro is useful on all machines that have local bus
+ which is pretty much all 83xx/85xx/86xx chips.
+
+ Additionally most 85xx & 86xx will need it if they want to support
+ 36-bit physical addresses.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 9427ccde0355a2ebf47454e8e1be59f5b9864e08
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Dec 1 13:47:12 2008 -0600
+
+ 85xx: Add PORDEVSR_PCI1 define
+
+ Add define used to determine if PCI1 interface is in PCI or PCIX mode.
+
+ Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 35db1c6d34b57ae15e99cf03c8e8f8a6148d74f3
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Fri Nov 21 19:24:22 2008 -0600
+
+ drivers/fsl_pci_init: Fix inbound window mapping bug
+
+ The current code will cause the creation of a 4GB window
+ starting at 0 if we have more than 4GB of RAM installed,
+ which overlaps with PCI_MEM space and causes pci_bus_to_phys()
+ to return erroneous information. Limit the size to 4GB - 1;
+ which causes the code to create one 2GB and one 1GB window
+ instead.
+
+ Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 5a105a333dab6a23e92d763ce76d6f31d57f45df
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Thu Nov 20 15:36:48 2008 -0600
+
+ Removed unused CONFIG_L1_INIT_RAM symbol.
+
+ Prevent further viral propogation of the unused
+ symbol CONFIG_L1_INIT_RAM by just removing it.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 7008d26a40a76f90cae5824c812cfed449fb97b8
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Oct 29 09:21:44 2008 -0500
+
+ fsl ddr skip interleaving if not supported.
+
+ Removed while(1) hang if memctl_intlv_ctl is set wrong.
+ Remove embedded tabs from strings.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit dd332e18d082de75eca3fc2c7c778f5d4571a096
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Thu Nov 13 18:08:57 2008 +0100
+
+ 85xx: socrates: fix DDR SDRAM tlb entry configuration
+
+ since commit be0bd8234b9777ecd63c4c686f72af070d886517
+ tlb entry for socrates DDR SDRAM will be reconfigured
+ by setup_ddr_tlbs() from initdram() causing an
+ inconsistency with previously configured DDR SDRAM tlb
+ entry from tlb_table:
+
+ socrates>l2cam 7 9
+ IDX PID EPN SIZE V TS RPN U0-U3 WIMGE UUUSSS
+ 7 : 00 00000000 256MB V 0 -> 0_00000000 0000 -I-G- ---RWX
+ 8 : 00 00000000 256MB V 0 -> 0_00000000 0000 ----- ---RWX
+ 9 : 00 10000000 256MB V 0 -> 0_10000000 0000 ----- ---RWX
+
+ This patch makes the presence of the DDR SDRAM tlb entry in
+ the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this
+ inconsistency.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit a2cd50ed6ef0ac6b127b3d6db756979a8336718d
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Nov 11 10:17:10 2008 -0600
+
+ 85xx: Add CPU 2 errata workaround to all 8548 boards
+
+ All mpc8548-based boards should implement the suggested workaround
+ to CPU 2 errata. Without the workaround, its possible for the
+ 8548's core to hang while executing a msync or mbar 0 instruction
+ and a snoopable transaction from an I/O master tagged to make
+ quick forward progress is present.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit e57f0fa1333cdf3ca36110aac2900712a5f82976
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 28 17:53:45 2008 +0800
+
+ 85xx: the DDR tlb is missed for the !CONFIG_SPD_EEPROM case
+
+ we need TLB entry for DDR at !SPD case.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 9b0ad1b1c7a15ff674978705c7c52264978dc5d8
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 28 17:53:38 2008 +0800
+
+ 85xx: remove the unused ddr_enable_ecc in the board file
+
+ The DDR controller of 8548/8544/8568/8572/8536 processors
+ have the ECC data init feature, and the new DDR code is
+ using the feature, and we don't need the way with DMA to
+ init memory any more.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 4a129a57d923f7c15aa1f567028a80a32d66a100
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Nov 30 19:36:53 2008 +0100
+
+ at91rm9200dk: Fix typo
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit ed3b18e05c9a8ffa5fb643da9bcec7452e5d5e01
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Nov 30 19:36:50 2008 +0100
+
+ AT91: remove non supported board AT91RM9200DF macro
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit bd876772ee04095e5dd943d97515a1f14bad4b1c
+Author: Ilko Iliev <iliev@ronetix.at>
+Date: Tue Dec 2 17:27:54 2008 +0100
+
+ mtd/dataflash.c: fix a problem with the last partition
+
+ This patch fix the problem that only the [NB_DATAFLASH_AREA - 1] dataflash
+ partition can be defined to use the area to the end of dataflash size.
+ Now it is possible to have only one dataflash partition from 0 to the end
+ of of dataflash size.
+
+ Signed-off-by: Ilko Iliev <iliev@ronetix.at>
+
+commit 03f797793b124dccaae145b977d15d6cb9e74504
+Author: Ilko Iliev <iliev@ronetix.at>
+Date: Tue Dec 2 17:20:17 2008 +0100
+
+ fix some coding style violations.
+
+ This patch fix some coding style violations.
+
+ Signed-off-by: Ilko Iliev <iliev@ronetix.at>
+
+commit 5e46b1e54112f4b7fd5185665e571510132c12a7
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Nov 27 14:11:37 2008 +0100
+
+ OneNAND: Add missing mtd info struct before calling onenand_erase()
+
+ Without this patch "saveenv" crashes when MTD partitions are enabled (e.g.
+ for use in UBI) via CONFIG_MTD_PARTITIONS.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 29382d4064fbaff5daacff4c3209370fa5713966
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Thu Nov 20 16:43:52 2008 -0600
+
+ mpc8641: Fix error in README
+
+ I made some updates to the code that didn't make it into the
+ README - fix this
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 801a194616d95e6fc426a176d9615ccbf9876c7f
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Thu Nov 20 12:01:02 2008 -0600
+
+ Removed unused CONFIG_L1_INIT_RAM symbol.
+
+ Prevent further viral propogation of the unused
+ symbol CONFIG_L1_INIT_RAM by just removing it.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit f698738e46cb461e28c2d58228bb34a2fcf5a475
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Thu Nov 20 14:02:56 2008 -0600
+
+ 86xx: Fix non-64-bit compilation problems.
+
+ Introducing 64-bit (36-bit) support for the MPC8641HPCN
+ failed to accomodate the other two 86xx boards.
+ Introduce definitions for CONFIG_SYS_CCSRBAR_PHYS_{LOW,HIGH}
+ CONFIG_SYS_CCSR_DEFAULT_DBAT{U,L} and CONFIG_SYS_CCSR_DEFAULT_IBAT{U,L}
+ with nominal 32-bit values.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Acked-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit bebfc6ef3ec994c8e18783269b1d8d41f8e38afd
+Author: Michael Trimarchi <trimarchi@gandalf.sssup.it>
+Date: Wed Nov 26 17:40:37 2008 +0100
+
+ Remove obsolete command (apply afte USB style patch, 80 chars strict)
+
+ Remove USB obsolete commmand
+
+ Signed-off-by: Michael Trimarchi <trimarchi@gandalf.sssup.it>
+ Signed-off-by: Remy Böhmer <linux@bohmer.net>
+
+commit de39f8c19d7c12017248c49d432dcb81db68f724
+Author: Michael Trimarchi <trimarchi@gandalf.sssup.it>
+Date: Wed Nov 26 17:41:34 2008 +0100
+
+ USB style patch, 80 chars strict
+
+ USB Code style patch
+
+ Signed-off-by: Michael Trimarchi <trimarchi@gandalf.sssup.it>
+ Signed-off-by: Remy Böhmer <linux@bohmer.net>
+
+commit d10c5a87cb8affbb4d35a311370316d4383d598e
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Nov 7 22:46:21 2008 +0100
+
+ drivers/usb: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Remy Böhmer <linux@bohmer.net>
+
+commit 2077e348c2a84901022ad95311b47b70361e6daa
+Author: Scott Wood <scottwood@freescale.com>
+Date: Tue Nov 25 10:47:02 2008 -0600
+
+ NAND: Fix misplaced return statement in nand_{read,write}_skip_bad().
+
+ This caused the operation to be needlessly repeated if there were
+ no bad blocks and no errors.
+
+ Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 89295028e7d8f7a524f485328279d72fdb102385
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon Nov 24 12:09:50 2008 +0100
+
+ ppc4xx: ml300 remove Xilinx BSP from ml300 folder
+
+ This BSP should be outside u-boot source tree.
+ The second reason is that xilinx ppc405 was moved to generic platform.
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 24eea623d4974a169026a975ba12fb23d48154b1
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Mon Nov 24 15:11:10 2008 +0100
+
+ ppc4xx: Remove unused features
+
+ This patch disables some unused features from the PCI405 configuration
+ to keep U-Boot image size below 192k.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0c2385c3bb51f5d3911fce1ec4720db86b534c2b
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Mon Nov 24 15:11:09 2008 +0100
+
+ ppc4xx: Use correct io accessors for PCI405
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 348c849d86a6f0785752b9bc497a34658713d1d1
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Mon Nov 24 15:11:08 2008 +0100
+
+ ppc4xx: Remove unused code from PCI405 code
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 633639587e3596f0dbf5e6247dd3faf80b1d9063
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Nov 20 09:59:09 2008 +0100
+
+ powerpc, keymile boards: extract identical config options
+
+ This patch extracts the identical config options for the
+ keymile boards mgcoge, mgsuvd and kmeter1 in a new
+ common config file keymile-common.h.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 9482a8e3d6ac766d90e5059dce777b1e4c868a30
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Nov 21 08:29:40 2008 +0100
+
+ powerpc: keymile: Add a check for the PIGGY debug board
+
+ Check the presence of the PIGGY on the keymile boards mgcoge,
+ mgsuvd and kmeter1. If the PIGGY is not present, dont register
+ this Ethernet device.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 58c696eed839af894e0265064669c402dc28b371
+Author: Wolfgang Denk <wd@xpert.denx.de>
+Date: Mon Nov 24 21:50:59 2008 +0100
+
+ AT91RM9200DK: fix broken boot from NOR flash
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 8052352f20b33bef8f9872fc983eac73d4693c38
+Author: Jens Scharsig <esw@bus-elektronik.de>
+Date: Tue Nov 18 10:48:46 2008 +0100
+
+ at91rm9200: fix broken boot from nor flash
+
+ This patch fix the broken boot from NOR Flash on AT91RM9200 boards, if
+ CONFIG_AT91RM9200 is defined and nor preloader is used.
+
+ Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
+
+commit 25ea652e907516a283b38237e83712a918f125d7
+Author: Piotr Ziecik <kosmo@semihalf.com>
+Date: Mon Nov 17 15:58:00 2008 +0100
+
+ UBI: Add proof-of-concept CFI flash support
+
+ With this patch UBI can be used on CFI flash chips.
+
+ Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e6a7edbc1778d27431ac663b40a71dafa5d20578
+Author: Piotr Ziecik <kosmo@semihalf.com>
+Date: Mon Nov 17 15:57:59 2008 +0100
+
+ mtd: Remove a printf() from add_mtd_device().
+
+ Remove a printf() from add_mtd_device(), which produces spurious output.
+
+ Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 91809ed51d8327a8dbbf29aa98a091154c282171
+Author: Piotr Ziecik <kosmo@semihalf.com>
+Date: Mon Nov 17 15:57:58 2008 +0100
+
+ cfi-mtd: Add cfi-mtd driver.
+
+ Add cfi-mtd driver, which exports CFI flash to MTD layer.
+ This allows CFI flash devices to be used from MTD layer.
+
+ Building of the new driver is controlled by CONFIG_FLASH_CFI_MTD
+ option. Initialization is done by calling cfi_mtd_init() from
+ flash_init().
+
+ Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6ea808efdf9aa5d9067fbfac32acde8539129ed2
+Author: Piotr Ziecik <kosmo@semihalf.com>
+Date: Mon Nov 17 15:49:32 2008 +0100
+
+ cfi_flash: Add interface for flash verbosity control
+
+ Add interface for flash verbosity control. It allows
+ to disable output from low-level flash API. It is useful
+ when calling these low-level functions from context other
+ than flash commands (for example the MTD/CFI interface
+ implmentation).
+
+ Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ebc9784ce6528385bb8d2558e783622d4bbf20f8
+Author: Piotr Ziecik <kosmo@semihalf.com>
+Date: Thu Nov 20 15:17:38 2008 +0100
+
+ cfi_flash: Export flash_sector_size() function.
+
+ Export flash_sector_size() function from drivers/mtd/cfi_flash.c,
+ so that it can be used in the upcoming cfi-mtd driver.
+
+ Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 45aa5a7f4d5bcb79927ddfc896c1d7c4326e235d
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 17 14:45:22 2008 +0100
+
+ cfi_flash: Make all flash access functions weak
+
+ This patch defines all flash access functions as weak so that
+ they can be overridden by board specific versions.
+
+ This will be used by the upcoming VCTH board support where the NOR
+ FLASH unfortunately can't be accessed memory-mapped. Special
+ accessor functions are needed here.
+
+ To enable this weak functions you need to define
+ CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS in your board config header.
+ Otherwise the "old" default functions will be used resulting
+ in smaller code.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit a5c4067017631d903e1afa6ad615f0ce19fea517
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 24 08:31:16 2008 +0100
+
+ UBI: Change parsing of size in commands to default to hex
+
+ Currently the size parameters of the UBI commands (e.g. "ubi write") are
+ decoded as decimal instead of hex as default. This patch now interprets
+ all these values consistantly as hex, as all other standard U-Boot commands
+ do.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit de01c76c3ccc4e6c5989228eed58e955a3a1a968
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Nov 21 13:06:06 2008 +0100
+
+ ppc4xx: ML2 shouldn't include the 4xx EMAC driver
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1a6a00dcc5bdfc6e9b4b00f39c1f583a7f96fc7f
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Fri Nov 14 16:19:19 2008 +0300
+
+ ppc4xx: katmai: Change default config
+
+ This patch enables support for EXT2, and increases the
+ CONFIG_SYS_BOOTMAPSZ size for the default configuration
+ of the katmai boards to use them as the RAID-reference
+ AMCC setups.
+
+ EXT2 enabling allows one to boot kernels from the EXT2
+ formatted Compact Flash cards.
+
+ CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the
+ Linux kernels, which use PAGE_SIZE of 256KB. Otherwise,
+ the memory area with DTB file (which is placed at the
+ end of the bootmap area) will turn out to be overlapped
+ with the BSS segment of the 256KB kernel, and zeroed
+ in early_init() of Linux.
+
+ Actually, increasing of the bootmap size could be done
+ via setting of the bootm_size U-Boot variable, but it looks
+ like the current U-Boot implementation have some bootm_size-
+ related functionality lost. In many places through the U-Boot
+ code the CONFIG_SYS_BOOTMAPSZ definition is used directly
+ (instead of trying to read the corresponding value from the
+ environment). The same is truth for the boot_jump_linux()
+ function in lib_ppc/bootm.c, where U-Boot transfers control
+ to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size)
+ value to the booting kernel.
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+ Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ddf45cc758d394591fb9bcdcbe96530f733f2bce
+Author: Dave Mitchell <dmitch71@gmail.com>
+Date: Thu Nov 20 14:09:50 2008 -0600
+
+ ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization
+
+ Expanded OCM TLB to allow access to 64K OCM as well as 256K of
+ internal SRAM.
+
+ Adjusted internal SRAM initialization to match updated user
+ manual recommendation.
+
+ OCM & ISRAM are now mapped as follows:
+ physical virtual size
+ ISRAM 0x4_0000_0000 0xE300_0000 256k
+ OCM 0x4_0004_0000 0xE304_0000 64k
+
+ A single TLB was used for this mapping.
+
+ Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b14ca4b61a681f75f3125676e09d7ce6af66e927
+Author: Dave Mitchell <dmitch71@gmail.com>
+Date: Thu Nov 20 14:00:49 2008 -0600
+
+ ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs
+
+ Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and
+ L2 cache DCRs from ppc440.h to this new header.
+
+ Also converted these DCR defines from lowercase to uppercase and
+ modified referencing modules to use them.
+
+ Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 711e2b2af820d21d9931d4cf8057d3894600fd54
+Author: Steven A. Falco <sfalco@harris.com>
+Date: Thu Nov 20 14:37:57 2008 -0500
+
+ ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.h
+
+ The definitions of bits in SDR_CFG are incorrect, and not used within
+ U-Boot. Therefore, they can be removed.
+
+ The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions,
+ and are unused, so they can be removed too.
+
+ A definition for SDR0_DDRCFG is added.
+
+ Signed-off-by: Steven A. Falco <sfalco@harris.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e23c7c95a96eb0f068efe5c532215a10a1512a95
+Author: Dirk Behme <dirk.behme@gmail.com>
+Date: Mon Nov 10 20:15:25 2008 +0100
+
+ ARM: OMAP: Convert IO macros
+
+ Convert IO macros to readx/writex.
+
+ Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
+
+commit 263b749e2e25473a48776d317bd2a7e2ddcdd212
+Author: Ilko Iliev <iliev@ronetix.at>
+Date: Sun Nov 9 15:53:14 2008 +0100
+
+ lib_arm: do_bootm_linux() - correct a small mistake
+
+ This patch corrects a small bug in the "if" condition:
+ the parameter "flag" is 0 and the "if" condition is always true.
+ The result is - the boom command doesn't start the kernel.
+ Affected targets: all arm based.
+
+ Signed-off-by: Ilko Iliev <iliev@ronetix.at>
+
+commit 3e0cda071a67cb5709e3fa4faf6b31a731859acc
+Author: Stelian Pop <stelian@popies.net>
+Date: Sun Nov 9 00:14:46 2008 +0100
+
+ AT91: Enable PLLB for USB
+
+ At least some (old ?) versions of the AT91Bootstrap do not set up the
+ PLLB correctly to 48 MHz in order to make USB host function correctly.
+
+ This patch sets up the PLLB to the same values Linux uses, and makes USB
+ work ok on the following CPUs:
+ - AT91CAP9
+ - AT91SAM9260
+ - AT91SAM9263
+
+ This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all
+ the relevant AT91CAP9/AT91SAM9 atmel boards.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit ad229a44e162af0f65e57e4e3dc133d5f0364ecb
+Author: Stelian Pop <stelian@popies.net>
+Date: Fri Nov 7 13:55:14 2008 +0100
+
+ AT91: Use AT91_CPU_CLOCK in displays
+
+ Introduce AT91_CPU_CLOCK and use it for displaying the CPU
+ speed in the LCD driver.
+
+ Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the
+ corresponding board clocks.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+
+commit fed36ac5ae613773b6cd90e61e292c45440e10c8
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Nov 20 09:57:47 2008 +0100
+
+ powerpc: 83xx: add support for the kmeter1 board
+
+ This patch adds support for the kmeter1 board from Keymile,
+ based on a Freescale MPC8360 CPU.
+
+ - serial console on UART 1
+ - 256 MB DDR2 RAM
+ - 64 MB NOR Flash
+ - Ethernet RMII Mode over UCC4
+ - PHY SMSC LAN8700
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 25fb4eaaeab3f8866020818f4729d990dcc91cf0
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Nov 20 11:46:20 2008 +0100
+
+ ppc4xx: Clear all potentially pending exceptions in MCSR
+
+ This is needed on Canyonlands which still has an exception pending
+ while running relocate_code(). This leads to a failure after trap_init()
+ is moved to the top of board_init_r().
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit facdad5f2602e899a01746916beddbf9e856b5ee
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Nov 19 10:10:30 2008 +0100
+
+ powerpc: 83xx: add missing TIMING_CFG1_CASLAT_* defines
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 2f2a5c3714d17f4ead18b713128b7226e0e822f4
+Author: Howard Gregory <Greg.Howard@freescale.com>
+Date: Tue Nov 4 14:55:33 2008 +0800
+
+ mpc83xx: Improve the performance of DDR memory
+
+ modify the CAS timings. my understanding is that these
+ settings decrease various wait times in the DDR interface.
+ Because these wait times are in clock cycles, and the DDR
+ clock on the 8315 RDB runs slower than on some other 83xx
+ platforms, we can dial down these values without a problem,
+ thereby decreasing the latency of memory a little.
+
+ Signed-off-by: Howard Gregory <Greg.Howard@freescale.com>
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 8000b086b33a5a81f3f390f37e178db7956dc08b
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Fri Oct 24 14:55:33 2008 +0200
+
+ ARM: Add Apollon UBI support
+
+ To enable UBI on Apollon you need to uncomment the CONFIG_SYS_USE_UBI
+ macro.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 694a0b3f1c0accd0de94b89555155d69f8022824
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Wed Nov 19 11:47:05 2008 +0100
+
+ UBI: Add UBI command support
+
+ This patch adds these UBI commands:
+
+ ubi part [nand|onenand] [part] - Show or set current partition
+ ubi info [l[ayout]] -Display volume and UBI layout information
+ ubi create[vol] volume [size] [type] - Create volume name with size
+ ubi write[vol] address volume size - Write volume from address with size
+ ubi read[vol] address volume [size] - Read volume to address with size
+ ubi remove[vol] volume - Remove volume
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 58be3a1056d88c6d05f3e914389282807e69923a
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Wed Nov 19 16:38:24 2008 +0100
+
+ UBI: Add basic UBI support to U-Boot (Part 8/8)
+
+ This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
+ It's based on the Linux UBI version and basically has a "OS"
+ translation wrapper that defines most Linux specific calls
+ (spin_lock() etc.) into no-ops. Some source code parts have been
+ uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
+ this version with the Linux version and simplifies future UBI
+ ports/bug-fixes from the Linux version.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 47ae6693f54f80455ae32c2e0d995e0e4bdc15b9
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Wed Nov 19 16:36:36 2008 +0100
+
+ UBI: Add basic UBI support to U-Boot (Part 7/8)
+
+ This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
+ It's based on the Linux UBI version and basically has a "OS"
+ translation wrapper that defines most Linux specific calls
+ (spin_lock() etc.) into no-ops. Some source code parts have been
+ uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
+ this version with the Linux version and simplifies future UBI
+ ports/bug-fixes from the Linux version.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7e6ee7ad27de5216db1baef76f38c3429c8f4a2a
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Wed Nov 19 16:32:36 2008 +0100
+
+ UBI: Add basic UBI support to U-Boot (Part 6/8)
+
+ This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
+ It's based on the Linux UBI version and basically has a "OS"
+ translation wrapper that defines most Linux specific calls
+ (spin_lock() etc.) into no-ops. Some source code parts have been
+ uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
+ this version with the Linux version and simplifies future UBI
+ ports/bug-fixes from the Linux version.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c91a719daa331b5856109313371e4ece5ec06d96
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Wed Nov 19 16:28:06 2008 +0100
+
+ UBI: Add basic UBI support to U-Boot (Part 5/8)
+
+ This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
+ It's based on the Linux UBI version and basically has a "OS"
+ translation wrapper that defines most Linux specific calls
+ (spin_lock() etc.) into no-ops. Some source code parts have been
+ uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
+ this version with the Linux version and simplifies future UBI
+ ports/bug-fixes from the Linux version.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f412fefa079c6aa9a9763f6869bf787ea6bf6e1b
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Wed Nov 19 16:27:23 2008 +0100
+
+ UBI: Add basic UBI support to U-Boot (Part 4/8)
+
+ This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
+ It's based on the Linux UBI version and basically has a "OS"
+ translation wrapper that defines most Linux specific calls
+ (spin_lock() etc.) into no-ops. Some source code parts have been
+ uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
+ this version with the Linux version and simplifies future UBI
+ ports/bug-fixes from the Linux version.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2d262c4853cb5b6ddce1a28a9641f2de3688d7ea
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Wed Nov 19 16:26:54 2008 +0100
+
+ UBI: Add basic UBI support to U-Boot (Part 3/8)
+
+ This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
+ It's based on the Linux UBI version and basically has a "OS"
+ translation wrapper that defines most Linux specific calls
+ (spin_lock() etc.) into no-ops. Some source code parts have been
+ uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
+ this version with the Linux version and simplifies future UBI
+ ports/bug-fixes from the Linux version.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 961df83361aff9a14f226214224eb8a06e05ba24
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Wed Nov 19 16:25:44 2008 +0100
+
+ UBI: Add basic UBI support to U-Boot (Part 2/8)
+
+ This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
+ It's based on the Linux UBI version and basically has a "OS"
+ translation wrapper that defines most Linux specific calls
+ (spin_lock() etc.) into no-ops. Some source code parts have been
+ uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
+ this version with the Linux version and simplifies future UBI
+ ports/bug-fixes from the Linux version.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f399d4a281713d5ef2d764f05d545fe61e3bd569
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Wed Nov 19 16:23:06 2008 +0100
+
+ UBI: Add basic UBI support to U-Boot (Part 1/8)
+
+ This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
+ It's based on the Linux UBI version and basically has a "OS"
+ translation wrapper that defines most Linux specific calls
+ (spin_lock() etc.) into no-ops. Some source code parts have been
+ uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
+ this version with the Linux version and simplifies future UBI
+ ports/bug-fixes from the Linux version.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e29c22f5abe6e0f4baa6251efed6074cdfc3db79
+Author: Kyungmin Park <kyungmin.park@samsung.com>
+Date: Wed Nov 19 16:20:36 2008 +0100
+
+ MTD: Add MTD paritioning infrastructure
+
+ This MTD part infrastructure will be used by the upcoming
+ UBI support.
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9b827cf1720acda2473afa516956eab6f7cca9a1
+Author: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
+Date: Thu Oct 16 22:54:03 2008 +0530
+
+ Align end of bss by 4 bytes
+
+ Most of the bss initialization loop increments 4 bytes
+ at a time. And the loop end is checked for an 'equal'
+ condition. Make the bss end address aligned by 4, so
+ that the loop will end as expected.
+
+ Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 3f510db522d160179dff3ddcce9b18f6241c2c24
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Mon Nov 10 19:45:35 2008 -0600
+
+ mpc8641: fix address-cells default in old .dts detection
+
+ address-cells defaults to 2, not 1; so in the unlikely
+ event that it isn't specified, this patch is required
+ for correct operation.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit d025aa4b20a0618a2bada0132a9a0a4afb717f1a
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Fri Oct 31 17:14:39 2008 -0500
+
+ lib_ppc: Move trap_init to occur earlier
+
+ Doing trap_init immediately once we're running from RAM
+ means we're no longer dependent on the physical location of
+ the flash on non-BookE platforms. Before trap_init, those
+ platforms switch to real mode and go to 0xfff00100 on exception.
+ After the switch, they go to 0x00000100 This makes it easier to
+ move the flash location.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit d52082b12c6e545705a19433a2f4142526536189
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Fri Nov 7 13:46:19 2008 -0600
+
+ mpc8641: Try to detect old .dts files
+
+ Since we've changed the memory map of the board, be nice and
+ add some checking to try to catch out-of-date .dts files. We do
+ this by checking the CCSRBAR location in the .dts and comparing
+ it to the CCSRBAR location in u-boot. If they don't match, a
+ warning msg is printed. This isn't foolproof, but it's simple and
+ will catch most of the cases where an out-of-date .dts is present,
+ including all of the cases where a new u-boot is used with an old
+ standard MPC8641 .dts file as supplied with Linux.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 8db0400a27839f91c047dcb83f4a0f09e054a180
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Thu Nov 6 13:04:09 2008 -0600
+
+ toplevel Makefile: Add MPC8641HPCN_36BIT target
+
+ This will enable CONFIG_PHYS_36BIT for MPC8641HPCN.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 3111d32c494e8251b90917447796a7206b757e1e
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Thu Nov 6 17:37:35 2008 -0600
+
+ mpc8641: Support 36-bit physical addressing
+
+ This patch creates a memory map with all the devices
+ in 36-bit physical space, in addition to the 32-bit map.
+ The CCSR relocation is moved (again, sorry) to
+ allow for the physical address to be 36 bits - this
+ requires translation to be enabled. With 36-bit physical
+ addressing enabled, we are no longer running with VA=PA
+ translations. This means we have to distinguish between
+ the two in the config file. The existing region name is
+ used to indicate the virtual address, and a _PHYS variety
+ is created to represent the physical address.
+
+ Large physical addressing is not enabled by default.
+ Set CONFIG_PHYS_64BIT in the config file to turn this on.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit c759a01a0022de9378a3a761f49786f87684c916
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Thu Nov 6 17:36:04 2008 -0600
+
+ mpc8641: Change 32-bit memory map
+
+ The memory map on the 8641hpcn is modified to look more like
+ the 85xx boards; this is a step towards a more standardized
+ layout going forward. As part of this change, we now relocate
+ the flash.
+
+ The regions for some of the mappings were far larger than they
+ needed to be. I have reduced the mappings to match the
+ actual sizes supported by the hardware.
+
+ In addition I have removed the comments at the head
+ of the BAT blocks in the config file, rather than updating
+ them. These get horribly out of date, and it's a simple
+ matter to look at the defines to see what they are set to
+ since everything is right here in the same file.
+
+ Documentation has been changed to reflect the new map, as this
+ change is user visible, and affects the OS which runs post-uboot.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit bf9a8c34309ed9276258295db9e9212aabb2531a
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Wed Nov 5 14:55:35 2008 -0600
+
+ mpc86xx: Change early FLASH mapping to 1M at CONFIG_MONITOR_BASE_EARLY
+
+ We define CONFIG_MONITOR_BASE_EARLY to define the initial location
+ of the bootpage in flash. Use this to create an early mapping
+ definition for the FLASH, and change the early_bats code to use this.
+
+ This change facilitates the relocation of the flash since the early
+ mappings are no longer tied to the final location of the flash.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit c1e1cf69547b138173f87a7f81c42a5d8dbfde3d
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Wed Nov 5 14:55:34 2008 -0600
+
+ mpc86xx: Use SRR0/1/rfi to enable address translation, not blr
+
+ Using a mtmsr/blr means that you have to be executing at the
+ same virtual address once you enable translation. This is
+ unnecessarily restrictive, and is not really how this is
+ usually done. Change it to use the more common mtspr SRR0/SRR1
+ and rfi method.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 6bf98b1362f0cb237620355ed3e6762fff82388d
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Wed Nov 5 14:55:33 2008 -0600
+
+ mpc8641: make DIAG_ADDR == FLASH_BASE
+
+ Currently, that's what it is, but it's hardcoded.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 170deacb1ddc39164bdb68f3963e0c0456a5369b
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Wed Nov 5 14:55:32 2008 -0600
+
+ mpc8641: Drop imaginary second flash bank, map 8MB
+
+ There's a lot of setup and foo for the second flash
+ bank. The problem is, this board doesn't actually have one.
+ Clean this up. Also, the flash is 8M in size. Get rid
+ of the confusing aliased overmapping, and just map 8M.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 0f2d66027bfc60dc7eea2f096af8891988c5abe4
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Wed Nov 5 14:55:31 2008 -0600
+
+ mpc8641: only define CONFIG_ENV_SIZE once
+
+ It's currently defined twice inside in an if/else block, but
+ both halves set the same value. Move the define outside
+ the if.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 24bfb48c35fed6ad1f047e3e4a27df302482cd93
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Wed Nov 5 14:55:30 2008 -0600
+
+ mpc86xx: Move setup_bats into cpu_init_f
+
+ In order to later allow for a physical relocation of the
+ flash, setup_bats, which sets up the final BAT mapping
+ for the board, needs to happen *after* init_laws().
+ Otherwise, there will be no window programmed for the flash
+ at the new physical location at the point when we change
+ the mmu translation.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 05df3e5a638be8c5b0899eae1766bbe8e4b92c17
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Wed Nov 5 14:55:29 2008 -0600
+
+ mpc8641: Remove extra "0" from BR2 define
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit edf3fe7d39a1ee07353128af5221422ce9ccfad6
+Author: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+Date: Thu Oct 23 09:08:18 2008 -0400
+
+ drivers/qe/uec_phy.c: Added PHY-less (fixed PHY) driver.
+
+ Copied over the fixed PHY driver as used in pp4xx/4xx_enet.c.
+ This adds support for PHY-less MAC connections to the UEC.
+
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 54bdcc9fb6670afde9c26dcf364f582879bf21d6
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Oct 23 16:27:24 2008 +0000
+
+ ColdFire: Add mii driver in drivers/net
+
+ All CF platforms' mii.c are consolidated into one
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 25a859066b3af1070eb69f12022113c0a91bd813
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Mon Oct 27 23:53:17 2008 -0700
+
+ Moved initialization of PPC4xx EMAC to cpu_eth_init()
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 4d03a4e20e58552cb96d61a0e8b56cdb6cc60126
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Nov 9 21:29:23 2008 -0800
+
+ Moved PPC4xx EMAC driver to drivers/net
+
+ Also changed path in all linker scripts that reference this driver
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 96e21f86e8266ed40759e5495ee461265d7f6d28
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Mon Oct 27 23:50:15 2008 -0700
+
+ Changed PPC4xx EMAC driver to require CONFIG_PPC4xx_EMAC
+
+ All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 9eb79bd8856bcab896ed5e1f1bca159807a124dd
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Thu Oct 23 22:02:49 2008 -0700
+
+ Moved initialization of MPC8XX SCC to cpu_eth_init()
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit a9bec96d6359ac9f90a852962bf3040cad9e0256
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Wed Oct 22 23:47:51 2008 -0700
+
+ Moved initialization of MPC8220 FEC to cpu_eth_init()
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 0e8454e990385a58f708c2fc26d31ac041c7a6c5
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Wed Oct 22 23:32:48 2008 -0700
+
+ Moved initialization of QE Ethernet controller to cpu_eth_init()
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 3456a148276d5494b53ee40242efb6462d163504
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Wed Oct 22 23:20:29 2008 -0700
+
+ Moved initialization of FCC Ethernet controller to cpu_eth_init
+
+ Affected boards:
+ Several MPC8xx boards
+ Several MPC8260/MPC8272 boards
+ Several MPC85xx boards
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 62e15b497f5c6334c059512678c8db7940ae4c61
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Thu Oct 30 22:15:35 2008 -0700
+
+ Fix typo in cpu/mpc85xx/cpu.c
+
+ CONFIG_MPC85xx_FEC -> CONFIG_MPC85XX_FEC
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 5dfb3ee3f54e2382a08d72906f0e79ecf944f6e3
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Sun Oct 19 12:08:50 2008 +0900
+
+ net: Move initialization of Au1x00 SoC ethernet MAC to cpu_eth_init
+
+ This patch will move au1x00_eth_initialize from net/eth.c to cpu_eth_init
+ as a part of ongoing eth_initialize cleanup work. The function ret value
+ is also fixed as it should be negative on fail.
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit cc94074ecac1885d18ddb683eb934b3c0268aa5b
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Fri Sep 5 01:55:22 2008 -0400
+
+ Moved initialization of IXP4XX_NPE Ethernet controller to cpu_eth_init()
+
+ Also, removed the driver initialization from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit f2a7806fc23e82d30c8548911369e0c530607354
+Author: Clive Stubbings <uboot@xentech.co.uk>
+Date: Mon Oct 27 15:05:00 2008 +0000
+
+ xilinx_emaclite buffer overrun
+
+ Patch to fix buffer allocation size and alignment. Buffer needs to be u32 aligned and
+ PKTSIZE_ALIGN bytes long.
+
+ Acked-by: Michal Simek <monstr@monstr.eu>
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 0115b1953718a2969f6469d3d5da51ba11e12d42
+Author: richardretanubun <richardretanubun@ruggedcom.com>
+Date: Fri Sep 26 08:59:12 2008 -0400
+
+ NET: QE: UEC: Make uec_miiphy_read() and uec_miiphy_write() use the devname arg.
+
+ The current uec_miiphy_read and uec_miiphy_write hardcode access devlist[0]
+ This patch makes these function use the devname argument that is passed in to
+ allow access to the phy registers of other devices in devlist[].
+
+ Signed-of-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 44dcb7332033db8de2810f2fffcae3084f15c8d4
+Author: richardretanubun <richardretanubun@ruggedcom.com>
+Date: Mon Oct 6 15:31:43 2008 -0400
+
+ Adds two more ethernet interface to 83xx
+
+ Fixed compiler warning "declared but unused" eth5_uec_info and eth6_uec_info.
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit d8003fa03733901b73d6c4667b4d80fc8eb1ddd3
+Author: Stelian Pop <stelian@popies.net>
+Date: Fri Nov 7 13:54:31 2008 +0100
+
+ AT91: Replace AT91_BASE_EMAC by the board specific values.
+
+ AT91_BASE_EMAC is never used outside the board specific files,
+ so replace its usage by the board specific AT91xxx_BASE_EMAC.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit c91e17affa175ce06afa89b04752301eb4a61666
+Author: Stelian Pop <stelian@popies.net>
+Date: Fri Nov 7 12:09:21 2008 +0100
+
+ AT91: Replace (undefined) AT91_ID_US* by the board specific values.
+
+ AT91_ID_US0 / AT91_ID_US1 / AT91_ID_US2 were used but never defined.
+ Since they are never used outside the board specific files, they can
+ be replaced by the board specific AT91xxx_ID_US0 / AT91xxx_ID_US1 /
+ AT91xxx_ID_US2.
+
+ Bug spotted by Jesus Alvarez <jalvarez@micromint.com>.
+
+ Signed-off-by: Stelian Pop <stelian@popies.net>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 28962f5a2de81bc0eed1c0b08c6bfaa1cc134ea2
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Nov 1 10:47:59 2008 +0100
+
+ Makefile/at91sam9: move some at91sam9 to the correct subsection for arm926ejs
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 1079432e04ccf71aa3684181186182cd63512f19
+Author: Sergey Lapin <slapin@ossfans.org>
+Date: Fri Oct 31 12:28:43 2008 +0100
+
+ Custom AFEB9260 board support
+
+ This patch provides support for AFEB9260 board, a product of
+ OpenSource hardware and software. Some commertial projects
+ are made with this design. A board is basically AT91SAM9260-EK
+ with some modifications and different peripherals and different
+ parts used. Main purpose of this project is to gain experience in
+ hardware design.
+ More info: http://groups.google.com/group/arm9fpga-evolution-board
+ (In Russian only, sorry).
+ Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb
+
+ Signed-off-by: Sergey Lapin <slapin@ossfans.org>
+
+commit 26eecd24f97130e56e9c2c2af0e714e05bce6e00
+Author: Tomohiro Masubuchi <tomohiro_masubuchiattripeaks.co.jp>
+Date: Tue Oct 21 13:17:16 2008 +0900
+
+ Change to use "do_div" macro
+
+ Signed-off-by: Tomohiro Masubuchi <tomohiro_masubuchi@tripeaks.co.jp>
+
+commit e352495318d8056a00faa21b633b3e4374bfbf52
+Author: Roman Mashak <romez777@gmail.com>
+Date: Wed Oct 22 16:00:26 2008 -0400
+
+ ARM926EJ-S: relocate OMAP specific 'cpuinfo.c' into OMAP directory
+
+ OMAP identification is implemented in 'cpuinfo.c' and located in ARM926EJ-S directory.
+ It makes sense to place this file in OMAP specific subdirectory, i.e. cpu/arm926ejs/omap
+
+ Signed-off-by: Roman Mashak <romez777@gmail.com>
+
+commit 248b2c367210c06dbd5fbdecf27e97fbe9d05fdb
+Author: Roman Mashak <romez777@gmail.com>
+Date: Tue Oct 21 03:01:41 2008 -0700
+
+ ARM/Versatile port: Removed unused functions
+
+ Removal of never used functions.
+
+ Signed-off-by: Roman Mashak <romez777@gmail.com>
+
+commit 1266df887781c779deaf6d05eea2ef90a470cb34
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Mon Nov 3 15:44:01 2008 -0600
+
+ powerpc: change 86xx SMP boot method
+
+ We put the bootpg for the secondary cpus into memory and use
+ BPTR to get to it. This is a step towards converting to the
+ ePAPR boot methodology. Also, the code is written to
+ deal properly with more than 4GB of RAM.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit b5431560682d8f318fbc49db87cfe13ab41d2ee4
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Fri Oct 31 17:13:49 2008 -0500
+
+ 8641HPCN: Config file cleanup
+
+ There are several items in the config file that were hardcoded
+ but that should really be based on other config options, since
+ the regions are contiguous and depend on being so. This cleans
+ that up a bit. Also, add BR_PHYS_ADDR() macro to convert
+ addresses into the proper format for BR registers.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 4c77de3f144ca088c3867bd6240718c10f5a9d69
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Fri Oct 31 17:13:32 2008 -0500
+
+ 86xx: Make dram_size a phys_size_t
+
+ It's currently a long and should be phys_size_t.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 104992fc541302a6bac74448e01e7fdad20abca0
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Sun Nov 2 18:19:32 2008 -0600
+
+ powerpc 86xx: Handle CCSR relocation earlier
+
+ Currently, the CCSR gets relocated while translation is
+ enabled, meaning we need 2 BAT translations to get to both the
+ old location and the new location. Also, the DEFAULT
+ CCSR location has a dependency on the BAT that maps the
+ FLASH region. Moving the relocation removes this unnecessary
+ dependency. This makes it easier and more intutive to
+ modify the board's memory map.
+
+ Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same
+ BAT for CCSR space.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit af5d100e8d5cd49d69d52d20f1181eb06ddb4ddf
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Fri Oct 31 17:14:14 2008 -0500
+
+ mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI build
+
+ You can't actually have both, and with some coming changes to
+ change the memory map for the board and support 36-bit physical,
+ we need the extra BAT that is being consumed by having both.
+
+ I also make non-PCI configs build cleanly, for the sake of sanity.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 98693b85d42ff438375dc6d6dcadc70eb7b050bb
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Fri Oct 31 17:14:00 2008 -0500
+
+ mpc8641: Stop supporting non-PCI_PNP configs
+
+ We don't actually ever do this, remove the code so we
+ can stop maintaining it.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit e4f69d1bd21a12049744989d2dd6b5199c9b8f23
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Fri Oct 24 12:59:12 2008 +0000
+
+ ColdFire: Fix M5329EVB and M5373EVB nand issue
+
+ Fix compilation issue caused by a few mismatches.
+ Provide proper nand chip select enable/disable in
+ nand_hwcontrol() rather than in board_nand_init()
+ just enable once. Remove redundant local nand driver
+ functions - nand_read_byte(), nand_write_byte() and
+ nand_dev_ready() to use common nand driver.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 1b2708442224a551a0b865b52710306333888932
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Oct 22 11:55:30 2008 +0000
+
+ ColdFire: Fix compilation error
+
+ The error was caused by the change for strmhz() in cpu.c.
+ A few of them were one extra close parenthesis.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 536e7dac16769954915a484e682a2efb28699133
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Oct 22 11:38:21 2008 +0000
+
+ ColdFire: Add MCF5301x CPU and M53017EVB support
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit a21d0c2cc9add8894d971ab791f4032f077db817
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Oct 21 15:37:02 2008 +0000
+
+ ColdFire: Add SBF support for M52277EVB
+
+ Add serial boot support
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit b202816c61042c183fe67d097a5893b0f2dafba0
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Oct 21 14:19:26 2008 +0000
+
+ ColdFire: Use CFI driver for M5272C3
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit f3962d3f574e5a1cffacd4e9bc48713060a2a314
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Oct 21 13:47:54 2008 +0000
+
+ ColdFire: Relocate FEC's GPIO and mii functions protocols
+
+ Place FEC pin assignments in cpu_init.c from platform's
+ mii.c
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 6e80f5aa09f8d41bac50b38dc7488ecd22107802
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Oct 21 12:15:44 2008 +0000
+
+ ColdFire: Remove platforms mii.c file
+
+ Will use mcfmii.c driver in drivers/net rather than
+ keep creating new mii.c for each future platform.
+ Remove EB+MCF-EV123, cobra5272, idmr, M5235EVB,
+ M5271EVB, M5272C3, M5275EVB, M5282EVB, M5329EVB,
+ M5373EVB, M54451EVB, M54455EVB, M547xEVB, and M548xEVB's
+ mii.c
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 012522fef3b382469125beb46a315ab4dee02fb0
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Oct 21 10:03:07 2008 +0000
+
+ ColdFire: Modules header files cleanup
+
+ Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG,
+ MDHA, SKHA, INTC, and FlexBus structures and
+ definitions in immap_5xxx.h to more unify modules
+ header files. Append DSPI support for m547x_8x.
+ SSI cleanup. Remove USB Host structure from immap_539.h.
+ Apply changes to use FlexBus structures in mcf52x2's
+ cpu_init.c and platform configuration files.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit ac2331aee99ad36be0fcfed8c49922e3c61b576d
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Oct 21 08:52:36 2008 +0000
+
+ ColdFire: Remove linker file
+
+ Each different build for M54455EVB and M5235EVB will
+ create a u-boot.lds linker file. It is redundant to
+ keep the u-boot.lds
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 0829323073c505556ed5f5073f91adb504584d45
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Fri Oct 31 11:26:44 2008 -0500
+
+ ppc: Fix compile warnings when !CONFIG_OF_LIBFDT
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit a80b21d5127583171d6e9bc7f722947641898012
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Oct 31 12:12:12 2008 +0100
+
+ common/Makefile: create others group for non core, environment and command files
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 60c68d9c1c6d18ce02c862a05718fd94f97c13d0
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Oct 31 01:13:37 2008 +0100
+
+ TQM8260: use CFI flash driver instead of custom driver.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 20d04774f4ef3f6e38974636e0e36ae0f0b5501f
+Author: Andy Fleming <afleming@freescale.com>
+Date: Thu Oct 30 17:35:30 2008 -0500
+
+ Consolidate MAX/MIN definitions
+
+ There were several, now there is one (two if you count the lower-case
+ versions).
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 298e476c66fd88d0bc4f0371118652d2b5de4e8a
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Oct 30 09:23:09 2008 +0100
+
+ mgsuvd: remove unused defines in config file.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 3cbd823116ea8b7c654e275a8c2fca87cd1f5dc5
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Nov 2 16:14:22 2008 +0100
+
+ Coding Style cleanup, update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a47f957ab523019992fdef857af01bd71c58a4da
+Author: Alessandro Rubini <rubini-list@gnudd.com>
+Date: Fri Oct 31 22:33:21 2008 +0100
+
+ NAND: Allow NAND and OneNAND to coexist
+
+ This removes in nand.h code that is verbatim duplicated from bbm.h,
+ including directly bbm.h in nand.h. The previous state of affairs
+ prevented compiling code for a board hosting both NAND and OneNAND chips.
+
+ Reported-by: Scott Wood <scottwood@freescale.com>
+ Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 2f77c7f45b9a37ef265a8dbe3c18efa706fed214
+Author: Scott Wood <scottwood@freescale.com>
+Date: Fri Oct 31 13:51:12 2008 -0500
+
+ JFFS2: Eliminate compiler error when both NAND and OneNAND are enabled.
+
+ Reported-by: Alessandro Rubini <rubini-list@gnudd.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit c57fc28947e248fb03c49a28b467686299895055
+Author: Jason Jin <Jason.Jin@freescale.com>
+Date: Fri Oct 31 05:07:04 2008 -0500
+
+ NAND: Add NAND support for MPC8536DS board
+
+ This patch defines 1M TLB&LAW size for NAND on MPC8536DS, assigns 0xffa00000
+ for CONFIG_SYS_NAND_BASE and adds other NAND supports in config file.
+ It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image.
+
+ Singed-off-by: Jason Jin <Jason.Jin@freescale.com>
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6fc110bd8a8d642b8f7b0653bd9a08a0b7c3d50b
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Fri Oct 31 05:06:14 2008 -0500
+
+ NAND: Fix CONFIG_ENV_ADDR for MPC8572DS
+
+ CONFIG_ENV_ADDR should be (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE).
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 51b572a801be57790fe26adaa530210e7fba59cc
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Fri Oct 24 10:49:48 2008 +0900
+
+ sh: rsk7203: Moved rsk7203 board to board/renesas
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 58453b00b3ebb26aaa901210023f99504a90bb00
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Fri Oct 24 10:48:31 2008 +0900
+
+ sh: MigoR: Moved MigoR board to board/renesas
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit c1da2a22817ba85b437afa2f4e715e658b219fd1
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Fri Oct 24 10:39:44 2008 +0900
+
+ sh: r2dplus: Moved r2dplus board to board/renesas
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 78385bf2359d828184d0b3649f7ae6b933420000
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Fri Oct 24 10:36:13 2008 +0900
+
+ sh: sh7763rdp: Moved sh7763rdp board to board/renesas
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit c6525d459c350bfc246ea7826456af77e1e314eb
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Fri Oct 24 10:35:19 2008 +0900
+
+ sh: sh7785lcr: Moved sh7785lcr board to board/renesas
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit acd3e30d09a73f876222f0d496c4f52ee9d0771d
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Fri Oct 24 10:34:21 2008 +0900
+
+ sh: r7780mp: Moved r7780mp board to board/renesas
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit f84e6ea275353b8fea772ec7553ff7e4b1f642e0
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Fri Oct 24 10:32:14 2008 +0900
+
+ sh: ap325rxa: Moved ap325rxa board to board/renesas
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 9abda6ba735efb059f63dcb25d78b174bfcad1ad
+Author: Wolfgang Denk <wd@xpert.denx.de>
+Date: Fri Oct 31 01:12:28 2008 +0100
+
+ CFI Driver: Fix "flash not ready" problem
+
+ This patch fixes a problem on systems where the NOR flash is attached
+ to a 64 bit bus. The toggle bit detection in flash_toggle() is based
+ on the assumption that the same flash address is read twice without
+ any other interjacent flash accesses. However, on 32 bit systems the
+ function flash_read64() [as currently implemented] does not perform
+ an atomic 64 bit read - instead, this is broken down into two 32 bit
+ read accesses on addresses "addr" and "addr + 4". So instead of
+ reading a 64 bit value twice from "addr", we see a sequence of 4 32
+ bit reads from "addr", "addr + 4", "addr", and "addr + 4". The
+ consequence is that flash_toggle() fails to work.
+
+ This patch implements a simple, but somewhat ugly solution, as it
+ avoids the use of flash_read64() in this critical place (by breaking
+ it down manually into 32 bit read operations) instead of rewriting
+ flash_read64() such to perform atomic 64 bit reads as one could
+ expect. However, such a rewrite would require the use of floating
+ point load operations, which becomes pretty complex:
+
+ save MSR;
+ set Floating Point Enable bit in MSR;
+ use "lfd" instruction to perform atomic 64 bit read;
+ use "stfd" to store value to temporary variable on stack;
+ load u64 value from temporary variable;
+ restore saved MSR;
+ return u64 value;
+
+ The benefit-cost ratio of such an implementation was considered too
+ bad to actually attempt this, especially as we can expect that such
+ an implementation would not only have a bigger memory footprint but
+ also cause a performance degradation.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cdd4fe63b094d4b767f12ff241d72566b461ee61
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Oct 31 10:48:08 2008 +0100
+
+ ppc4xx: Fix spelling error in MAINTAINERS file
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit be270798900b75ad9c47c7b79c72f70441196c56
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 28 13:37:00 2008 +0100
+
+ ppc4xx: Update PMC440 board support
+
+ This patch brings PMC440 board support up to date:
+
+ - fix GPIO configuration
+ - add misc_init_f()
+ - use better values for usbact variable
+ - fix USB 2.0 phy reset sequence
+ - shrink BAR2 to save PCI address space
+ - add FDT support
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 75183b1a7fc04206d9779d13f16e03853d7e965d
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 28 13:36:59 2008 +0100
+
+ ppc4xx: Fix PMC440 BSP commands
+
+ This patch fixes the PMC440 BSP commands painit and selfreset
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 76b565b69f886d5ae748db65e44f464b0e70d41a
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 28 13:36:58 2008 +0100
+
+ ppc4xx: Update PMC440 board configuration
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ca0c2d42b93116a8e1b8ef8ad4493c7dc9b5f2e4
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 28 13:36:57 2008 +0100
+
+ ppc4xx: Fix esd loadpci command
+
+ This patch fixes esd's loadpci command when not all
+ memory on adapter boards is accessable via PCI.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 492aa9ea13791ca4591b5bde895a425e27ae2d10
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 28 13:36:56 2008 +0100
+
+ ppc4xx: Clean up PMC440 header
+
+ -Codingstyle cleanup
+ -Remove unused GPIO define
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 295133258a44f97a57fb2ec339aecfda11f4db95
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 28 13:36:55 2008 +0100
+
+ ppc4xx: Handle other board variant in PMC440 FPGA code
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cc2dc9b08cf7c09f9f237f8cb9303f11603d4fb0
+Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+Date: Mon Oct 27 12:35:59 2008 +0100
+
+ ppc4xx: Merge xilinx-ppc440 and xilinx-ppc405 cfg
+
+ Xilinx ppc440 and ppc405 have many similarities. This patch merge the
+ config files of both infrastuctures
+
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3befd85633d33c4dcca1f359c3f4848c5ab8e4d2
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 25 06:45:31 2008 +0200
+
+ ppc4xx: Correctly configure the GPIO pin muxing on Arches
+
+ Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO
+ pin multiplexing correctly
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7c84fe6a06dad9f793ed85b39b1e6c11a7882f5c
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Thu Oct 30 23:22:04 2008 +0100
+
+ Fix to the auto-update feature documentation (CONFIG_UPDATE_TFTP_MSEC_MAX)
+
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 4bc7deee9095f21e243b724ca3d634251c1d5432
+Author: David Gibson <david@gibson.dropbear.id.au>
+Date: Wed Oct 29 23:27:45 2008 -0500
+
+ libfdt: Fix bug in fdt_subnode_offset_namelen()
+
+ There's currently an off-by-one bug in fdt_subnode_offset_namelen()
+ which causes it to keep searching after it's finished the subnodes of
+ the given parent, and into the subnodes of siblings of the original
+ node which come after it in the tree.
+
+ Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f242a08871839eac081ba5b599af979f3a148a0d
+Author: Peter Korsgaard <jacmet@sunsite.dk>
+Date: Tue Oct 28 08:26:52 2008 +0100
+
+ fdt_resize(): ensure minimum padding
+
+ fdt_add_mem_rsv() requires space for a struct fdt_reserve_entry
+ (16 bytes), so make sure that fdt_resize at least adds that much
+ padding, no matter what the location or size of the fdt is.
+
+ Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit d685b74c64a38849f1a129b3ab846fbf67dd937e
+Author: Dave Liu <daveliu@freescale.com>
+Date: Thu Oct 23 21:59:35 2008 +0800
+
+ 74xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
+
+ The patch is following the commit 392438406041415fe64ab8748ec5ab5ad01d1cf7
+
+ mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
+
+ This is needed in unlock_ram_in_cache() because it is called from C and
+ will corrupt the small data area anchor that is kept in R2.
+
+ lock_ram_in_cache() is modified similarly as good coding practice, but
+ is not called from C.
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+
+ also, the r2 is used as global data pointer.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit e053ab1903ccae6048ef759025b9f675bba91450
+Author: Scott Wood <scottwood@freescale.com>
+Date: Tue Oct 28 11:45:04 2008 -0500
+
+ mpc83xx pci: Round up memory size in inbound window.
+
+ The current calculation will fail to cover all memory if
+ its size is not a power of two.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 1c671977dc81359628be27ac99c174e76e8069ba
+Author: Dave Liu <daveliu@freescale.com>
+Date: Thu Oct 23 21:19:13 2008 +0800
+
+ 86xx: remove the unused definition
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit eaa44c5dc83756c3067b9e6c9db626facd0b0660
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 28 17:47:49 2008 +0800
+
+ 86xx: remove the redundant r2 global data pointer save
+
+ The commit 67256678f00c09b0a7f19e862e5c1847553d31bc add
+ the another global data pointer save, but in fact the
+ global data pointer will be initialized in the board_init_r,
+ so remove it such as the 85xx/83xx family.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Kumar Gala <kumar.gala@freescale.com>
+
+commit bd888e9544419665334a6f47f81f34011cea38f3
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 28 17:47:41 2008 +0800
+
+ 86xx: remove the unused code for 86xx family
+
+ I believe these code was copied from 74xx family, but for
+ 86xx, it is unused.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Kumar Gala <kumar.gala@freescale.com>
+
+commit 5ba1ef507402bc5e344dc374203792a40f222e8a
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 28 17:46:35 2008 +0800
+
+ 86xx: remove the second DDR LAW setting for mpc8641hpcn
+
+ The DDR1 LAW will precedence the DDR2 LAW, so remove
+ the second DDR LAW.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 137a2dfd11ac51ae3154f13f323609b33a4a072e
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 28 17:46:23 2008 +0800
+
+ 86xx: remove the unused ddr_enable_ecc in the board file
+
+ The DDR controller of 86xx processors have the ECC data init
+ feature, and the new DDR code is using the feature, we don't
+ need the way with DMA to init memory again.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Kumar Gala <kumar.gala@freescale.com>
+
+commit dc2adad85bf580d65916c940683f6e9671e8a5dd
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 28 17:46:12 2008 +0800
+
+ 86xx: Move the clear_tlbs before MMU turn on
+
+ We must invalidate TLBs before MMU turn on, but
+ currently the code is not, if there are some stale
+ TLB entry valid in the TLBs, it will cause strange
+ issue.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Acked-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 5cdade07b118d07154cb882650f9778cecc8a87c
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Oct 27 15:57:08 2008 -0500
+
+ mpc8313erdb: Document NAND boot.
+
+ Previously, the documentation claimed that NAND boot is not supported.
+ This is no longer true.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit bd78bc6b2aebf5566aac464f936b88dfd97ab0bd
+Author: Scott Wood <scottwood@freescale.com>
+Date: Wed Oct 29 14:20:26 2008 -0500
+
+ NAND: Properly create JFFS2 cleanmarkers.
+
+ As reported by Ilko Iliev <iliev@ronetix.at>, the "nand erase clean"
+ command is currently broken, and among other things causes all blocks
+ to be marked bad.
+
+ This implements it properly using MTD_OOB_AUTO, along with some
+ indentation fixes.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit f7fe57c09866b44692d18c8cf22828bd137ec58d
+Author: Scott Wood <scottwood@freescale.com>
+Date: Wed Oct 29 13:42:41 2008 -0500
+
+ NAND fsl elbc: Set FMR[ECCM] based on page size.
+
+ Hardware expects ECCM 0 for small page and ECCM 1 for large page
+ when booting from NAND, so use those defaults.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit c013b74975dab0805ef6d369b013230c4e8a660d
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Wed Oct 29 13:32:59 2008 -0400
+
+ NAND: Add support for MPC8572DS board
+
+ This patch defines 1M TLB&LAW size for NAND on MPC8572DS, assigns
+ 0xffa00000 for CONFIG_SYS_NAND_BASE and adds other NAND supports in
+ config file.
+
+ It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image, to
+ make room for the increased code size with NAND enabled.
+
+ Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 4e190b03aaf2309bd2e025d1187a2ca880fedc95
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Wed Oct 29 11:05:55 2008 -0400
+
+ Make Freescale local bus registers available for both 83xx and 85xx.
+
+ - Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
+ can be shared by both 83xx and 85xx
+ - Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
+ files which use lbus83xx_t.
+ - Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
+ 85xx can share them.
+
+ Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 695c130e4bf75b444720ddfd83aca88f41c046cf
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Oct 27 15:38:30 2008 -0500
+
+ NAND: Align right column of the shorthelp with other commands.
+
+ I accidentally broke this in when making consistent the partial
+ alignment of the longhelp.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 33efde5ecac91ab118ff00b95a181fd6d75f8645
+Author: Karl Beldan <karl.beldan@gmail.com>
+Date: Mon Sep 15 16:08:03 2008 +0200
+
+ NAND: Reset chip on power-up
+
+ Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
+ The first command sent is NAND_CMD_READID.
+ Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
+ Tested with an MT29F4G08AAC.
+
+ Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit c45912d8abc52de796b9059a58faf7c4166eab58
+Author: Scott Wood <scottwood@freescale.com>
+Date: Fri Oct 24 16:20:43 2008 -0500
+
+ NAND: sync with 2.6.27
+
+ This brings the core NAND code up to date with the Linux kernel.
+
+ Since there were several drivers in Linux as of the last update that are
+ not in u-boot, I'm not bringing over new drivers that have been added
+ since in the absence of an interested party.
+
+ I did not update OneNAND since it was recently synced by Kyungmin Park,
+ and I'm not sure exactly what the common ancestor is.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit b1d0db1805c3395149777e507b6da53410abac4e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 21 17:25:47 2008 -0500
+
+ bootm: Added CONFIG_BOOTM_{LINUX, NETBSD, RTEMS}
+
+ Added the ability to config out bootm support for Linux, NetBSD, RTEMS
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 5a98127d81a6eefc5a78a704df619bfe362eeb87
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 21 17:25:46 2008 -0500
+
+ bootm: support subcommands in linux ppc bootm
+
+ Add support for 'bdt', 'cmdline', 'prep' to the linux PPC bootm.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 49c3a861d11735838f1f1b11999ce433006dc919
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 21 17:25:45 2008 -0500
+
+ bootm: Add subcommands
+
+ Add the ability to break the steps of the bootm command into several
+ subcommands: start, loados, ramdisk, fdt, bdt, cmdline, prep, go.
+
+ This allows us to do things like manipulate device trees before
+ they are passed to a booting kernel or setup memory for a secondary
+ core in multicore situations.
+
+ Not all OS types support all subcommands (currently only start, loados,
+ ramdisk, fdt, and go are supported).
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit be08315933537f061bc1ce61f33a29c56458bbad
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 21 17:25:44 2008 -0500
+
+ bootm: Move to using a function pointer table for the boot os function
+
+ This removes a bit of code and makes it easier for the upcoming sub bootm
+ command support to call into the proper OS specific handler.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a369f4a492fa2805d87775d27380f0eeaca35aa6
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Mon Sep 29 23:03:14 2008 +1000
+
+ i386: Renamed show_boot_progress in assembler code
+
+ Renamed show_boot_progress in assembler init phase to
+ show_boot_progress_asm to avoid link conflicts with C version
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 4442f45b0e1cbad35aa22d4cad22b90a57e3f32d
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Oct 27 16:42:00 2008 -0500
+
+ 85xx: Update MPC85xx_PORDEVSR_IO_SEL mask
+
+ The MPC8572 has a 4-bit wide PORDEVSR IO_SEL field. Other MPC85xx
+ processors have a 3-bit wide IO_SEL field but have the most
+ significant bit is wired to 0 so this change should not affect
+ them.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit cd4251624205cb97104f6e32679dc7754934f711
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date: Mon Oct 27 16:09:42 2008 -0500
+
+ powerpc: fix pci window initialization to work with > 4GB DRAM
+
+ The existing code has a few errors that need to be fixed in
+ order to support large RAM sizes. Fix those, and add a
+ comment to make it clearer.
+
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 219542a1a66ca017b12860920714a9859b18a5d7
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Oct 27 13:16:20 2008 -0500
+
+ pci/fsl_pci_init: Removed a bunch pointless trailing backslashes.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6b59e03e0237a40a2305ea385defdfd92000978b
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Mon Sep 1 16:21:22 2008 +0200
+
+ lcd: Let the board code show board-specific info
+
+ The information displayed when CONFIG_LCD_INFO is set is inherently
+ board-specific, so it should be done by the board code. The current code
+ dealing with this only handles two cases, and is already a horrible mess
+ of #ifdeffery.
+
+ Yes, this duplicates some code, but it also allows boards to print more
+ board-specific information; this used to be very difficult.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 6f93d2b8fca504200a5758f7c6dd2d6852900765
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Mon Sep 1 16:21:21 2008 +0200
+
+ lcd: Set lcd_is_enabled before clearing the screen
+
+ This allows the logo/info rendering routines to use the regular
+ lcd_putc/lcd_puts/lcd_printf calls.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 15b17ab52b7c15d46d9fc631cc06092e1e764de2
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Mon Sep 1 16:21:20 2008 +0200
+
+ lcd: Implement lcd_printf()
+
+ lcd_printf() has a prototype in include/lcd.h but no implementation. Fix
+ this by borrowing the lcd_printf() implementation from the cogent board
+ code (which appears to use its own LCD framework.)
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 70dbc54c0a5c798bcf82ae2a1e227404f412e892
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Mon Sep 1 16:21:19 2008 +0200
+
+ atmel_lcdfb: Straighten out funky vl_sync logic
+
+ If the board _didn't_ request INVLINE_INVERTED, we set INVLINE_INVERTED,
+ otherwise we don't. WTF?
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 23bb28f0f76b46c4b573374b0bb3b3f23d85ef55
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Mon Sep 1 16:21:18 2008 +0200
+
+ atmel_lcdfb: Eliminate unneeded #include <asm/arch/hardware.h>
+
+ atmel_lcdfb doesn't actually need anything from asm/arch/hardware.h. It
+ includes a file that does, asm/arch/gpio.h, but this file doesn't
+ include <asm/arch/hardware.h> like it's supposed to.
+
+ Add the missing include to asm/arch/gpio.h and remove the workaround
+ from the atmel_lcdfb driver. This makes the driver compile on avr32.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit c2083e0e11a03ef8be2e9f0ed8720fdc20832f3e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Oct 22 14:38:55 2008 -0500
+
+ 86xx: Convert all fsl_pci_init users to new APIs
+
+ Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use
+ fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup().
+
+ With these changes the board code is a bit smaller and we get dma-ranges
+ set in the device tree for these boards.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit 2dba0dea98c0dee1799ffd6fd6eb541645dbbd98
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 21 08:28:33 2008 -0500
+
+ 85xx: Convert all fsl_pci_init users to new APIs
+
+ Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
+ MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
+ and ft_fsl_pci_setup().
+
+ With these changes the board code is a bit smaller and we get dma-ranges
+ set in the device tree for these boards.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
+
+commit a2aab460727e5f674353a83a81000ef794bffcae
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Oct 23 00:01:06 2008 -0500
+
+ pci/fsl_pci_init: Added fdt helper for setting up bus-ranges & dma-ranges
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
+
+commit b9a1fa9787a3a79573f5f932a4f8aa216bcb1785
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Oct 22 14:06:24 2008 -0500
+
+ pci/fsl_pci_init: Add a common PCI inbound setup function
+
+ Add a common setup function that determines the pci_region(s) based
+ on how much memory we have in the system.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
+
+commit 612ea01018a459234d54ed57ec6a5a244ce75678
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 21 10:13:14 2008 -0500
+
+ pci/fsl_pci_init: Enable larger address and setting inbound windows properly
+
+ * PCI Inbound window was setup incorrectly. The PCI address and system
+ address were swapped. The PCI address should be setting piwar/piwbear
+ and the system address should be setting pitar.
+
+ * Removed masking of addresses to allow for system address to support
+ system address & PCI address >32-bits
+
+ * Set PIWBEAR & POTEAR to allow for full 64-bit PCI addresses
+
+ * Respect the PCI_REGION_PREFETCH for inbound windows
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
+
+commit 8ab451c46b846f2bbd7122b29ffdd9a4a04da228
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Oct 22 23:33:56 2008 -0500
+
+ fdt: Added helper to set PCI dma-ranges property
+
+ Added fdt_pci_dma_ranges() that parses the pci_region info from the
+ struct pci_controller and populates the dma-ranges based on it.
+
+ The max # of windws/dma-ranges we support is 3 since on embedded
+ PowerPC based systems this is the max number of windows.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
+
+commit 3bed2aaf2d50fd13273c14d17d4fd40ef42e0d0f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Oct 23 00:05:47 2008 -0500
+
+ fdt: Add fdt_getprop_u32_default helpers
+
+ Add helper functions to return find a node and return it's property
+ or a default value.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
+ Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 8ba93f68a1bae89e033527ce67b41b4a87aa5b7f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 21 18:06:15 2008 -0500
+
+ 86xx: Enable 64-bit PCI resources on all Freescale boards
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
+
+commit 0151cbaccf4504821ecfde0217299bd740086bb6
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 21 11:33:58 2008 -0500
+
+ 85xx: Enable 64-bit PCI resources on all Freescale boards
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
+
+commit 30e76d5e3bc4c5208ee63585fe12b409d9308cd8
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 21 08:36:08 2008 -0500
+
+ pci: Allow for PCI addresses to be 64-bit
+
+ PCI bus is inherently 64-bit. While not all system require access to
+ the full 64-bit PCI address range some do. This allows those systems
+ to enable the full PCI address width via CONFIG_SYS_PCI_64BIT.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
+ Acked-by: Wolfgang Denk <wd@denx.de>
+
+commit ae5f943ba8ede448a4b1a145fd8911856701ecc5
+Author: Dave Liu <daveliu@freescale.com>
+Date: Thu Oct 23 21:18:53 2008 +0800
+
+ 85xx: Fix the incorrect register used for DDR erratum1
+
+ The 8572 DDR erratum1:
+ DDR controller may enter an illegal state when operating
+ in 32-bit bus mode with 4-beat bursts.
+
+ Description:
+ When operating with a 32-bit bus, it is recommended that
+ DDR_SDRAM_CFG[8_BE] is cleared when DDR2 memories are used.
+ This forces the DDR controller to use 4-beat bursts when
+ communicating to the DRAMs. However, an issue exists that
+ could lead to data corruption when the DDR controller is
+ in 32-bit bus mode while using 4-beat bursts.
+
+ Projected Impact:
+ If the DDR controller is operating in 32-bit bus mode with
+ 4-beat bursts, then the controller may enter into a bad state.
+ All subsequent reads from memory is corrupted.
+ Four-beat bursts with a 32-bit bus only is used with DDR2 memories.
+ Therefore, this erratum does not affect DDR3 mode.
+
+ Work Arounds:
+ To work around this issue, software must set DEBUG_1[31] in
+ DDR memory mapped space (CCSRBAR offset + 0x2f00 for DDR_1
+ and CCSRBAR offset + 0x6f00 for DDR_2).
+
+ Currenlty, the code is using incorrect register DDR_SDRAM_CFG_2
+ as condition, but it should be DDR_SDRAM_CFG register.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit d5b693090ed08d24c18491df9d8fc7387b2906f3
+Author: Dave Liu <daveliu@freescale.com>
+Date: Thu Oct 23 21:17:19 2008 +0800
+
+ 85xx: remove unused config definition
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 0f060c3bf82832331a509f2e5d2442539e7aad09
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Oct 23 01:47:38 2008 -0500
+
+ 85xx: Add basic e500mc core support
+
+ Introduce CONFIG_E500MC to deal with the minor differences between
+ e500v2 and e500mc.
+
+ * Certain fields of HID0/1 don't exist anymore on e500mc
+ * Cache line size is 64-bytes on e500mc
+ * reset value of PIR is different
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a38a5b6edd30f29fd5fdb1d7f674521906c0e677
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Oct 23 01:47:37 2008 -0500
+
+ 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number
+
+ Using CONFIG_SYS_CACHELINE_SIZE instead of 31 means we can handle
+ e500mc's 64-byte cacheline properly when it gets added.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 5deb8022c3749faac30e9ad9694691e2442b5c93
+Author: Georg Schardt <schardt@team-ctech.de>
+Date: Fri Oct 24 13:51:52 2008 +0200
+
+ ppc4xx: New board avnet fx12 minimodul
+
+ This patch adds support for the avnet fx12 minimodul.
+ It needs the "ppc4xx: Generic architecture for xilinx ppc405"
+ patch from Ricardo.
+
+ Signed-off-by: Georg Schardt <schardt@team-ctech.de>
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1f4d53260ec6f8f122aed75cce7c757d97a551e0
+Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+Date: Tue Oct 21 18:29:46 2008 +0200
+
+ ppc4xx: Generic architecture for xilinx ppc405(v3)
+
+ As "ppc44x: Unification of virtex5 pp440 boards" did for the xilinx
+ ppc440 boards, this patch presents a common architecture for all the
+ xilinx ppc405 boards.
+
+ Any custom xilinx ppc405 board can be added very easily with no code
+ duplicity.
+
+ This patch also adds a simple generic board, that can be used on almost
+ any design with xilinx ppc405 replacing the file ppc405-generic/xparameters.h
+
+ This patch is prepared to work with the latest version of EDK (10.1)
+
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 485c00a57fab86f72a3769480c66bf1ca22e1459
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Oct 24 08:56:09 2008 +0200
+
+ ppc4xx: Disable DDR2 autocalibration on Kilauea for now
+
+ Since the new autocalibration still has some problems on some Kilauea
+ boards with 200MHz DDR2 frequency we disable the autocalibration and
+ use the hardcoded values as done before. This seems to work reliably
+ on all known DDR2 frequencies.
+
+ After the autocalibration issue is fixed we will enable it again.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f177f4250c729727b1629fa8d8d6556c999e9b8c
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Apr 9 02:02:07 2008 -0400
+
+ Blackfin: fix up UART status bit handling
+
+ Some Blackfin UARTs are read-to-clear while others are write-to-clear.
+ This can cause problems when we poll the LSR and then later try and handle
+ any errors detected.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit ae0910298f31f5bb3d33a64b8467c60ea3c5d6d0
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sat Oct 11 20:42:17 2008 -0400
+
+ Blackfin: bf561-ezkit: drop redundant code
+
+ Common Blackfin code already announces CPU information.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit e2eea98bff1369f77a9f59a5fd0bd4928bc3332e
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sat Oct 11 20:43:10 2008 -0400
+
+ Blackfin: bf561-ezkit: drop pointless USB code
+
+ The USB/LAN register settings are not actually used/needed in order to
+ drive things from U-Boot, so drop the code.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit c23bff63fb03cb9dbcd26522841e53f9b34fa1ab
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sat Oct 11 20:47:58 2008 -0400
+
+ Blackfin: linker scripts: force start.o and set initcode boundaries
+
+ Make sure that the start.o object is always the first object in our linker
+ script regardless of configuration settings, and add some linker symbols
+ so the ldr utility can properly locate the initcode when generating a LDR.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit bd33e5c613cf70e3cb51a73fdd653fe83b942bb0
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sat Oct 11 21:19:39 2008 -0400
+
+ Blackfin: small cpu init optimization while setting interrupt mask
+
+ Use the sti instruction to set the initial interrupt mask rather than
+ banging on the core IMASK MMR to save both space and time.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 960922291c9594acb575cec7e47d7bed9b58182c
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sat Oct 11 21:18:10 2008 -0400
+
+ Blackfin: set initial stack correctly according to Blackfin ABI
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 25cd33d82ea521b7bd90ca858f8919fae1e9732b
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sun Apr 20 03:11:53 2008 -0400
+
+ Blackfin: make baud calculation more accurate
+
+ We should use the algorithm in the Linux kernel so that the UART divisor
+ calculation is more accurate. It also fixes problems on some picky UARTs
+ that have sampling anomalies.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 0ba1da116e5edcb0c5ae4a7585d73f6548400a06
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Oct 6 04:21:41 2008 -0400
+
+ Blackfin: decode hwerrcause/excause when crashing
+
+ Having to decode hwerrcause/excause values is a pain, so automate it.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 2de95bb20c488f20298df6881b700a5a757ee780
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Oct 6 04:20:54 2008 -0400
+
+ Blackfin: fix register dump messages
+
+ Make sure we report RETI/IPEND correctly.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 7133999e6f62a9a01f6a8ffe234b8532b3ad1e4b
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Oct 6 04:19:34 2008 -0400
+
+ Blackfin: don't bother displaying reboot msg when crashing
+
+ The hang function already tells you to reboot, so no point in showing it
+ twice.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 70c4c032ea112cc42aa1ce959c33fc4825eaef95
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sun Jun 1 01:23:48 2008 -0400
+
+ Blackfin: enable support for nested interrupts
+
+ During cpu init, make sure we initialize the CEC properly so that
+ interrupts can fire and be handled while U-Boot is running.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 39782727e185860faa4884c2b04e84cb33d1c6cf
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Oct 6 03:55:25 2008 -0400
+
+ Blackfin: init NAND before relocating env
+
+ If booting out of NAND, we need to make sure we initialize it properly
+ before attempting to relocate the environment.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 0f9a8819416ba40a53de50af148847a0e508f84d
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 18:40:13 2008 -0400
+
+ Blackfin: check cache bits, not cplb bits
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 2c1ea9e370cb72dd6a5aa32338e87a8a1f77bd76
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 17:52:59 2008 -0400
+
+ Blackfin: drop unused cache flush code
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 50f0d211912a648e31aa9123b4665a0444bb8ca9
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 15:21:47 2008 -0400
+
+ Blackfin: unify cache handling code
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 3c8798983403cb68a827d7a0d09b1134524a1b7d
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Oct 6 03:39:07 2008 -0400
+
+ Blackfin: only initialize the RTC when actually used
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 621e579b812dd1a2e6777f7cbf6e55e736505823
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Oct 6 03:44:33 2008 -0400
+
+ Blackfin: fix SWRST register definition
+
+ The SWRST register is a 16bit, not 32bit, register.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 06121c4e2d183887dcd7a4ca2dcd395b213ea15b
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 18:54:57 2008 -0400
+
+ Blackfin: build with -fomit-frame-pointer
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit adbfeeb7b32f737a9738daa583350d2bb9ed017a
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 17:50:26 2008 -0400
+
+ Blackfin: document some of the blackfin directories
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit e4337968e43698a68ba608369f46d4a4114111ca
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 15:16:56 2008 -0400
+
+ Blackfin: only enable hardware error irq by default
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 2b66f08f257ef6a06785f27b3c6dc2a4cfc9cac4
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 13:36:43 2008 -0400
+
+ Blackfin: punt old unused mem_init.h header
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit bcc121a01608042066a19ab5bff5bcfb805bf406
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 13:18:55 2008 -0400
+
+ Blackfin: delete unused page_descriptor_table_size define
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 30fb9d24ae16e5b0ed39e5b7cc85981165ca98bc
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 13:17:03 2008 -0400
+
+ Blackfin: fix typo in boot mode comment and add NAND define
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 2e5cbe5461c5c4c6665e318cfe950a5a150d999c
+Author: Ben Maan <moo@cow>
+Date: Thu Aug 7 13:14:21 2008 -0400
+
+ Blackfin: fix port mux defines for BF54x
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 0656ef2ba274910d31364fe022f6c7db0051660d
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 13:09:50 2008 -0400
+
+ Blackfin: update anomaly lists
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 50ca95402876cf7bac4e2d4f7855f616a038763f
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Aug 7 13:08:54 2008 -0400
+
+ Blackfin: unify DSPID/DBGSTAT MMR definitions
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit d9d8c7c696dec370ca714c03beb6e79d4c90bd5e
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Oct 21 15:53:51 2008 +0200
+
+ Fix strmhz(): avoid printing negative fractions
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 4a7f6b750d8de543fdf8e58acd86745010054571
+Author: Richard Retanubun <RichardRetanubun@ruggedcom.com>
+Date: Fri Oct 17 08:55:51 2008 -0400
+
+ mpc83xx: Removed #ifdef CONFIG_MPC834X dependency on upmconfig function
+
+ This is done to allow other 83XX based platforms which also have UPM
+ (e.g. 8360) to configure and use their UPM in u-boot.
+
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 3bf1be3c0cfb1129b68cc1474119e5f323536488
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Tue Oct 14 22:58:53 2008 +0400
+
+ mpc83xx: add support for switching between USB Host/Function for MPC837XEMDS
+
+ With this patch u-boot can fixup the dr_mode and phy_type properties
+ for the Dual-Role USB controller.
+
+ While at it, also remove #ifdefs around includes, they are not needed.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit b3379f3fd13969934c00097c05754e7a8990fd39
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Wed Oct 8 20:52:54 2008 +0400
+
+ mpc83xx: add ELBC NAND support for the MPC837XEMDS boards
+
+ Though NAND chip is replaceable on the MPC837XE-MDS boards, the
+ current settings don't work with the default chip on the board.
+ Nevertheless Freescale's U-Boot sets the option register correctly,
+ so I just dumped the register from the working u-boot. My guess is
+ that the old settings were applicable for some pilot boards, not
+ found in the production.
+
+ This patch also enables FSL ELBC driver so that we could access
+ the NAND storage in the u-boot.
+
+ The NAND support costs about 45KB, so the u-boot no longer fits
+ into two 128KB NOR flash sectors, thus we also have to adjust
+ environment location: add another 128KB to the monitor length.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+
+ It is due to hardware design and logic defect, that is the
+ I/O[0:7] of NAND chip is connected to LAD[7:0], so when
+ the NAND chip connected to nLCS3, you have to set up the
+ OR3[BCTLD] = '1' for normal operation, otherwise it will have
+ bus contention due to the pin 48/25 of U60 is enabled.
+
+ Setup the OR3[BCTLD] = '1' , that meaning the LBCTL is not
+ asserted upon access to the NAND chip, keep the default state.
+
+ Acked-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 00f7bbae92e3b13f2b37aeb1def9bb12445521b7
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Oct 2 19:17:33 2008 +0400
+
+ mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards
+
+ The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB,
+ standalone or acting as a PCI agent. User's Guide says:
+
+ - When the CPLD recognizes its location on the PIB it automatically
+ configures RCW to the PCI Host.
+ - If the CPLD fails to recognize its location then it is automatically
+ configured as an Agent and the PCI is configured to an external arbiter.
+
+ This sounds good. Though in the standalone setup the CPLD sets PCI_HOST
+ flag (it's ok, we can't act as PCI agents since we receive CLKIN, not
+ PCICLK), but the CPLD doesn't set the ARBITER_ENABLE flag, and without
+ any arbiter bad things will happen (here the board hangs during any config
+ space reads).
+
+ In this situation we must disable the PCI. And in case of anybody really
+ want to use an external arbiter, we provide "pci_external_aribter"
+ environment variable.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 1da83a63d8e1b4bddeb82581b1745a09aac3e2d3
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Oct 2 18:32:25 2008 +0400
+
+ mpc83xx: add SGMII riser module support for the MPC8378E-MDS boards
+
+ This involves configuring the SerDes and fixing up the flags and
+ PHY addresses for the TSECs.
+
+ For Linux we also fix up the device tree.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit e6d9c8916de9c24f2c52d0b01cf00d2e74a04cd8
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Oct 2 18:31:59 2008 +0400
+
+ mpc83xx: add TSECs' HRCWH masks for MPC837x processors
+
+ We'll use these masks to parse TSEC modes out of HRCWH.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 6f9cc6608b4e1cefde56c0fb99ae1c95c42575ff
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Oct 2 18:31:56 2008 +0400
+
+ mpc83xx: serdes: add forgotten shifts for rfcks
+
+ The rfcks should be shifted by 28 bits left. We didn't notice the bug
+ because we were using only 100MHz clocks (for which rfcks == 0).
+
+ Though, for SGMII we'll need 125MHz clocks.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 55c531984dcf933e4cd13a187a7e08e873b7ced1
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Oct 2 18:31:53 2008 +0400
+
+ mpc83xx: fix serdes setup for the MPC8378E boards
+
+ MPC837xE specs says that SerDes1 has:
+
+ — Two lanes running x1 SGMII at 1.25 Gbps;
+ — Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
+
+ And for SerDes2:
+
+ — Two lanes running x1 PCI Express at 2.5 Gbps;
+ — One lane running x2 PCI Express at 2.5 Gbps;
+ — Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
+
+ The spec also explicitly states that PEX options are not valid for
+ the SD1.
+
+ Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
+ which is wrong to do.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 5c2ff323a94e27e481f70c44838d43fcd844dd46
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Wed Sep 10 18:12:37 2008 +0400
+
+ mpc83xx: mpc8360emds: rework LBC SDRAM setup
+
+ Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes
+ it difficult to use (b/c then the memory is discontinuous and
+ there is quite big memory hole between the DDR/SDRAM regions).
+
+ This patch reworks LBC SDRAM setup so that now we dynamically
+ place the LBC SDRAM near the DDR (or at 0x0 if there isn't any
+ DDR memory).
+
+ With this patch we're able to:
+
+ - Boot without external DDR memory;
+ - Use most "DDR + SDRAM" setups without need to support for
+ sparse/discontinuous memory model in the software.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit def0819e920b05b34b56d8b42e1e43d9b89a52d6
+Author: Wolfgang Denk <wd@xpert.denx.de>
+Date: Tue Oct 21 11:23:56 2008 +0200
+
+ FDT: don't use private kernel header files
+
+ On some systems (for example Fedora Core 4) U-Boot builds with the
+ following wanrings only:
+
+ ...
+ In file included from /home/wd/git/u-boot/include/libfdt_env.h:33,
+ from fdt.c:51:
+ /usr/include/asm/byteorder.h:6:2: warning: #warning using private kernel header; include <endian.h> instead!
+
+ This patch fixes this problem.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f4d14c55504ce40287321bd63ee269e3233ee4ae
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Oct 13 15:15:31 2008 +0200
+
+ ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 43cbce69d48d052574d71f50724be546d90a46a4
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Oct 13 10:45:14 2008 +0200
+
+ ppc4xx: Correctly setup ranges property in ebc node
+
+ Previously only the NOR flash mapping was written into the ranges
+ property of the ebc node. This patch now writes all enabled chip
+ select areas into the ranges property.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d7b26d58328f137471ea97de382bfa63f7239931
+Author: Dirk Eibach <eibach@gdsys.de>
+Date: Wed Oct 8 15:37:50 2008 +0200
+
+ ppc4xx: Add GDSys neo 405EP board support
+
+ Signed-off-by: Dirk Eibach <eibach@gdsys.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c11da194545d2f4bbb54be1bb5e504e20ce8c16c
+Author: Niklaus Giger <niklaus.giger@netstal.com>
+Date: Wed Oct 1 14:46:13 2008 +0200
+
+ ppc4xx: Update configs for Netstal boards
+
+ I reorganized my config files, putting the common stuff into netstal-common.h
+ (got the idea by looking a amcc-common.h from Stefan).
+
+ Added stuff to boot the new powerpc linux via NFS (only tested with HCU4).
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c9c11d751e4242cf29c3c3c290d971f6d0cb1d15
+Author: Adam Graham <agraham@amcc.com>
+Date: Wed Oct 8 10:13:19 2008 -0700
+
+ ppc4xx: Add routine to retrieve CPU number
+
+ Provide a weak defined routine to retrieve the CPU number for
+ reference boards that have multiple CPU's. Default behavior
+ is the existing single CPU print output. Reference boards with
+ multiple CPU's need to provide a board specific routine.
+ See board/amcc/arches/arches.c for an example.
+
+ Signed-off-by: Adam Graham <agraham@amcc.com>
+ Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 59217bae40e90982ab5400d849c08af683ace036
+Author: Adam Graham <agraham@amcc.com>
+Date: Wed Oct 8 10:13:14 2008 -0700
+
+ ppc4xx: Add static support for 44x IBM SDRAM Controller
+
+ This patch add the capability to configure a PPC440 based IBM SDRAM
+ Controller with static, compiled-in, values. PPC440 memory subsystem
+ includes a Memory Queue core.
+
+ Signed-off-by: Adam Graham <agraham@amcc.com>
+ Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f09f09d3899017aaaa2b031bba63c271e9c48e4d
+Author: Adam Graham <agraham@amcc.com>
+Date: Wed Oct 8 10:12:53 2008 -0700
+
+ ppc4xx: Add AMCC Arches board support (dual 460GT)
+
+ The Arches Evaluation board is based on the AMCC 460GT SoC chip.
+ This board is a dual processor board with each processor providing
+ independent resources for Rapid IO, Gigabit Ethernet, and serial
+ communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR
+ FLASH, UART, EEPROM and temperature sensor, along with a shared debug
+ port. The two 460GT's will communicate with each other via shared
+ memory, Gigabit Ethernet and x1 PCI-Express.
+
+ Signed-off-by: Adam Graham <agraham@amcc.com>
+ Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 055b12f2ffd7c34eea7e983a0588b24f2e69e0e3
+Author: Wolfgang Denk <wd@xpert.denx.de>
+Date: Sun Oct 19 21:54:30 2008 +0200
+
+ TQM8260: environment in flash instead EEPROM, baudrate 115k
+
+ Several customers have reported problems with the environment in
+ EEPROM, including corrupted content after board reset. Probably the
+ code to prevent I2C Enge Conditions is not working sufficiently.
+
+ We move the environment to flash now, which allows to have a backup
+ copy plus gives much faster boot times.
+
+ Also, change the default console initialization to 115200 bps as used
+ on most other boards.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 1836881190b3d8a6918b0d64b39fe32bbbdf85d8
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Sun Oct 19 12:49:19 2008 -0500
+
+ 85xx: Fix compile warning in mpc8536ds.c
+
+ mpc8536ds.c: In function 'is_sata_supported':
+ mpc8536ds.c:615: warning: unused variable 'devdisr'
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 8ed44d91c8122d00368523b0b746691c895d3b3c
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Oct 19 02:35:50 2008 +0200
+
+ Cleanup: fix "MHz" spelling
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 08ef89ecd174969b3544f3f0c7cd1de3c57f737b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Oct 19 02:35:49 2008 +0200
+
+ Use strmhz() to format clock frequencies
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d50c7d4be150b2252c0d2e16cfcf69643bdd6dc9
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Oct 19 02:35:48 2008 +0200
+
+ strmhz(): Round numbers when printing clock frequencies
+
+ Round clock frequencies for printing.
+
+ Many boards printed off clock frequencies like 399 MHz instead of the
+ exact 400 MHz because numberes were not rounded. This is fixed now.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 681c02d05b29c6d46093525052c74b9c4ddc8b08
+Author: Timur Tabi <timur@freescale.com>
+Date: Mon Oct 20 15:16:47 2008 -0500
+
+ 85xx: properly document MPC85xx_PORDEVSR2_SEC_CFG
+
+ Commit f7d190b1 corrected the value of MPC85xx_PORDEVSR2_SEC_CFG, but forgot
+ to add a comment that the correct value disagrees with the 8544 reference
+ manual. The changelog for that commit is also wrong, as it says "bit 28"
+ when it should be "bit 24".
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 360fe71e82b83e264c964c9447c537e9a1f643c8
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Oct 17 18:24:06 2008 +0200
+
+ mgcoge: add redundant environment sector
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 53ebf0c470c87d5f9fa76462e5f4064d26a9b16a
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Oct 17 18:23:27 2008 +0200
+
+ mgsuvd: update size of environment
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 2e26d837f11460c0e6dede7d65424a31e0183d09
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Fri Oct 10 11:41:00 2008 +0800
+
+ Enabled the Freescale SGMII riser card on 8536DS
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit 7e183cad0c5ab6415dca95d6ac290ea918b28c55
+Author: Liu Yu <yu.liu@freescale.com>
+Date: Fri Oct 10 11:40:59 2008 +0800
+
+ Enabled the Freescale SGMII riser card on 8572DS
+
+ This patch based on Andy's work.
+ Including command 'pixis_set_sgmii' support.
+
+ Signed-off-by: Liu Yu <yu.liu@freescale.com>
+
+commit bff188baf9427c35745356439435acf3864d4c65
+Author: Liu Yu <yu.liu@freescale.com>
+Date: Fri Oct 10 11:40:58 2008 +0800
+
+ Make pixis_set_sgmii more general to support MPC85xx boards.
+
+ The pixis sgmii command depend on the FPGA support on the board, some 85xx
+ boards support SGMII riser card but did not support this command, define
+ CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.
+
+ Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits
+ are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and
+ PIXIS_VCFGEN1_MASK in header file for both boards.
+
+ Signed-off-by: Liu Yu <yu.liu@freescale.com>
+
+commit 5e981d683d2363204c76773941c2e9c2044c808f
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Oct 8 23:38:02 2008 -0500
+
+ Add cpu/8xxx to TAGS_SUBDIRS
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit e1f7d22b8b52fc08c4d17a6a7db1e664281aed63
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Thu Oct 9 01:25:55 2008 -0500
+
+ fsl_law clear enable before changing.
+
+ Debug sessions may have left enabled laws.
+ Changing lawbar with an unkown enabled tgtid could cause problems.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 86be510f7b5443e7e937f696bfbe037fdc740b15
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Thu Oct 9 00:29:27 2008 -0500
+
+ mpc8572 additional end-point mode
+
+ mpc8572 supports all pcie controllers as end-points with cfg_host_agent=0.
+ Include host_agent == 0 decode for end-point determination.
+
+ This is not needed for the ds reference board since pcie3 will be a host
+ in order to connect to the uli chip. Include it here as a reference for
+ other mpc8572 boards.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 6856b3d0221a838580e6bb06f61425fd7529ba93
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Oct 8 23:37:59 2008 -0500
+
+ 85xx if NUM_CPUS>1, print cpu number
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit f7fecc3e25050a036c9f50f0d2b85bc3199a96e0
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Oct 8 23:38:01 2008 -0500
+
+ pixis do not print long help if not configured
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 0e17f02a8a78d85225a4d805f6a1ea95a0a460b5
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Oct 7 08:09:50 2008 -0500
+
+ Have u-boot pass stashing parameters into device tree
+
+ Some cores don't support ethernet stashing at all, and some
+ instances have errata. Adds 3 properties to gianfar nodes
+ which support stashing. For now, just add this support to
+ 85xx SoCs.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit c21617fd265b7c126c6e2f2d8a23cdb00d4fade7
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Fri Oct 3 12:37:57 2008 -0400
+
+ Add DDR options setting on MPC8641HPCN board
+
+ * Add board specific parameter table to choose correct cpo, clk_adjust,
+ write_data_delay based on board ddr frequency and n_ranks.
+
+ * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
+
+ Signed-off-by: James Yang <James.Yang@freescale.com>
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 4ca06607d60d0a6378812ef58fd1eab2a7f77111
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Fri Oct 3 12:37:41 2008 -0400
+
+ Add ddr interleaving suppport for MPC8572DS board
+
+ * Add board specific parameter table to choose correct cpo, clk_adjust,
+ write_data_delay, 2T based on board ddr frequency and n_ranks.
+
+ * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
+
+ * Set memory controller interleaving mode to bank interleaving, and disable
+ bank(chip select) interleaving mode by default, because the default on-board
+ DDR DIMMs are 2x512MB single-rank.
+
+ * Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000.
+
+ Signed-off-by: James Yang <James.Yang@freescale.com>
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 1f293b417ac6ab8e317ca2b770377ca93edf2370
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Fri Oct 3 12:37:26 2008 -0400
+
+ Add debug information for DDR controller registers
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit c9ffd839b1ada502c86f88edaf1534426b6688ce
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Fri Oct 3 12:37:10 2008 -0400
+
+ Check DDR interleaving mode
+
+ * Check DDR interleaving mode from environment by reading memctl_intlv_ctl and
+ ba_intlv_ctl.
+ * Print DDR interleaving mode information
+ * Add doc/README.fsl-ddr to describe the interleaving setting
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit dfb49108e4f86c2224e1f30124328b0de66ef72e
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Fri Oct 3 12:36:55 2008 -0400
+
+ Pass dimm parameters to populate populate controller options
+
+ Because some dimm parameters like n_ranks needs to be used with the board
+ frequency to choose the board parameters like clk_adjust etc. in the
+ board_specific_paramesters table of the board ddr file, we need to pass
+ the dimm parameters to the board file.
+
+ * move ddr dimm parameters header file from /cpu to /include directory.
+ * add ddr dimm parameters to populate board specific options.
+ * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit dbbbb3abeff325855cae76e33d69d5665631443f
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Fri Oct 3 12:36:39 2008 -0400
+
+ Make DDR interleaving mode work correctly
+
+ Fix some bugs:
+ 1. Correctly set intlv_ctl in cs_config.
+ 2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled.
+ 3. Set base_address and total memory for each ddr controller in memory
+ controller interleaving mode.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 1c9aa76bf9013069e24258f46f4687c9f98a02d6
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Sep 22 23:40:42 2008 -0500
+
+ 85xx: Enable interrupt and setexpr commands on Freescale 85xx boards
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7c0d4a7508d252d2d7c137eeb376814132dda30f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Sep 22 14:11:11 2008 -0500
+
+ 85xx: Improve flash remapping on MPC8572DS & MPC8536DS
+
+ Changing the flash from cacheable to cache-inhibited was taking a significant
+ amount of time due to the fact that we were iterating over the full 256M of
+ flash. Instead we can just flush the L1 d-cache and invalidate the i-cache.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 54e091d3b603a3332c619199ca83a07e95960da4
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Sep 22 14:11:10 2008 -0500
+
+ 85xx: Export invalidate_{i,d}cache and add flush_dcache
+
+ Added the ability for C code to invalidate the i/d-cache's and
+ to flush the d-cache. This allows us to more efficient change mappings
+ from cache-able to cache-inhibited.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6250f0f6297c5ba9aecdea6290799a95c5d4b1da
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Oct 17 16:11:52 2008 +0200
+
+ mgcoge, mgsuvd: extract more common code
+
+ in ft_blob_update () for both boards was an unneccessary
+ repetition of code, which this patch moves in a common
+ function for this boards.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 9e299192ca9850cf725456388042a5aa5a6f3ec7
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Oct 17 12:15:55 2008 +0200
+
+ mgcoge, mgsuvd: use in_*/out_* accesors
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit a21ca95f8b9dca22714952b348e4905ac157b5cd
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Oct 17 13:52:51 2008 +0200
+
+ mgsuvd: fix compiler warning when using soft_i2c driver
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit cac9cf7875c2a01d63422820ed4732a9bdf5ab7b
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Oct 17 12:15:05 2008 +0200
+
+ mgsuvd: fix coding style
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 5f4c3137f4f051787707c548133823f1656eb508
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Oct 17 12:13:30 2008 +0200
+
+ mgcoge: Second Flash on CS5 not on CS1
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 76da19df5b8e186d269f29190696bd31fb6c836b
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Oct 16 21:52:08 2008 -0500
+
+ Added arch_lmb_reserve to allow arch specific memory regions protection
+
+ Each architecture has different ways of determine what regions of memory
+ might not be valid to get overwritten when we boot. This provides a
+ hook to allow them to reserve any regions they care about. Currently
+ only ppc, m68k and sparc need/use this.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit e02d4a9904c8f36395994c0c81469d552b82f5ea
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Oct 16 16:32:35 2008 +0200
+
+ mgcoge: added CONFIG_FIT to support the new u-boot image format
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 6d0f6bcf337c5261c08fabe12982178c2c489d76
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Thu Oct 16 15:01:15 2008 +0200
+
+ rename CFG_ macros to CONFIG_SYS
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 71edc271816ec82cf0550dd6980be2da3cc2ad9e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Oct 13 14:12:55 2008 -0500
+
+ 74xx/7xx/86xx: Rename flush_data_cache to flush_dcache to match 85xx version
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit b799cb4c0eebb0762e91e9653d8b9cc9a98440e3
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Sep 23 10:05:02 2008 -0500
+
+ Expose command table search for sub-commands
+
+ Sub-command can benefit from using the same table and search functions
+ that top level commands have. Expose this functionality by refactoring
+ find_cmd() and introducing find_cmd_tbl() that sub-command processing
+ can call.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f7e51b27508446f8cae3927975817137979ad5e8
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:41:33 2008 +0200
+
+ mgsuvd, mgcoge: added BOOTCOUNT feature.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 8f64da7f83b553889bc08400c97047998382e9d2
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:41:00 2008 +0200
+
+ mgcoge, mgsuvd: added support for the IVM EEprom.
+
+ The EEprom contains some Manufacturerinformation,
+ which are read from u-boot at boot time, and saved
+ in same hush shell variables.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 81473f67810c4c9b7efaed8dee258ed6bc4c7983
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:40:28 2008 +0200
+
+ hush: add showvar command for hush shell.
+
+ This new command shows the local variables defined in
+ the hush shell:
+
+ => help showvar
+ showvar
+ - print values of all hushshell variables
+ showvar name ...
+ - print value of hushshell variable 'name'
+
+ Also make the set_local_var() and unset_local_var ()
+ no longer static, so it is possible to define local
+ hush shell variables at boot time. If CONFIG_HUSH_INIT_VAR
+ is defined, u-boot calls hush_init_var (), where
+ boardspecific code can define local hush shell
+ variables at boottime.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 67b23a322848d828a5e45c0567b72762bfde7abf
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:39:47 2008 +0200
+
+ I2C: adding new "i2c bus" Command to the I2C Subsystem.
+
+ With this Command it is possible to add new I2C Busses,
+ which are behind 1 .. n I2C Muxes. Details see README.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit c24853644ddd2dd2e4246b5854a93e6254a14092
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:39:08 2008 +0200
+
+ mgcoge, mgsuvd: add board specific I2C deblocking mechanism.
+
+ As documented in doc/I2C_Edge_Conditions, adding a
+ board specific deblocking mechanism via CFG_I2C_INIT_BOARD
+ for the mgcoge and mgsuvd board.
+
+ This code was originally written by Keymile in association
+ with Anatech and Atmel in 1998. The Code toggels the SCL
+ until the SCA line goes to HIGH (max. 16 times).
+ And after this, a start condition is sent.
+
+ This is another approach to deblock the I2C Bus. The
+ soft I2C driver actually sends 9 clocks with SDA High,
+ and then a stop at the end, to deblock the I2C Bus.
+
+ Maybe we should use the approach from Keymile as
+ the new standard?
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 4ca107effebfbabac1057c39632105dacef95957
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:38:38 2008 +0200
+
+ soft_i2c: Add CFG_I2C_INIT_BOARD option
+
+ This patch adds the option for a boardspecific
+ I2C deblocking mechanism for the soft i2c driver.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit e5e4edd9f1f76210a09c34ee835f6cff60fdbbd1
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:38:07 2008 +0200
+
+ mgcoge, mgsuvd: add DTT (LM75) support.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 8e442df438ab677057571e3ac01846bff7719bce
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:37:34 2008 +0200
+
+ lm75: Make the LM75 MULTI_BUS compatible.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 12f1678127c1df2b2878ba93c88948bedc060775
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:37:04 2008 +0200
+
+ lm75: fix Codingstyle issues.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit f2202450c75ba6934b356024101500ddcde6e2a6
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:36:33 2008 +0200
+
+ mgcoge, mgsuvd: added EEprom support.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 9661bf9d120f760238b2a073b84f2baf05010057
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:36:03 2008 +0200
+
+ mgcoge, mgsuvd: add I2C support.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 98aed379586a155292efbf3209356836584b601c
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:35:26 2008 +0200
+
+ soft_i2c: prevent compiler warnings if driver does not use CPU Pins.
+
+ This patch fixes the following warnings, when using
+ the soft_i2c driver using no CPU pins on MPC82xx or MPC8xx
+ systems:
+
+ soft_i2c.c: In function 'send_reset':
+ soft_i2c.c:93: warning: unused variable 'immr'
+ soft_i2c.c: In function 'send_start':
+ soft_i2c.c:124: warning: unused variable 'immr'
+ soft_i2c.c: In function 'send_stop':
+ soft_i2c.c:146: warning: unused variable 'immr'
+ soft_i2c.c: In function 'send_ack':
+ soft_i2c.c:171: warning: unused variable 'immr'
+ soft_i2c.c: In function 'write_byte':
+ soft_i2c.c:196: warning: unused variable 'immr'
+ soft_i2c.c: In function 'read_byte':
+ soft_i2c.c:244: warning: unused variable 'immr'
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 799b784aa00cb03a352847ab9f9acdde79b72d21
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:34:45 2008 +0200
+
+ i2c: add CONFIG_I2C_MULTI_BUS for soft_i2c and mpc8260 i2c driver.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 0809ea2f4340ab2047400c7d3d3047f97987d0fd
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:34:05 2008 +0200
+
+ mgcoge: fix Coding Style issues.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit e43a27c49712203fe8848a17714330623edfb2eb
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:33:30 2008 +0200
+
+ I2C: add new command i2c reset.
+
+ If I2C Bus is blocked (see doc/I2C_Edge_Conditions),
+ it is not possible to get out of this, until the
+ complete Hardware gets a reset. This new commando
+ calls again i2c_init (and that calls i2c_init_board
+ if defined), which will deblock the I2C Bus.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 86e9cdf8c415c1a9725e9dae5237ba1e7bd9f686
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:32:25 2008 +0200
+
+ mgsuvd, mgcoge: move this 2 boards in one dir.
+
+ There are some more extensions, which are for both boards
+ and some more boards from this manufacturer will follow soon.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 1c6fe6eac75d695fde677af8330c0dbe75fb6a2b
+Author: Dirk Eibach <eibach@gdsys.de>
+Date: Wed Oct 8 13:44:27 2008 +0200
+
+ hwmon: Add LM63 support
+
+ This patch adds support for the National LM63 temperature
+ sensor with integrated fan control. It's used on the GDSys
+ Neo board (405EP) which will be submitted later.
+
+ Signed-off-by: Dirk Eibach <eibach@gdsys.de>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 7ba890bf2f2b92831420243c058951aa831119fd
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Wed Oct 8 11:01:17 2008 +0900
+
+ Add Red Black Tree support
+
+ Now it's used at UBI module. Of course other modules can use it.
+ If you want to use it, please define CONFIG_RBTREE
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit fbd85ad65dd9c98f36ed3fb12fe41f381b7d4794
+Author: richardretanubun <richardretanubun@ruggedcom.com>
+Date: Mon Oct 6 16:10:53 2008 -0400
+
+ CONFIG_EFI_PARTITION: Added support for EFI partition in cmd_ext2fs.c
+
+ Added support for CONFIG_EFI_PARTITION to ext2 commands.
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
+
+commit 07f3d789b9beb7ce3278c974f4d5c8f51b6ab567
+Author: richardretanubun <richardretanubun@ruggedcom.com>
+Date: Fri Sep 26 11:13:22 2008 -0400
+
+ Add support for CONFIG_EFI_PARTITION (GUID Partition Table)
+
+ The GUID (Globally Unique Identifier) Partition Table (GPT) is a part
+ of EFI. See http://en.wikipedia.org/wiki/GUID_Partition_Table
+
+ Based on linux/fs/partitions/efi.[ch]
+
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
+
+commit fbc87dc0546dff709b38f358e2c5d5e39c4ca374
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Oct 1 15:26:32 2008 +0200
+
+ FIT: output image load address for type 'firmware', fix message while there
+
+ Now that the auto-update feature uses the 'firmware' type for updates, it is
+ useful to inspect the load address of such images.
+
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 4bae90904b69ce3deb9f7c334ef12ed74e18a275
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Oct 1 15:26:31 2008 +0200
+
+ Automatic software update from TFTP server
+
+ The auto-update feature allows to automatically download software updates
+ from a TFTP server and store them in Flash memory during boot. Updates are
+ contained in a FIT file and protected with SHA-1 checksum.
+
+ More detailed description can be found in doc/README.update.
+
+ Signed-off-by: Rafal Czubak <rcz@semihalf.com>
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 3f0cf51dabacc2724731c5079a60ea989103bb8f
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Oct 1 15:26:27 2008 +0200
+
+ flash: factor out adjusting of Flash address to the end of sector
+
+ The upcoming automatic update feature needs the ability to adjust an
+ address within Flash to the end of its respective sector. Factor out
+ this functionality to a new function flash_sect_roundb().
+
+ Signed-off-by: Rafal Czubak <rcz@semihalf.com>
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e83cc06375ac2bea0830c6ed0f9d8fdc3c1b27d5
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Oct 1 15:26:29 2008 +0200
+
+ net: Make TFTP server timeout configurable
+
+ There are two aspects of a TFTP transfer involving timeouts:
+ 1. timeout waiting for initial server reply after sending RRQ
+ 2. timeouts while transferring actual data from the server
+
+ Since the upcoming auto-update feature attempts a TFTP download during each
+ boot, it is undesirable to have a long delay when the TFTP server is not
+ available. Thus, this commit makes the server timeout (1.) configurable by two
+ global variables:
+
+ TftpRRQTimeoutMSecs
+ TftpRRQTimeoutCountMax
+
+ TftpRRQTimeoutMSecs overrides default timeout when trying to connect to a TFTP
+ server, TftpRRQTimeoutCountMax overrides default number of connection retries.
+ The total delay when trying to download a file from a non-existing TFTP server
+ is TftpRRQTimeoutMSecs x TftpRRQTimeoutCountMax milliseconds.
+
+ Timeouts during file transfers (2.) are unaffected.
+
+ Signed-off-by: Rafal Czubak <rcz@semihalf.com>
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 49f3bdbba8071f56d950a9498b6cdb998b35340a
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Oct 1 15:26:28 2008 +0200
+
+ net: express the first argument to NetSetTimeout() in milliseconds
+
+ Enforce millisecond semantics of the first argument to NetSetTimeout() --
+ the change is transparent for well-behaving boards (CFG_HZ == 1000 and
+ get_timer() countiing in milliseconds).
+
+ Rationale for this patch is to enable millisecond granularity for
+ network-related timeouts, which is needed for the upcoming automatic
+ software update feature.
+
+ Summary of changes:
+ - do not scale the first argument to NetSetTimeout() by CFG_HZ
+ - change timeout values used in the networking code to milliseconds
+
+ Signed-off-by: Rafal Czubak <rcz@semihalf.com>
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit c68a05feeb88de9fcf158e67ff6423c4cc988f88
+Author: richardretanubun <richardretanubun@ruggedcom.com>
+Date: Mon Sep 29 18:28:23 2008 -0400
+
+ Adds two more ethernet interface to 83xx
+
+ Added as a convenience for other platforms that uses MPC8360 (has 8 UCC).
+ Six eth interface is chosen because the platform I am using combines
+ UCC1&2 and UCC3&4 as 1000 Eth and the other four UCCs as 10/100 Eth.
+
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 41410eee472b0f42e03a77f961bbc55ef58f3c01
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Wed Sep 24 11:42:12 2008 -0500
+
+ Change UEC PHY interface to RGMII on MPC8568MDS
+
+ Change UEC phy interface from GMII to RGMII on MPC8568MDS board
+
+ Because on MPC8568MDS, GMII interface is only recommended for 1000Mbps speed,
+ but RGMII interface can work at 10/100/1000Mbps, and RGMII interface works more stable.
+
+ Now both UEC1 and UEC2 can work properly under u-boot.
+
+ It is also in consistent with the kernel setting for 8568 UEC phy interface.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit b59b16ca24bc7e77ec113021a6d77b9b32fcf192
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Oct 18 21:30:31 2008 +0200
+
+ Prepare v2008.10 release: update CHANGELOG & Makefile
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f7a35a60cf45491871a5c28e9ad24db005487857
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Oct 17 18:24:06 2008 +0200
+
+ mgcoge: add redundant environment sector
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c2537ee85954af9d036b18b644f3e18d837bf4a5
+Author: Heiko Schocher <hs@denx.de>
+Date: Fri Oct 17 18:23:27 2008 +0200
+
+ mgsuvd: update size of environment
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit fa7b1c07e9371aea8f87ee6d3c2ea5564bd8cc8d
+Author: Lepcha Suchit <Suchit.Lepcha@freescale.com>
+Date: Thu Oct 16 13:38:00 2008 -0500
+
+ 83xx NAND boot: wait for LTESR[CC]
+
+ At least some revisions of the 8313, and possibly other chips, do not
+ wait for all pages of the initial 4K NAND region to be loaded before
+ beginning execution; thus, we wait for it before branching out of the
+ first NAND page.
+
+ This fixes warm reset problems when booting from NAND on 8313erdb.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+ Acked-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit bf29e0ea0af03d593c64614136acc723a7a022a2
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Fri Oct 17 12:54:18 2008 +0200
+
+ ppc4xx: PPC44x MQ initialization
+
+ Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC
+ values. This fixes the occasional 440SPe hard locking issues when the 440SPe's
+ dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver).
+
+ Previously the appropriate initialization had been made in Linux, by the
+ ppc440spe ADMA driver, which is wrong because modifying the MQ configuration
+ registers after normal operation has begun is not supported and could
+ have unpredictable results.
+
+ Comment from Stefan: This patch doesn't change the resulting value of the
+ MQ registers. It explicitly sets/clears all bits to the desired state which
+ better documents the resulting register value instead of relying on pre-set
+ default values.
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ec081c2c190148b374e86a795fb6b1c49caeb549
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Oct 17 12:51:46 2008 +0200
+
+ ppc4xx: PPC44x MQ initialization
+
+ Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC
+ values. This fixes the occasional 440SPe hard locking issues when the 440SPe's
+ dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver).
+
+ Previously the appropriate initialization had been made in Linux, by the
+ ppc440spe ADMA driver, which is wrong because modifying the MQ configuration
+ registers after normal operation has begun is not supported and could
+ have unpredictable results.
+
+ Comment from Stefan: This patch doesn't change the resulting value of the
+ MQ registers. It explicitly sets/clears all bits to the desired state which
+ better documents the resulting register value instead of relying on pre-set
+ default values.
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f7d190b1c0b3ab7fc53074ad2862f7de99de37ff
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Oct 16 21:58:50 2008 -0500
+
+ 85xx: Using proper I2C source clock divider for MPC8544
+
+ The MPC8544 RM incorrect shows the SEC_CFG bit in PORDEVSR2 as being
+ bit 26, instead it should be bit 28. This caused in incorrect
+ interpretation of the i2c_clk which is the same as the SEC clk on
+ MPC8544. The SEC clk is controlled by cfg_sec_freq that is reported
+ in PORDEVSR2.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 42653b826adb319a1df06e24ef26096b2a5d9d2a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Oct 16 21:58:49 2008 -0500
+
+ Revert "85xx: Using proper I2C source clock divider for MPC8544"
+
+ This reverts commit dffd2446fb041f38ef034b0fcf41e51e5e489159.
+
+ The fix introduced by this patch is not correct. The problem is
+ that the documentation is not correct for the MPC8544 with regards
+ to which bit in PORDEVSR2 is for the SEC_CFG.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 2179c4766bffeece98e5e92040629a96c97e230c
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Oct 15 10:19:41 2008 -0500
+
+ 85xx: Fix compile warning
+
+ mpc8536ds.c: In function 'is_sata_supported':
+ mpc8536ds.c:614: warning: unused variable 'devdisr'
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9029b68f3f81b3013044f167ea025e836e6c8c0e
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Wed Oct 15 10:40:24 2008 +0800
+
+ Fix the function conflict in x86emu when DEBUG is on
+
+ The function parse_line() in common/main.c was exposed globally by commit
+ 6636b62a6efc7f14e6e788788631ae7a7fca4537, Result in conflict with the same
+ name funciton in drivers/bios_emulator/x86emu/debug.c when define the DEBUG.
+ This patch fix this by renaming the function in the debug.c file.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit b4dbacf69a669a17487054552fc2761149dd6767
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Oct 15 15:50:45 2008 +0200
+
+ Coding Style cleanup, update CHANGELOG, prepare 2008.10-rc3
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 374b9038293d01d8744a46af9b7854a6fd99b228
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Oct 15 09:51:19 2008 +0200
+
+ Fix compiler warning in lib_ppc/board.c
+
+ Fix compiler warning introduced by commit 0f8cbc18
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 9724555755a6f1066636481b41f7094e0ce93a69
+Author: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
+Date: Thu Oct 9 10:29:14 2008 +0530
+
+ mpc83xx: wait till UPM completes the write to array
+
+ Reference manual states that MxMR[MAD] increment is the indication
+ of write to UPM array is complete. Honour that. Also, make the dummy
+ write explicit.
+
+ also fix the comment.
+
+ Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 03e2dbb18e858e2f7a6aaa437f290f3690d02d51
+Author: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
+Date: Wed Oct 8 18:12:20 2008 -0500
+
+ Remove unwanted ';' at end of define.
+
+ Currently this is not creating any problem. But it will result
+ in compilation error when used as below.
+
+ printf("CFG_SDRAM_CFG2 - %08x\n", CFG_SDRAM_CFG2);
+
+ Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
+
+ continuation of the theme based on git grep "^#define CFG_.*;$" include/
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit b2934a56650e9a6c54432f9ce6dc36757967385e
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Mon Oct 6 10:53:59 2008 -0400
+
+ ARM DaVinci: Add maintainer information for SFFSDR board.
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit 12c6670f873ed632c264a6f3e8bf1297d5c3ddbc
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Sat Oct 4 19:26:16 2008 +0200
+
+ api: fix type mismatch
+
+ This patch fixes a type mismatch and thus removes a compiler
+ warning when compiling with CONFIG_API on powerpc.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 9bc2e4eee3bcb8e63847d7a733e0c607807d6141
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Oct 1 12:25:04 2008 -0500
+
+ cmd_i2c: Fix help for CONFIG_I2C_CMD_TREE && !CONFIG_I2C_MULTI_BUS
+
+ Original code displayed:
+ => help i2c
+ i2c i2c speed [speed] - show or set I2C bus speed
+ i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device
+ ...
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit a0b1b610e980e253d4c2519ee15bd0937c3f8be1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Oct 14 22:13:41 2008 +0200
+
+ Update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 0f8cbc1829d9c7d9616fd29b366a99d037facdcd
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Fri Oct 10 11:41:01 2008 +0800
+
+ Do not init SATA when disabled on 8536DS.
+
+ SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
+ driver still try to access the SATA registers, the cpu will hangup.
+ This patch try to fix this by reading the serdes status before the SATA
+ initialize.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 9dbc366744960013965fce8851035b6141f3b3ae
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Fri Oct 10 10:23:22 2008 +0200
+
+ The PIPE_INTERRUPT flag is used wrong
+
+ At a lot of places in the code the PIPE_INTERRUPT flags and friends
+ are used wrong. The wrong bits are compared to this flag resulting
+ in wrong conditions. Also there are macros that should be used for
+ PIPE_* flags.
+ This patch tries to fix them all, however, I was not able to test the
+ changes, because I do not have any of these boards.
+
+ Review required!
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit 48867208444cb2a82e2af9c3249e90b7ed4a1751
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Fri Oct 10 10:23:21 2008 +0200
+
+ fix USB initialisation procedure
+
+ The max packet size is encoded as 0,1,2,3 for 8,16,32,64 bytes.
+ At some places directly 8,16,32,64 was used instead of the encoded
+ value. Made a enum for the options to make this more clear and to help
+ preventing similar errors in the future.
+
+ After fixing this bug it became clear that another bug existed where
+ the 'pipe' is and-ed with PIPE_* flags, where it should have been
+ 'usb_pipetype(pipe)', or even better usb_pipeint(pipe).
+
+ Also removed the triple 'get_device_descriptor' sequence, it has no use,
+ and Windows nor Linux behaves that way.
+ There is also a poll going on with a timeout when usb_control_msg() fails.
+ However, the poll is useless, because the flag will never be set on a error,
+ because there is no code that runs in a parallel that can set this flag.
+ Changed this to something more logical.
+
+ Tested on AT91SAM9261ek and compared the flow on the USB bus to what
+ Linux is doing. There is no difference anymore in the early initialisation
+ sequence.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit ec4d8c1c1d94a790c1473ae8aace282b817c3123
+Author: Nikita V. Youshchenko <yoush@cs.msu.su>
+Date: Fri Oct 3 00:03:55 2008 +0400
+
+ fsl_diu: fix alignment error that caused malloc corruption
+
+ When aligning malloc()ed screen_base, invalid offset was added.
+ This not only caused misaligned result (which did not cause hardware
+ misbehaviour), but - worse - caused screen_base + smem_len to
+ be out of malloc()ed space, which in turn caused breakage of
+ futher malloc()/free() operation.
+
+ This patch fixes screen_base alignment.
+
+ Also this patch makes memset() that cleans framebuffer to be executed
+ on first initialization of diu, not only on re-initialization. It looks
+ correct to clean the framebuffer instead of displaying random garbage;
+ I believe that was disabled only because that memset caused breakage
+ of malloc/free described above - which no longer happens with the fix
+ described above.
+
+ Signed-off-by: Nikita V. Youshchenko <yoush@debian.org>
+
+commit 3d0ea3110f3431b6c2aee882784f39f97b20bce9
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Wed Sep 24 10:29:37 2008 +0200
+
+ api: Fix building with CONFIG_API
+
+ This patch fixes building with CONFIG_API and CONFIG_USB_STORAGE.
+
+ USB_MAX_STOR_DEV is defined in include/usb.h, but
+ needed in api/api_storage.c.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit abbb90666d5ef2f500ebbedbb80ff60adc56b043
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Sep 23 12:39:40 2008 -0500
+
+ Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE references
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 81e612014c40c922ec35488d17c504d4e9286f06
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Sep 23 12:38:42 2008 -0500
+
+ Remove CFG_EEPROM_PAGE* dependencies for temperature sensors
+
+ The checks for CFG_EEPROM_PAGE_WRITE_ENABLE and
+ CFG_EEPROM_PAGE_WRITE_BITS in various temperature
+ sensor drivers are not necessary
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit c46980f6d2135ade345dadc1fb1f1f4c8bbf255a
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Oct 14 07:04:38 2008 -0400
+
+ cmd_spi: remove broken signed casting for display
+
+ Since we're working with unsigned data, you can't apply a signed pointer
+ cast and then attempt to print the result. Otherwise you get wrong output
+ when the sign bit is set like "0xFF" incorrectly extended to "0xFFFFFFFF".
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit d5fd0b49210c941de8a1fce3947ace92243ab5ca
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Oct 14 07:05:24 2008 -0400
+
+ strings cmd: drop old CONFIG_CFG_STRINGS define
+
+ We don't need CONFIG_CFG_STRINGS anymore now that we have the define
+ CONFIG_CMD_STRINGS and Makefile control.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit fecb5ade3b37f62981f2b05b621005850173aaa9
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Fri Sep 19 17:32:49 2008 +0800
+
+ Fix the NAND size overflow issue.
+
+ When the total size of all NAND devices exceeds 4 GiB, the size will
+ overflow. This patch tries to fix this.
+
+ Note that we still have a problem when a single NAND device is bigger
+ than 4 GiB: then the overflow would actually happen earlier, i. e.
+ when storing the size in nand_info[].size, as nand_info[].size is an
+ "u_int32_t".
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 30f574717277238b9014b8136c90eea77196490f
+Author: Louis Su <louis@asix.com.tw>
+Date: Wed Jul 9 11:01:37 2008 +0800
+
+ AX88180: new gigabit network driver
+
+ Signed-off-by: Louis Su <louis@asix.com.tw>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit c9d6b6925344740ca1db2f8a6bab7921ff820de3
+Author: Andre Schwarz <andre.schwarz@matrix-vision.de>
+Date: Tue Aug 19 16:07:03 2008 +0200
+
+ enable 10/100M at VSC8601 at tsec driver
+
+ Currently VSC8601 doesn't link with 10/100M partners if the
+ EEPROM/Strapping is not set up.
+ Setting the auto-neg register fixes this.
+
+ Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 702c85b0e876d587c11acdbb55738ee52acd54f4
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Tue Sep 30 15:02:53 2008 +0900
+
+ net: ne2000: Divided a function of NE2000 driver
+
+ get_prom function was used __attriute__ , but it is not enable.
+ ax88796.o does not do link besides ne2000.o. When ld is carried
+ out, get_prom function of ax88796.c is ignored.
+ This problem is a thing by specifications of ld.
+ I checked and test this patch on SuperH and MIPS.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 05c7e9070fe4d751e029fd9524bfbbc93cbb1393
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Tue Oct 14 11:10:59 2008 +0900
+
+ sh: rsk7203: Add smc911x driver support to board config file
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit cae6f909baf86357b3c0bd01acfc414348c4d175
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Thu Oct 9 13:54:33 2008 +0900
+
+ sh: Fix cannot execute a stand-alone application
+
+ Address calculated in EXPORT_FUNC in SuperH was wrong, I revised it.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 6df0efd5c86ca1689deeb2738b46b7d83ce228ef
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Oct 8 23:38:00 2008 -0500
+
+ fsl_pci_init do not scan bus when configured as an end-point
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 6f099bbac1ba5dfb46ee7ad29dc53713f0501ba5
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Tue Sep 16 17:07:53 2008 -0400
+
+ ARM DaVinci: Remove redundant setting of GD_FLG_RELOC for sffsdr board.
+
+ This is no longer necessary now that the GD_FLG_RELOC flag is set for
+ all ARM boards.
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit d977a57356657ba241256231efca32828a5822f9
+Author: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+Date: Sat Sep 13 10:04:32 2008 +0200
+
+ Fix lzma uncompress call (image_start wrongly used instead image_len)
+
+ Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+
+commit 392438406041415fe64ab8748ec5ab5ad01d1cf7
+Author: Nick Spence <nick.spence@freescale.com>
+Date: Thu Aug 28 14:09:15 2008 -0700
+
+ mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
+
+ This is needed in unlock_ram_in_cache() because it is called from C and
+ will corrupt the small data area anchor that is kept in R2.
+
+ lock_ram_in_cache() is modified similarly as good coding practice, but
+ is not called from C.
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+
+commit 5c7cbcd34d0ee566875a4fd0f2a3e5a62bba921c
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 19 15:05:34 2008 -0500
+
+ 86xx: remove redudant code with lib_ppc/interrupts.c
+
+ For some reason we duplicated the majority of code in lib_ppc/interrupts.c
+ Not know how that happened, but there is no good reason for it.
+
+ Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
+ they exist.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0d01f66d235118515b5086b88f82498bc0695d6a
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Thu Oct 9 01:26:36 2008 -0500
+
+ CFI: cfi_flash write fix for AMD legacy
+
+ The flash_unlock_seq requires a sector for AMD_LEGACY.
+ Fix a retcode check typeo.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 542b385a620a1783454a00424930e51895f45073
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 7 13:13:10 2008 +0200
+
+ ppc4xx: Fix USB 2.0 phy reset sequence
+
+ This patch fixes USB 2.0 communication issues on some DU440 boards.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit df8c1ce11114c2260dedb5547281945f7db8fa5c
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 7 13:13:09 2008 +0200
+
+ ppc4xx: Add strapping mode for 667MHz CPU frequency on DU440 board
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6a133d6a00b1fc7b9257cd5925d8cb67f75ecda2
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 7 13:13:08 2008 +0200
+
+ ppc4xx: Fix DU440 GPIO configuration
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 35dd025c70fcc4389317db2f2a9d14795172137d
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 7 13:13:07 2008 +0200
+
+ ppc4xx: Update DU440 config
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f3bf9273939ffe1a60a32a2eef909097f15df56b
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Oct 8 15:36:39 2008 -0500
+
+ MPC8572DS: Fix compile warnings
+
+ Commit 445a7b38308eb05b41de74165b20855db58c7ee5 introduced the following
+ compile warnings:
+
+ cmd_i2c.c:112: warning: missing braces around initializer
+ cmd_i2c.c:112: warning: (near initialization for 'i2c_no_probes[0]')
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit dffd2446fb041f38ef034b0fcf41e51e5e489159
+Author: Wolfgang Grandegger <wg@grandegger.com>
+Date: Tue Sep 30 10:55:57 2008 +0200
+
+ 85xx: Using proper I2C source clock divider for MPC8544
+
+ Measurements with our MPC8544 board showed that the I2C bus frequency
+ is wrong by a factor of 1.5. Obviously, the interpretation of the
+ MPC85xx_PORDEVSR2_SEC_CFG bit of the cfg_sec_freq register is not
+ correct. There seems to be an error in the 8544 RM.
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit e46c7bfb8bc3c304cedd20f7a365d6e78d7eaf17
+Author: Rafal Czubak <rcz@semihalf.com>
+Date: Wed Oct 8 13:41:30 2008 +0200
+
+ FSL: Fix get_cpu_board_revision() return value.
+
+ get_cpu_board_revision() returned board revision based on information stored
+ in global static struct eeprom. It should instead use one from local struct
+ board_eeprom, to which the data is actually read from EEPROM. The bug led to
+ system hang after printing L1 cache information on U-Boot startup. The problem
+ was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
+ boards using CFG_I2C_EEPROM_CCID.
+
+ The change has been successfully tested on MPC8555CDS system.
+
+ Signed-off-by: Rafal Czubak <rcz@semihalf.com>
+
+commit 747f316cca484ed627a97dd3391febabce384186
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Sep 30 20:08:49 2008 +0200
+
+ update uImage FIT multi documentation
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 77a0355f60b801f232ce0a5bfbe95331fa3b6bc0
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Sep 30 20:08:36 2008 +0200
+
+ move README.imx31 to doc/ and merge with README.mx31
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 1ed7a7f0f571b13d46530f8f8b9aff3957f15a96
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Thu Sep 25 20:54:37 2008 +0200
+
+ i.MX31: switch to CFG_HZ=1000
+
+ Switch to the standard CFG_HZ=1000 value, while at it, minor white-space
+ cleanup, remove CFG_CLKS_IN_HZ from config-headers. Tested on mx31ads,
+ provides 2% or 0.4% precision depending on the
+ CONFIG_MX31_TIMER_HIGH_PRECISION flag. Measured with stop-watch on 100s
+ boot-delay.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit f41b144c11341b571eab7dcef6c4b8e03c92d2b2
+Author: gnusercn <gnusercn@gmail.com>
+Date: Wed Oct 8 18:58:58 2008 +0200
+
+ Fix bug: in arch-arm, env_get_char dose not work fine
+
+ due to the arm implementation which supposed that U-Boot is in RAM
+ when we jump to start_armboot
+
+ Signed-off-by: gnusercn <gnusercn@gmail.com>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit f8a00dea841d5d75de1f8e8107e90ee1beeddf5f
+Author: Adam Graham <agraham@amcc.com>
+Date: Mon Oct 6 10:16:13 2008 -0700
+
+ ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change
+
+ After changing SDRAM_CLKTR phase value rerun the memory preload
+ initialization sequence (INITPLR) to reset and relock the memory
+ DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
+ adjustment effects the phase relationship of the internal, to the
+ PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.
+
+ Signed-off-by: Adam Graham <agraham@amcc.com>
+ Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5297246bbaa9943c0da1ec2e717b72e4ab6b830e
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Fri Oct 3 11:48:03 2008 -0400
+
+ Remove redundant #define for MPC8536DS
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 445a7b38308eb05b41de74165b20855db58c7ee5
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Fri Oct 3 11:47:30 2008 -0400
+
+ Add ID EEPROM support for MPC8572DS
+
+ The ID EEPROM on MPC8572DS board locates on I2C bus 1. Its the storage for
+ system information like mac addresses etc. This patch enables it.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 1f3ba317a5c5f3a7aabf580fddc211f4bb5a4540
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Fri Oct 3 11:46:59 2008 -0400
+
+ Minor fixes for I2C address on MPC8572DS
+
+ MPC8572DS has two i2c buses. This patch moves the DDR SPD_EEPROM to i2c bus 1
+ according to the board spec, and adds the 2nd i2c bus offset.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit c0391111c33c22fabeddf8f4ca801ec7645b4f5c
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Sat Sep 27 14:40:57 2008 +0800
+
+ Fix the incorrect DDR clk freq reporting on 8536DS
+
+ On 8536DS board, When the DDR clk is set async mode(SW3[6:8] != 111),
+ The display is still sync mode DDR freq. This patch try to fix
+ this. The display DDR freq is now the actual freq in both
+ sync and async mode.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit bac6a1d1fa1cd80aa57881fa9c2152b853cd0ed4
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 7 10:28:46 2008 -0500
+
+ 85xx: Remove setting of *cache-line-size in device trees
+
+ ePAPR says if the *cache-block-size is the same as *cache-line-size
+ than we don't need the *cache-line-size property.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit cd3cb0d9269d155276b00207e3816a9347fd1c92
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Oct 4 07:56:06 2008 -0400
+
+ libfdt: Fix error in documentation for fdt_get_alias_namelen()
+
+ Oops, screwed up the function name in the documenting comment for this
+ function. Trivial correction in this patch.
+
+ Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
+ Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 9a6cf73a88ddab2e1ac39088f2806177982cc62c
+Author: David Gibson <david@gibson.dropbear.id.au>
+Date: Wed Aug 20 16:55:14 2008 +1000
+
+ libfdt: Add function to explicitly expand aliases
+
+ Kumar has already added alias expansion to fdt_path_offset().
+ However, in some circumstances it may be convenient for the user of
+ libfdt to explicitly get the string expansion of an alias. This patch
+ adds a function to do this, fdt_get_alias(), and uses it to implement
+ fdt_path_offset().
+
+ Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
+
+commit 2215987e100d2a841ae6d48a7cc9bb83fcf22737
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Oct 2 01:55:38 2008 -0400
+
+ cfi_flash: do not reset flash when probe fails
+
+ The CFI flash driver starts at flash_init() which calls down into
+ flash_get_size(). This starts by calling flash_detect_cfi(). If said
+ function fails, flash_get_size() finishes by attempting to reset the
+ flash. Unfortunately, it does this with an info->portwidth set to 0x10
+ which filters down into flash_make_cmd() and that happily smashes the
+ stack by sticking info->portwidth bytes into a cfiword_t variable that
+ lives on the stack. On a 64bit system you probably won't notice, but
+ killing the last 8 bytes on a 32bit system usually leads to a corrupt
+ return address. Which is what happens on a Blackfin system.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3e38577208e4256956bc33bb8bcd0a6b6fab55c3
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Sep 26 17:03:26 2008 +0200
+
+ fdt: Overwrite /chosen node in bootm if it already exists in the dtb
+
+ Set force parameter in fdt_chosen() call in do_bootm_linux() call.
+ Without this, the chosen node is not overwritten if it already
+ exists.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 741a6d010d09b5bafca8e4cdfb6b2f8a2c07994d
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Thu Sep 25 11:02:17 2008 -0500
+
+ Fix an overflow case in fdt_offset_ptr() detected by GCC 4.3.
+
+ Using Gcc 4.3 detected this problem:
+
+ ../dtc/libfdt/fdt.c: In function 'fdt_next_tag':
+ ../dtc/libfdt/fdt.c:82: error: assuming signed overflow does not
+ occur when assuming that (X + c) < X is always false
+
+ To fix the problem, treat the offset as an unsigned int.
+
+ The problem report and proposed fix were provided
+ by Steve Papacharalambous <stevep@freescale.com>.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit bbdbc7cb3abefda5bd998edbcf0508fe6256327d
+Author: David Gibson <david@gibson.dropbear.id.au>
+Date: Fri Aug 29 14:19:13 2008 +1000
+
+ libfdt: Fix bugs in fdt_get_path()
+
+ The current implementation of fdt_get_path() has a couple of bugs,
+ fixed by this patch.
+
+ First, contrary to its documentation, on success it returns the length
+ of the node's path, rather than 0. The testcase is correspondingly
+ wrong, and the patch fixes this as well.
+
+ Second, in some circumstances, it will return -FDT_ERR_BADOFFSET
+ instead of -FDT_ERR_NOSPACE when given insufficient buffer space.
+ Specifically this happens when there is insufficient space even to
+ hold the path's second last component. This behaviour is corrected,
+ and the testcase updated to check it.
+
+ Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
+
+commit 33af3e6656e84660d397b5dd95abab2dccc36f83
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Oct 1 12:34:58 2008 +0200
+
+ TQM5200: enable support for ATAPI devices
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d13ff2358ff8c384f52eaf46f5d60258acf96ea6
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Mon Sep 15 05:48:25 2008 +0200
+
+ Revert "ARM: set GD_FLG_RELOC for boards skipping relocation to RAM"
+
+ we need this due to the arm implementation which supposed that U-Boot
+ is in RAM when we jump to start_armboot
+
+ This reverts commit f96b44cef897bd372beb86dde1b33637c119d84d.
+ in order to do it for all arm board
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 7fd0bea2e4a78eab7e6693140940f9f9a0009bc2
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Sep 24 08:46:25 2008 -0500
+
+ mpc83xx: don't disable autoboot
+
+ bootdelay set to -1 'permanently' disables autobooting, even if
+ bootcmd is specified. Change to a positive value to allow
+ autobooting when a bootcmd is set.
+
+ Reported-by: Coray Tate <Coray.Tate@freescale.com>
+ Cc: Scott Wood <scottwood@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 2fb29c520c42b7bfef33ea3fd1527eba64099164
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Wed Sep 24 10:42:15 2008 +0900
+
+ mpc83xx: Fix typo in include/mpc83xx.h
+
+ Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 162c41c03179727a1d14262f703c9a8bc40231fa
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Sep 23 09:38:49 2008 -0500
+
+ mpc83xx: add h/w flash protection to board configs
+
+ the operating system may leave flash in a h/w locked state after writing.
+ This allows u-boot to continue to write flash by enabling h/w unlocking
+ by default.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit d26154c9a692586b66eb6d1f8e1b67c75e40ea70
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Sep 11 21:35:36 2008 +0400
+
+ mpc83xx: spd_sdram: fix ddr sdram base address assignment bug
+
+ The spd_dram code shifts the base address, then masks 20 bits, but
+ forgets to shift the base address back. Fix this by just masking the
+ base address correctly.
+
+ Found this bug while trying to relocate a DDR memory at the base != 0.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 8fd4166c467a46773f80208bda1ec3b4757747bc
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Sep 22 16:10:43 2008 +0200
+
+ ppc4xx: Canyonlands: Remove unnecessary FDT warning upon DTB fixup
+
+ Depending on the configuration jumper "SATA SELECT", U-Boot disabled
+ either one PCIe node or the SATA node in the device tree blob. This
+ patch removes the unnecessary and even confusing warning, when the node
+ is not found at all.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6e24a1eb1490aa043770bcf0061ac1fad0864fd9
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Fri Sep 19 13:30:06 2008 +0200
+
+ Add missing device types to dev_print() in part.c
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit 5fdc215f0b351b0c36cc3f8a0fa5850f24454bed
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Sep 22 22:23:06 2008 +0200
+
+ Fix DPRAM memory leak when CFG_ALLOC_DPRAM is defined, which
+ eventually leads to a machine check. This change assures that DPRAM
+ is allocated only once in that case.
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a07faf7b9ad5a86763a577c79922c4ff9a70ef23
+Author: Laurent Pinchart <laurentp@cse-semaphore.com>
+Date: Wed Sep 17 17:57:34 2008 +0200
+
+ Fix Spartan-3 definitions.
+
+ A few Spartan-3 definitions erroneously use Spartan-3E size
+ constants. This patch fixes them.
+
+ Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
+
+commit 28113e1f0da4146b823ffce37680d31d5685a60b
+Author: Laurent Pinchart <laurentp@cse-semaphore.com>
+Date: Wed Sep 17 17:41:58 2008 +0200
+
+ Remove duplicate Spartan-3E definition.
+
+ Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5c65ecf7cd94df250b295621f3b24135cbcfe579
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Wed Sep 17 13:46:17 2008 +0200
+
+ socrates: change default mtest address range
+
+ Running mtest command on socrates without specifying
+ an address range crashes the board. This patch changes
+ default mtest address range to prevent this behavior.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit d666b2d59674b5e002c0821b7ab83ec3ff90d670
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Wed Sep 17 12:34:45 2008 +0200
+
+ socrates: fix crash after relocation
+
+ Currently U-Boot crashes after relocation to RAM.
+ Changing the CPO value of the DDR SDRAM TIMING_CFG_2
+ register to READ_LAT + 1 (to the value it was before
+ conversion of socrates to new DDR code) fixes the
+ problem.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 562788b0a303f3528b920d81f547f5ca77ba528e
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Wed Sep 17 11:45:51 2008 +0200
+
+ socrates: fix SPD EEPROM address
+
+ Commit be0bd8234b9777ecd63c4c686f72af070d886517
+ changed SPD EEPROM address to 0x51 and DDR SDRAM
+ detection stopped working. Change this address
+ back to 0x50.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 023824549a370bd185d7129d9a6c86f9be7b86a8
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Sep 22 11:06:50 2008 +0200
+
+ Revert "ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz (200MHz PLB)"
+
+ This reverts commit 3eec160a3a405b29ce9c06920f6427b9047dd8a8.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e58c41e26cf3c8accd60311be579f452e368e97e
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Thu Sep 18 20:13:08 2008 +0900
+
+ usb: Fix compile warning of r8a66597-hcd
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit b5d10a13525c07ec6374adf840d7c87553b5f189
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Thu Sep 18 19:34:36 2008 +0900
+
+ sh: Fix compile warning
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 4a065abf926f128beb36d93449defa0d690e7fef
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Thu Sep 18 19:04:26 2008 +0900
+
+ sh: Add support watchdog for SH4A core
+
+ Add support watchdog for SH4A core (SH7763, SH7780 and SH7785).
+ And fix some compile warning.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit a03c09c5fdb8430fe2ae6a03f88a0cf7bcc0aa57
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Wed Sep 17 11:45:26 2008 +0900
+
+ sh: Fix typo in SH serial driver
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 6b44a439215ba7c63f666f8099213ea4f05f2b07
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Wed Sep 17 11:08:36 2008 +0900
+
+ sh: Add support any page size and empty_zero_page to SH Linux uImage
+
+ Old U-Boot supported 4KB page size only. If this version, Linux
+ kernel can not get command line from U-Boot.
+ SH Linux kernel can change page size and empty_zero_page.
+ This patch support this function and fix promlem.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit ce9f99ddb59628f41dc534e892368a7d66dfc774
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Thu Aug 28 13:40:52 2008 +0900
+
+ sh: rsk7203: Add support pkt_data_pull and pkt_data_push function
+
+ Add function of smc911x, pkt_data_pull and pkt_data_push.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit dd820b03a2f45e86e7960e26729a3b58e3dda44a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Sep 18 13:57:32 2008 +0200
+
+ ADS5121: fix typo in "rootpath" default setting
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c9e8436b10cca53fca4904ecbadcd6231ad72c38
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Tue Sep 16 14:55:44 2008 +0200
+
+ USB layer of U-Boot causes USB protocol errors while using USB memory sticks
+
+ There are several differences between Linux, Windows and U-boot for initialising the
+ USB devices. While analysing the behaviour of U-boot it turned out that U-boot does
+ things really different, and some are wrong (compared to the USB standard).
+
+ This patch fixes some errors:
+ * The NEW_init procedure that was already in the code is good, while the old procedure
+ is wrong. See code comments for more info.
+ * On a Control request the data returned by the device can be more than 8 bytes, while
+ the host limits it to 8 bytes. This caused the host to generate a DataOverrun error.
+ This results in a lot of USB sticks not being recognised, and the transmission ended
+ frequently with a CTL:TIMEOUT Error.
+ * Added a flag CONFIG_LEGACY_USB_INIT_SEQ to allow users to use the old init procedure.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit 6f5794a6f78b313231256958fd73673c6aacc116
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Tue Sep 16 14:55:43 2008 +0200
+
+ Refactoring parts of the common USB OHCI code
+
+ This patch refactors some large routines of the USB OHCI code by
+ making some routines smaller and more readable which helps
+ debugging and understanding the code. (Makes the code looks
+ somewhat more like the Linux implementation.)
+
+ Also made entire file compliant to Linux Coding Rules (checkpatch.pl compliant)
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit be19d324edc1a1d7f393d24e10d164cd94c91a00
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Tue Sep 16 14:55:42 2008 +0200
+
+ Fix for USB sticks not working on ARM while using GCC 4.x compilers
+
+ The GCC-compiler makes an optimisation error while optimising the routine
+ usb_set_maxpacket(). This should be fixed in the compiler in the first place,
+ but there lots of compilers out there that makes this error, that it is
+ probably wiser to workaround it in U-boot itself.
+
+ What happens is that the register r3 is used as loop-counter 'i', but gets
+ overwritten later on. From there it starts using register r3 for several other
+ things and the assembler code is becoming a big mess. This is clearly a compiler bug.
+
+ This error occurs on at least several versions of Code Sourcery Lite compilers
+ for ARM. Like the Edition 2008q1, and 2008q3, It has also been seen on other
+ compilers, while compiling for armv4t, or armv5te with Os, O1 and O2.
+
+ We work around it by splitting up this routine in 2 parts, and making sure that
+ the split out part is NOT inlined any longer. This will make GCC spit out assembler
+ that do not show this problem. Another possibility is to adapt the Makefile to stop
+ optimisation for the complete file. I think this solution is nicer.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit 87b4ef560cf2da4ccc9e59711ad1ff7fafe96670
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Sep 17 10:17:55 2008 +0200
+
+ Coding style cleanup; update CHANEGLOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 3eec160a3a405b29ce9c06920f6427b9047dd8a8
+Author: Victor Gallardo <vgallardo@amcc.com>
+Date: Tue Sep 16 06:59:13 2008 -0700
+
+ ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz (200MHz PLB)
+
+ Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
+ Signed-off-by: Adam Graham <agraham@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ce47eb402c5e29a025399dc282246414fc492940
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Sep 16 10:04:47 2008 -0500
+
+ Support for multiple SGMII/TBI interfaces for TSEC ethernet
+
+ Fix TBI PHY accesses to use the proper offset in CPU register space. The
+ previous code would incorrectly access the TBI PHY by reading/writing to CPU
+ register space at the same location as would be used to access external PHYs.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 7c803be2eb3cae245dedda438776e08fb122250f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 16 18:02:19 2008 +0200
+
+ TQM8xx: Fix CFI flash driver support for all TQM8xx based boards
+
+ After switching to using the CFI flash driver, the correct remapping
+ of the flash banks was forgotten.
+
+ Also, some boards were not adapted, and the old legacy flash driver
+ was not removed yet.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c0d2f87d6c450128b88e73eea715fa3654f65b6c
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Sep 14 00:59:35 2008 +0200
+
+ Prepare v2008.10-rc2
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f12e4549b6fb01cd2654348af95a3c7a6ac161e7
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Sep 13 02:23:05 2008 +0200
+
+ Coding style cleanup, update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 0c32565f536609d78feef35c88bbc39d3ac53a73
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Sep 10 09:18:34 2008 -0500
+
+ Update mailing list email and archive addresses
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit fb661ea444ae61de60520f66ae84cdb5dd5a3246
+Author: u-boot@bugs.denx.de <u-boot@bugs.denx.de>
+Date: Thu Sep 11 15:40:01 2008 +0200
+
+ 85xx: socrates: autoprobe Lime chip
+
+ This patch is an attempt to implement autoprobing for the Lime
+ presence on the bus.
+ Configure GPCM for Lime CS2 and try to access chip ID registers.
+ Second read atempt delivers register values if the chip is present.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit e99b607a5ec56ce66e0bcccb78480d5e16fb7bc5
+Author: u-boot@bugs.denx.de <u-boot@bugs.denx.de>
+Date: Thu Sep 11 15:40:01 2008 +0200
+
+ 85xx: socrates: Add support for new image format.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 3c094b652d4107b34641f300a8e9fe16ca15e3d8
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Thu Sep 11 17:28:18 2008 +0900
+
+ sh: Fix compile error for r2dplus
+
+ netdev.h was not include by r2dplus.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+
+commit 56844a22b76c719e600047e23b80465a44d76abd
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Sep 11 08:11:23 2008 +0200
+
+ powerpc: Fix bootm to boot up again with a Ramdisk
+
+ Commit 2a1a2cb6 didnt remove the dummy mem reservation in fdt_chosen,
+ and this stopped Linux from booting with a Ramdisk. This patch fixes
+ this, by deleting the useless dummy mem reservation.
+
+ When booting with a Ramdisk, a fix offset FDT_RAMDISK_OVERHEAD is now
+ added to of_size, so we dont need anymore a dummy mem reservation.
+
+ I measured the value of FDT_RAMDISK_OVERHEAD on a MPC8270 based
+ system (=0x44 bytes) and rounded it up to 0x80).
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit fc9c1727b5b3483ce49c3cb668e8332fb001b8a7
+Author: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+Date: Mon Sep 8 02:46:13 2008 +0200
+
+ Add support for LZMA uncompression algorithm.
+
+ Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0008b6d968160abe2bfd936493f3a516a7c8da20
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Fri Jun 27 23:04:20 2008 +0400
+
+ fsl_elbc_nand: ecclayout cleanups
+
+ This patch deletes oobavail assignments, they're calculated by the nand
+ core code in nand_scan_tail, plus current oobavail values are wrong for
+ the LP NANDs.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 8f42bf1c393d53a70c2545e9f329d11c46d74794
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Fri Jun 27 23:04:13 2008 +0400
+
+ fsl_elbc_nand: implement support for flash-based BBT
+
+ This patch implements support for flash-based BBT for chips working
+ through ELBC NAND controller, so that NAND core will not have to re-scan
+ for bad blocks on every boot.
+
+ Because ELBC controller may provide HW-generated ECCs we should adjust
+ bbt pattern and bbt version positions in the OOB free area.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 97ae023648e764f794ffb9c52da109d6caf09c47
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Fri Jun 27 23:04:04 2008 +0400
+
+ fsl_elbc_nand: fix OOB workability for large page NAND chips
+
+ For large page chips, nand_bbt is looking into OOB area, and checking
+ for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
+ reserved for bbt means.
+
+ But ELBC driver is specifying ecclayout so that oobfree area starts at
+ offset 1, so only one byte left for the bbt purposes.
+
+ This causes problems with any OOB users, namely JFFS2: after first mount
+ JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:
+
+ OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
+ OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
+ OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
+ OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
+
+ And on the next boot, NAND core will rescan for bad blocks, then will
+ see "0xff 0x19" pattern, and will mark all blocks as bad ones.
+
+ To fix the issue we should implement our own bad block pattern: just one
+ byte at OOB start. Though, this will work only for x8 chips. For x16
+ chips two bytes must be checked. Since ELBC driver does not support x16
+ NANDs (yet), we're safe for now.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 7238ada313057a85409485b8ee21515dc10c07a5
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Sep 12 13:52:21 2008 +0200
+
+ MPC512x: reduce timeout waiting for Ethernet autonegotiation to 2.5s
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit b18410e508a12ba0a177dfc2a386857c806fa96d
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Sep 11 13:05:56 2008 +0200
+
+ ppc4xx: Enable device tree (FDT) support in zeus board port
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7bf5ecfa50722a9feb45ea8f04da75f5d406f20b
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Sep 10 16:53:47 2008 +0200
+
+ ppc4xx: Fix SDRAM inititialization of multiple 405 based board ports
+
+ This patch fixes a problem introdiced with patch
+ bbeff30c [ppc4xx: Remove superfluous dram_init() call or replace it by
+ initdram()].
+
+ The boards affected are:
+ - PCI405
+ - PPChameleonEVB
+ - quad100hd
+ - taihu
+ - zeus
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 61737c59a3285f6fadf96a5836879898c04ec28d
+Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+Date: Thu Sep 11 19:41:26 2008 -0400
+
+ ppc4xx: Add .gitignore file to xilinx-ppc440 boards
+
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2bec498ed1164a58cd8437b561bdc4551d69f9bf
+Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+Date: Thu Sep 11 19:41:25 2008 -0400
+
+ ppc4xx: Fix compilation of v5fx30teval_flash
+
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4bed9deebbd7ee6f0ba746b44d47a922156f7404
+Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+Date: Wed Sep 10 17:44:30 2008 -0400
+
+ ppc4xx: Fix in-tree build for ppc440-generic boards
+
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 06c4ab50f5ccfb55ea2dd324aa28b2b06102e416
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Sep 12 02:20:47 2008 +0200
+
+ ARM: synchronize mach-types.h with linux 2.6.27-rc6
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 3ee9f03f588ad605e3fd10530237f9e3e2e7ab4c
+Author: Jens Scharsig <esw@bus-elektronik.de>
+Date: Fri Sep 12 02:20:47 2008 +0200
+
+ at91rm9200: fix errors with CONFIG_CMD_I2C_TREE
+
+ This patch prevents linker error on AT91RM9200 boards, if
+ CONFIG_CMD_I2_TREE is set.
+ It implements i2c_set_bus_speed and i2c_get_bus_speed as a dummy function.
+
+ Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
+
+commit b5b0344957d32e3d07a8dd72fce64fb48e680ba4
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Fri Sep 12 02:20:47 2008 +0200
+
+ ARM DaVinci: Remove duplicate code in cpu/arm926ejs/davinci/dp83848.c
+
+ ARM DaVinci: Remove duplicate code in cpu/arm926ejs/davinci/dp83848.c
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit 03db53335c8eba656a7c44d1555b1a4514383e33
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Fri Sep 12 02:20:46 2008 +0200
+
+ make: Remove redundant __ARM__ addition when cross-compiling on *BSD
+
+ __ARM__ is given by arm_config.mk automatically.
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit 8cc62a7d9c77f8ef5166fb57322c4a6ddac320b4
+Author: Claudio Scordino <claudio@evidence.eu.com>
+Date: Fri Sep 12 02:20:46 2008 +0200
+
+ Fix MACH_TYPE for the AT91RM9200DK board.
+
+ Signed-off-by: Claudio Scordino <claudio@evidence.eu.com>
+
+commit 274737e5eb25b2bcd3af3a96da923effd543284f
+Author: Andrew Dyer <adyer@righthandtech.com>
+Date: Fri Sep 12 02:20:46 2008 +0200
+
+ i.mx change get_timer(base) to return time since base
+
+ This patch changes get_timer() for i.MX to return the time since
+ 'base' instead of the time since the counter was at zero.
+
+ Symptom seen is flash timeout errors when erasing or programming a
+ sector using the common cfi flash code.
+
+ Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
+
+commit 48fed40575b3e8eae960eb0141509ddd9a73012a
+Author: Andrew Dyer <adyer@righthandtech.com>
+Date: Fri Sep 12 02:20:46 2008 +0200
+
+ i.MX use u-boot baud rate and don't assume UART master clock
+
+ 1) Change the i.MX serial driver to use the baud rate set in the
+ u-boot environment
+
+ 2) don't assume a 16MHz value for PERCLK1 in baud rate calculations
+
+ 3) don't write a 1 to the RDR bit in the USR2 reg. (bit is not "write
+ one to clear" like other status bits in the reg.)
+
+ Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
+
+commit 6e1551a870d360805b9d172dc56d935064abe71d
+Author: Andrew Dyer <adyer@righthandtech.com>
+Date: Fri Sep 12 02:20:46 2008 +0200
+
+ arm920t fix constant error in start.S
+
+ Code in cpu/arm920t/start.S will die with a compilation error if
+ CONFIG_STACKSIZE + CFG_MALLOC_LEN works out to an invalid constant for
+ the ARM sub instruction. Change the code so that each is subtracted
+ independently to avoid the error.
+
+ Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
+
+commit b23253835f871cd9bd8e955b9a971d18a7d4ff56
+Author: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
+Date: Fri Sep 12 02:20:40 2008 +0200
+
+ ARM OMAP : Correct Invalid Timer Register Field Declaration in omap1510.h & omap730.h
+
+ - Correct Invalid #define of MPUTIM_PTV_MASK for
+ omap1510 & omap730 register definition
+
+ MPUTIM_PTV_MASK is defined as
+ #define MPUTIM_PTV_MASK (0x7<<PTV_BIT)
+
+ while it should have been
+ #define MPUTIM_PTV_MASK (0x7<<MPUTIM_PTV_BIT)
+
+ - Below Patch corrects the same
+
+ Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
+
+commit c455d07396dddc9864fd8dbb965ee10fe95ce8cf
+Author: Adrian Filipi <adrian.filipi@eurotech.com>
+Date: Fri Jul 18 11:52:02 2008 -0400
+
+ Set up SD/MMC OCR as comment describes. i.e. 3.2-3.4v.
+
+ Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
+
+commit eb16135df20535b0d19969f50fb5bd17f95e9c25
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Thu Aug 28 12:25:11 2008 +0200
+
+ i.MX31: document timer precision option
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 1a6337b01351b82a45b0defa76f08744511c580b
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Fri Aug 29 10:36:18 2008 +0200
+
+ i.MX31: Make the SPI bus and chip select configurable for MC13783
+
+ The i.MX31 has three SPI buses and each bus has several chip selects
+ and the MC13783 chip can be connected to any of these. The current
+ RTC driver for MC13783 is hardcoded for CSPI2/SS2.
+
+ This patch makes make MC13783 SPI bus and chip select configurable
+ via CONFIG_MC13783_SPI_BUS and CONFIG_MC13783_SPI_CS.
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit 8c4ebec25b21e355b8488698ec1594da9701fff4
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Fri Aug 29 10:36:17 2008 +0200
+
+ i.MX31: Add reset_timer() and modify get_timer_masked().
+
+ This patch adds the reset_timer() function (needed by nand_base.c) and
+ modifies the get_timer_masked() to work in the same way as the omap24xx
+ function.
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit deeec4991a55de243787002ede24d2331d234fc8
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:09 2008 +0200
+
+ ap325rxa: remove duplicate CONFIG_FLASH_CFI_DRIVER
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit a3a08c0cedd329edf5256e1d6b2bad0fca002725
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:09 2008 +0200
+
+ bootm arm/avr32/blackfin/microblaze/nios2/sh: remove no more need 'error' label
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0e8d158664a913392cb01fb11a948d83f72e105e
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:06 2008 +0200
+
+ rename CFG_ENV macros to CONFIG_ENV
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 1ede78710c3bf9ad6f4a53aaddc3bcc86fedd9df
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:05 2008 +0200
+
+ nvedit: rename error comment to CONFIG_ENV_IS_IN_
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit b64b775e7546ed138df360ceb3a71ee358cb9a01
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:05 2008 +0200
+
+ cmd_mem: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 8a40fb148efa442d6526eac46a2001e4c64d28ff
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:05 2008 +0200
+
+ move cmd_get_data_size to command.c
+
+ add CMD_DATA_SIZE macro to enable it
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 507641d2491980531932b9f25dab37fe5e6c3a1a
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:04 2008 +0200
+
+ env_flash: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 5a1aceb0689e2f731491838970884a673ef7e7d3
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:04 2008 +0200
+
+ rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 7d9b5bae5ba558c7464d89d033aca04acaf01172
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:03 2008 +0200
+
+ cleanup use of CFG_ENV_IS_IN_FLASH
+
+ - #if CFG_ENV_IS_IN_FLASH
+ - #if (CFG_ENV_IS_IN_FLASH == 1)
+ - #define CFG_ENV_IS_IN_FLASH 0
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0cf4fd3cf8d0e00605bec5fc56f89c6415015a46
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:01 2008 +0200
+
+ rename environment.c in env_embedded.c to reflect is functionality
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit c0878af6e32f0fd8e13a6ca315b9add64441115a
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:01 2008 +0200
+
+ env_nowhere: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 93f6d72544da4510a146bc4c93d609b0116cde37
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:00 2008 +0200
+
+ rename CFG_ENV_IS_NOWHERE in CONFIG_ENV_IS_NOWHERE
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 2556ef78113b5f089dfcac5da90bf31dd568397b
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:00 2008 +0200
+
+ env_sf: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0b5099a8419bf9c828df5e3e2c6878dc300d98e3
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:00 2008 +0200
+
+ rename CFG_ENV_IS_IN_SPI_FLASH in CONFIG_ENV_IS_IN_SPI_FLASH
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 55c5f49910ec8225347aa1d211352a84de6649b4
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:48:00 2008 +0200
+
+ env_onenand: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 9656138ff1a34d4c4768db6b490deffc40ee674b
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:47:59 2008 +0200
+
+ rename CFG_ENV_IS_IN_ONENAND in CONFIG_ENV_IS_IN_ONENAND
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 957a0e69575683efd70ace147746bbb3d8e7c501
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:47:59 2008 +0200
+
+ env_nvram: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 9314cee6917444ab88bd4e758da7a30975120187
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:47:59 2008 +0200
+
+ rename CFG_ENV_IS_IN_NVRAM in CONFIG_ENV_IS_IN_NVRAM
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 06f61354397911a4c121dfa51b6ccbf7e300d48b
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:47:59 2008 +0200
+
+ env_nand: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 51bfee192099206a4397f15f3b93516e01f58ab0
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:47:58 2008 +0200
+
+ rename CFG_ENV_IS_IN_NAND in CONFIG_ENV_IS_IN_NAND
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit d8cc04d0ac9c7c0d12454708aaf5489f8532bbf9
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:47:58 2008 +0200
+
+ env_dataflash: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 057c849c45b9ee19df8ff3acdeee66be52819962
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:47:58 2008 +0200
+
+ rename CFG_ENV_IS_IN_DATAFLASH in CONFIG_ENV_IS_IN_DATAFLASH
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit d1034bc8db60fa6bd419328baf6a75cb0645cee8
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Wed Sep 10 22:47:52 2008 +0200
+
+ cmd_eeprom: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit bf5a7710ec70e90e98f451b4ba0eb65f9ffc34eb
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Sep 5 09:19:54 2008 +0200
+
+ env_eeprom: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit bb1f8b4f8bb0bfce52e0faa4637b975b745824b3
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Sep 5 09:19:30 2008 +0200
+
+ rename CFG_ENV_IS_IN_EEPROM in CONFIG_ENV_IS_IN_EEPROM
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 32628c5008105a732212003d83b75f05e5243bb2
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Aug 30 23:54:58 2008 +0200
+
+ cmd_mac: Move conditional compilation to Makefile
+
+ finish remaning CFG_ID_EEPROM in CONFIG_ID_EEPROM
+ start in commit ad8f8687b78c3e917b173f038926695383c55555
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit e5648acab153f0f429bfc714902c5aaa7879f71b
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Aug 30 23:47:41 2008 +0200
+
+ cmd_fdc: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 2d02d91d530e831f2dab228085963fc1d5b71cb0
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Aug 30 23:47:38 2008 +0200
+
+ common/Makefile: add core command section
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0d92d4a699fb1a39381d98571dc51fb97e5bcf9e
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Aug 30 23:29:57 2008 +0200
+
+ cmd_vfd: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 6644641d072aee3087da129d8443187196a4d8a9
+Author: Scott Wood <scottwood@freescale.com>
+Date: Wed Sep 10 11:48:49 2008 -0500
+
+ delta, zylonite: Update nand_oobinfo to nand_ecclayout.
+
+ This is part of the switch to newer upstream MTD code.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 9b05aa788bfdd3264ff1bc9418cb19550a7234e4
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Sat Aug 30 17:06:55 2008 -0400
+
+ ARM DaVinci: Fix broken HW ECC for large page NAND.
+
+ Based on original patch by Bernard Blackham <bernard@largestprime.net>
+
+ U-boot's HW ECC support for large page NAND on Davinci is completely
+ broken. Some kernels, such as the 2.6.10 one supported by
+ MontaVista for DaVinci, rely upon this broken behaviour as they
+ share the same code for ECCs. In the existing scheme, error
+ detection *might* work on large page, but error correction
+ definitely does not. Small page ECC correction works, but the
+ format is not compatible with the mainline git kernel.
+
+ This patch adds ECC code that matches what is currently in the
+ Davinci git repository (since NAND support was added in 2.6.24).
+ This makes the ECC and OOB layout written by u-boot compatible with
+ Linux for both small page and large page devices and fixes ECC
+ correction for large page devices.
+
+ The old behaviour can be restored by defining the macro
+ CFG_DAVINCI_BROKEN_ECC, which is undefined by default.
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+ Acked-by: Sergey Kubushyn <ksi@koi8.net>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 0b7c5639891f4103a0e31ec7ae0beb3e97ed3836
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Sep 10 11:15:28 2008 +0200
+
+ muas3001: update BR4 settings
+
+ Also set up the port pins for using I2C.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 3591293509e0c0bcf244b0f974775bff2e25697e
+Author: Petri Lehtinen <petri.lehtinen@inoi.fi>
+Date: Wed Sep 10 09:43:49 2008 +0300
+
+ autoscr: Fix one-character lines and non-newline terminated scripts
+
+ When not using hush, the autoscr command now executes lines that are
+ only one character long. It also runs the last line of scripts even if
+ it does not end in a newline.
+
+ Signed-off-by: Petri Lehtinen <petri.lehtinen@inoi.fi>
+
+commit 9ebbb54f7a25055010fa6668eba40c72a4c4f985
+Author: Victor Gallardo <vgallardo@amcc.com>
+Date: Tue Sep 9 15:13:29 2008 -0700
+
+ ppc4xx: Allow DTT_I2C_DEV_CODE configured by CFG_I2C_DTT_ADDR
+
+ On AMCC Arches board DTT_I2C_DEV_CODE is different then canyonlands
+ and glacier.
+
+ Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
+
+commit 245f6ef3e11828cb46188e396fb1e67f7b07cd03
+Author: Heiko Schocher <hs@denx.de>
+Date: Mon Sep 8 10:21:11 2008 +0200
+
+ muas3001: added support for the LM75 sensor.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 4a02a2dca82aeab8f839db9dd35fda9d5412dacb
+Author: Heiko Schocher <hs@denx.de>
+Date: Mon Sep 8 10:20:19 2008 +0200
+
+ muas3001: activate WDT for the muas3001 board.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit a55d074dac24dc941f1afb5b4e94b1509bfdda4e
+Author: Heiko Schocher <hs@denx.de>
+Date: Mon Sep 8 10:19:36 2008 +0200
+
+ muas3001: added 64MB SDRAM autodetection.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 5251469943895de4bb9a04d5053352cc22acb7d5
+Author: Andrew Klossner <andrew@cesa.opbu.xerox.com>
+Date: Thu Aug 21 07:12:26 2008 -0700
+
+ Fix printf errors under -DDEBUG
+
+ Fix printf format-string/arg mismatches under -DDEBUG.
+
+ These warnings occur with DEBUG defined for a platform using
+ cpu/mpc85xx. Users of other architectures can unearth similar
+ problems by adding the line "CFLAGS += -DDEBUG=1" in config.mk right
+ after "CFLAGS += $(call cc-option,-fno-stack-protector)".
+
+ Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 8b9e4787641719d709bfa2ebeb72e8bd4952bee7
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 9 23:55:18 2008 +0200
+
+ Update CHANGELOG, prepare 2008-10-rc1 release
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit e0ff3d350d6b7960deb5a881dfc5acf3a63ef676
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Sep 8 08:51:29 2008 -0500
+
+ 85xx: Ensure timebase is zero on secondary cores
+
+ The e500um says the timebase is volatile out of reset. To ensure
+ TB sync works we need to make sure its zero.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 54b4ab3c961a2012a1c2a09c259a6343323ec551
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Sep 9 22:18:24 2008 +0200
+
+ bootm_load_os: fix load_end debug message
+
+ print load_end value not pointer
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 1d9af0be764960e6cc1c093e97176c3542796820
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Sep 9 22:18:23 2008 +0200
+
+ bootm: enable fdt support only on ppc, m68k and sparc
+
+ ...as done in image.c
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 748b5274e76f81df85cfcffaffedc323678d0623
+Author: Markus Heidelberg <markus.heidelberg@web.de>
+Date: Tue Sep 9 18:51:05 2008 +0200
+
+ common/cmd_mem.c: remove nested #if defined(CONFIG_CMD_MEMORY)
+
+ Signed-off-by: Markus Heidelberg <markus.heidelberg@web.de>
+
+commit 650632fe4ca09cfd0e5e6a593f2efc02ef87a58c
+Author: Markus Heidelberg <markus.heidelberg@web.de>
+Date: Tue Sep 9 17:31:46 2008 +0200
+
+ gitignore: add tags files and Vim swap file
+
+ Signed-off-by: Markus Heidelberg <markus.heidelberg@web.de>
+
+commit 1d9b67b23fca6a25154333733204339802510720
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date: Tue Sep 9 17:52:47 2008 +0900
+
+ add board_eth_init() for sh7785lcr board
+
+ Fix the problem that cannot work RTL8169 on sh7785lcr board.
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+
+commit 7b7a869a8ba3bd6d9bffb748c91232141330f514
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 6 16:08:41 2008 -0500
+
+ mtd: SPI Flash: Support the STMicro Flash
+
+ Add MTD SPI Flash support for M25P16, M25P20, M25P32,
+ M25P40, M25P64, M25P80, M25P128.
+
+ Signed-off-by: Jason McMullan <mcmullan@netapp.com>
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 4bc07c368076560ed7fa4c9f987c71a8521488a9
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 9 17:55:31 2008 +0200
+
+ trab: fix build problem after change to use do_div()
+
+ We must link with libgeneric now.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 3b20fd83c73c22acfcb0c6663be747bd5c8b7011
+Author: Ryan CHEN <ryan.chen@st.com>
+Date: Wed Aug 20 13:00:17 2008 -0400
+
+ Correct drv_usb_kbd_init function
+
+ The patch is that check if usb_get_dev_index() function return valid
+ pointer. If valid, continue. Otherwise return -1.
+
+ Signed-off-by: Ryan Chen <ryan.chen@st.com>
+ Acked-by: Markus Klotzbuecher <mk@denx.de>
+
+commit eba1f2fc75f128a9a6c1328d786996a93fd7a707
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Wed Aug 20 11:22:02 2008 +0200
+
+ Make usb-stop() safe to call multiple times in a row.
+
+ A recent commit (936897d4d1365452bbbdf8430db5e7769ef08d38)
+ enabled the usb_stop() command in common/cmd_bootm.c which was
+ not enabled for some time, because no board did actually set the
+ CFG_CMD_USB flag. So, now the usb_stop() is executed before
+ loading the linux kernel.
+
+ However, the usb_ohci driver hangs up (at least on AT91SAM) if the
+ driver is stopped twice (e.g. the peripheral clock is stopped on AT91).
+ If some other piece of code calls usb_stop() before the bootm command,
+ this command will hangup the system during boot.
+ (usb start and stop is typically used while booting from usb memory stick)
+
+ But, stopping the usb stack twice is useless anyway, and a flag already
+ existed that kept track on the usb_init()/usb_stop() calls.
+ So, we now check if the usb stack is really started before we stop it.
+
+ This problem is now fixed in both the upper as low-level layer.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Acked-by: Markus Klotzbuecher <mk@denx.de>
+
+commit 2c8ccf2728f5e67d991cecf76c4057db75a87b67
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 9 16:55:47 2008 +0200
+
+ Makefile: fix bug introduced by commit 47ffd6c2
+
+commit 880f6a5d7596f42db5ff8803b797b78ec5b146e0
+Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+Date: Tue Sep 9 10:00:33 2008 -0400
+
+ ppc4xx: ppc440-generic-ALL: Fix out of tree build v2
+
+ This patch solves the problems compiling ml507, v5fx30teval and
+ ppc440-generic out of tree.
+
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+
+commit 47bebe34ca4e33bab0e822e4ceebbec2590ccbcb
+Author: Nícolas Carneiro Lebedenco <nicolas.lebedenco@tasksistemas.com.br>
+Date: Thu Sep 4 15:35:46 2008 -0300
+
+ Fix dev_print when called from usb_stor_info (usb storage command)
+
+ Fix output of the usb storage command. It was printing "Device 0: not
+ available" because IF_TYPE_USB was not included into the switch
+ statement.
+
+ Signed-off-by: Nicolas Lebedenco <nicolas.lebedenco@tasksistemas.com.br>
+
+commit a4f243452cc8ce0c2c9b51a2520db4bde5f472de
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Sep 9 12:58:16 2008 +0200
+
+ FIT: make iminfo check hashes of all images in FIT, return 1 on failed check
+
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 919f550dc11a13abf01c6bc713c968de790b8d7c
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Sep 9 12:58:15 2008 +0200
+
+ FIT: add ability to check hashes of all images in FIT, improve output
+
+ - add function fit_all_image_check_hashes() that verifies if all
+ hashes of all images in the FIT are valid
+ - improve output of fit_image_check_hashes() when the hash check fails
+
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 1de1fa408967cef6804bb046b904114519bb36f0
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Mon Sep 8 20:54:39 2008 +0200
+
+ qemu_mips: Update linux bootm to support dynamic cmdline
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit f5ed9e39088ecfa5a5f3ef47b08e5bda7890d764
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Sep 8 14:56:49 2008 -0500
+
+ Add support for booting of INTEGRITY operating system uImages
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 72f1b65f1b68bc6ed0d182eda1f3d6cf51b6414a
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Mon Sep 8 21:01:29 2008 +0200
+
+ mips/bootm: Fix typo in commit c4f9419c, "initrd_start" replaced by "images->rd_start"
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 9ba2e2c8191353d75b2d535e672a125be7b84c03
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Sep 8 13:57:12 2008 -0500
+
+ Remove support for booting ARTOS images
+
+ Pantelis Antoniou stated:
+ AFAIK, it is still used but the products using PPC are long gone.
+ Nuke it plz (from orbit).
+
+ So remove it since it cleans up a usage of env_get_char outside of
+ the environment code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 47ffd6c2fc72b46daa9d5d59eedb894fab2b7ee1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 9 15:45:18 2008 +0200
+
+ Makefile: compile and link each module just once
+
+ Several source files need to be compiled and linked when one or more
+ config options are selected. To allow for easy selection in the
+ Makefiles yet to avoild multiple compilation (which costs build time)
+ and especially multiple linking (which causes errors), we use
+ "COBJS = $(sort COBJS-y)" which eliminates duplicates.
+
+ By courtesy of Detlev Zundel who suggested this approach.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 48d0192fe869948fef14b460b5f0c85bca933693
+Author: Andreas Engel <andreas.engel@ericsson.com>
+Date: Mon Sep 8 14:30:53 2008 +0200
+
+ Moved conditional compile into Makefile
+
+ Signed-off-by: Andreas Engel <andreas.engel@ericsson.com>
+
+commit 20c9226cb8cab08a111ee73db04e62d943ee0c97
+Author: Andreas Engel <andreas.engel@ericsson.com>
+Date: Mon Sep 8 10:17:31 2008 +0200
+
+ Merged serial_pl010.c and serial_pl011.c.
+
+ They only differ in the init function.
+ This also adds the missing watchdog support for the PL011.
+
+ Signed-off-by: Andreas Engel <andreas.engel@ericsson.com>
+
+commit 0817d688f307ee2c0598e79175c94a40ce90337b
+Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+Date: Sun Sep 7 17:10:27 2008 -0400
+
+ Remove gap fill in srec object v2
+
+ SREC files do not need gap fill: The load address is specified in the
+ file. On the other hand, it can't be avoided in a .bin object. It has
+ no information about memory location.
+
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+
+commit 1dc306931ca5ce87f13916fa7165b052d3aa714f
+Author: Markus Heidelberg <markus.heidelberg@web.de>
+Date: Sun Sep 7 20:18:27 2008 +0200
+
+ README: fix missing subdirectory in the documentation
+
+ Signed-off-by: Markus Heidelberg <markus.heidelberg@web.de>
+
+commit 3ef96ded38a8d33b58b9fab9cd879d51ddac4cbd
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Sun Sep 7 07:08:42 2008 +1000
+
+ Update i386 code (sc520_cdp)
+
+ Attempt to bring i386 / sc520 inline with master
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 5608692104efa8d56df803dc79ea41ac3607eee5
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Thu Sep 4 13:01:49 2008 +0200
+
+ fw_env: add NAND support
+
+ Add support for environment in NAND with automatic NOR / NAND recognition,
+ including unaligned environment, bad-block skipping, redundant environment
+ copy.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit dd794323a2a1ed6a8a5df51785c31bcde60ad7ca
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 9 09:50:24 2008 +0200
+
+ ppc4xx: Fix out-of-tree building of CPCI405 variants
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 59f630588e3fdbd698a0a2798e52a8924e899563
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Aug 15 15:42:11 2008 +0200
+
+ Removed hardcoded MxMR loop value from upmconfig() for MPC85xx.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit e64987a892353f3d49eb242d997820ef8f538912
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Fri Aug 15 15:42:13 2008 +0200
+
+ 85xx: socrates: Enable Lime support.
+
+ This patch adds Lime GDC support together with support for the PWM
+ backlight control through the w83782d chip. The reset pin of the
+ latter is attached to GPIO, so we need to reset it in
+ early_board_init_r.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 3e79b588b5199f35016f178fc0d5d1266382097f
+Author: Detlev Zundel <dzu@denx.de>
+Date: Fri Aug 15 15:42:12 2008 +0200
+
+ 85xx: Socrates: Major code update.
+
+ - Update the local bus ranges in the FDT for Linux for the various
+ devices connected to the local bus via chip-select.
+
+ - Set the LCRR_DBYP bit in the LCRR for local bus frequencies
+ lower than 66 MHz and uses I/O accessor functions consequently.
+
+ - UPM data update.
+
+ - Update of default environment and configuration. Use I2C multibus
+ as we do have two I2C buses. Also enable sdram and ext2 commands.
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit e8d18541c6ceab821f75faab031740b33fdbfa4b
+Author: Timur Tabi <timur@freescale.com>
+Date: Fri Jul 18 16:52:23 2008 +0200
+
+ Update Freescale 85xx boards to sys_eeprom.c
+
+ The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
+ format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale
+ 86xx boards already use sys_eeprom.c, so this patch migrates the remaining
+ Freescale 85xx boards to use it as well. cds_eeprom.c is deleted.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit aab2bf0202c86227e3dcc8a5b58946087ebcc1af
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 9 10:08:02 2008 +0200
+
+ lib_ppc/interrupts.c: make board_show_activity() a weak function
+
+ This allows to use show_activity() without having to
+ define an empty board_show_activity() function.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit fe876787f8743883ce58fed61525eaa2f34da4c5
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 9 10:06:44 2008 +0200
+
+ stxxtc: remove empty CONFIG_SHOW_ACTIVITY functions
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 965de106ba8900372c8b16dc60d5acab7f925e38
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 9 10:03:47 2008 +0200
+
+ NETTA2: remove empty CONFIG_SHOW_ACTIVITY functions
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 6cc64f9b5f69239c8b1969572b5a3a4aab7de5b9
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Aug 15 15:42:11 2008 +0200
+
+ Removed hardcoded MxMR loop value from upmconfig() for MPC85xx.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit 36241ca29d4804a1006fb3f26069effda5202581
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Fri Aug 15 15:42:13 2008 +0200
+
+ 85xx: socrates: Enable Lime support.
+
+ This patch adds Lime GDC support together with support for the PWM
+ backlight control through the w83782d chip. The reset pin of the
+ latter is attached to GPIO, so we need to reset it in
+ early_board_init_r.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 7a47753ddcaebbf2142809842f70c5f723bd9ddb
+Author: Detlev Zundel <dzu@denx.de>
+Date: Fri Aug 15 15:42:12 2008 +0200
+
+ 85xx: Socrates: Major code update.
+
+ - Update the local bus ranges in the FDT for Linux for the various
+ devices connected to the local bus via chip-select.
+
+ - Set the LCRR_DBYP bit in the LCRR for local bus frequencies
+ lower than 66 MHz and uses I/O accessor functions consequently.
+
+ - UPM data update.
+
+ - Update of default environment and configuration. Use I2C multibus
+ as we do have two I2C buses. Also enable sdram and ext2 commands.
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 4d2ae70e8c31c22e5710df5ff236b5565ea2cf2c
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Sep 9 01:22:39 2008 +0200
+
+ disk-on-chip: remove duplicate doc_probe declaration
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 3221b074a0ab199f6ae47c19cc22f42ddf3ef819
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Sep 9 00:59:40 2008 +0200
+
+ onenand_uboot: fix warning: 'struct mtd_oob_ops' declared inside parameter list
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 13b4db0e2107175a8622ebb48529fa3ad8e12c75
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Sep 9 00:59:39 2008 +0200
+
+ rs5c372: fix rtc_set prototype
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 1bb8b2ef2722bbaea3cc5d46321ce1d99f9b56f7
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Thu Aug 14 14:08:28 2008 +0200
+
+ ARM: fix warning: target CPU does not support interworking
+
+ This patch fixes warnings like this:
+
+ start.S:0: warning: target CPU does not support interworking
+
+ which come from some ARM cross compilers and are caused by hard-coded
+ (with "--with-cpu=arm9" configuration option) ARM targets (which
+ support ARM Thumb instructions), while the ARM target selected from
+ the command line (with "-march=armv4") doesn't support Thumb
+ instructions.
+
+ This warning is issued by the compiler regardless of the real use of
+ the Thumb instructions in code.
+
+ To fix this problem, we use options according to compiler version
+ being used.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 4265c35fbcb248e58179007621d61d32d0b3b82a
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Thu Aug 14 14:08:28 2008 +0200
+
+ ARM: Use do_div() instead of division for "long long".
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 8febd13c69cb68652577d1a9fcbde954bf784155
+Author: Timur Tabi <timur@freescale.com>
+Date: Fri Jul 18 16:52:23 2008 +0200
+
+ Update Freescale 85xx boards to sys_eeprom.c
+
+ The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
+ format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale
+ 86xx boards already use sys_eeprom.c, so this patch migrates the remaining
+ Freescale 85xx boards to use it as well. cds_eeprom.c is deleted.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 1055171ed05b7c4885737463d52b8d6c013bcb5d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Sep 8 23:26:22 2008 +0200
+
+ lib_arm/bootm.c: fix compile warnings
+
+ bootm.c:128: warning: label 'error' defined but not used
+ bootm.c:65: warning: unused variable 'ret'
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 2e3c867d0a63c563a51e65b776973b008f16cec5
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Sep 8 22:46:42 2008 +0200
+
+ ml507: fix out of tree build problem
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 9863a15a98f23b79f34a0e4f9e465bc6df5d504d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Sep 8 22:10:28 2008 +0200
+
+ common/cmd_bootm.c: fix printf() format warnings
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 4394f9a8c42bb1b0abc4fc04bd582d4db5f8b726
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Sep 8 22:37:45 2008 +0200
+
+ BMW, PCIPPC2, PCIPPC6, RBC82: fix compile warnings
+
+ missing doc_probe() prototype.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 2c5e3cc4994897d364b148942ff23e47783198f6
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Sep 8 21:28:14 2008 +0200
+
+ mk48t59: fix compile problem introduced by commit d1e23194
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5ff889349d2ace13f10c9335e09365fcec8247cc
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Sep 8 14:11:12 2008 +0200
+
+ ppc4xx: Move ppc4xx specific prototypes to ppc4xx header
+
+ This patch moves some 4xx specific prototypes out of include common.h
+ to a ppc4xx specific header.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ac53ee8318678190bf3c68da477a84a657d86fb0
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Sep 5 15:34:04 2008 +0200
+
+ ppc4xx: Update CPCI405(AB) configuration
+
+ This patch add FDT support and command line editing capabilities
+ for CPCI405 and CPCI405AB boards.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7b1fbcadf73a83b3beb94abccda1c35e2c075a94
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Sep 5 15:34:03 2008 +0200
+
+ ppc4xx: Cleanup CPCI405 linker script
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 767f9159c5c94cd0cb3135b5b82814ad12816ddf
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Sep 5 15:34:02 2008 +0200
+
+ ppc4xx: Update CPCI405 variants handling
+
+ This patch replaces the BOARD_REVISION variable in include/config.mk
+ by a using a temporary include file in the platform directory.
+
+ The former way does not work anymore and the latter is also used by
+ some other boards.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f071f01fd09e9bf1cf09de37a7416aacce71bae1
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Sep 8 10:01:48 2008 +0200
+
+ ppc4xx: Remove CONFIG_CS8952_PHY define
+
+ Since this define is only used on one board that was never really in
+ production, removing this compile time option doesn't hurt and makes
+ the code more readable.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6ca8646c1860bba74326bf916a5a3389a5c0d3b5
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Sep 5 14:11:40 2008 +0200
+
+ ppc4xx: Fix compilation warning for PIP405
+
+ This patch fixes a compilation warning for the PIP405 board. It moves the
+ #ifndef CONFIG_CS8952_PHY define a little so that the warning doesn't
+ occur anymore. I am a little unsure if this #ifdef is at the correct
+ place now or if it could be removed completely. This needs to get
+ tested on the PIP405 board.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 725b53ac61f4df3026b8f6489ef0080fd27d3816
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Sep 5 14:09:09 2008 +0200
+
+ ppc4xx: Fix compilation warning for canyonlands & glacier
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 302e52e0b1d4c7f994991709d0cb6c3ea612cdb5
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Sep 5 14:40:29 2008 -0500
+
+ Fix compiler warning in mpc8xxx ddr code
+
+ ctrl_regs.c: In function 'compute_fsl_memctl_config_regs':
+ ctrl_regs.c:523: warning: 'caslat' may be used uninitialized in this function
+ ctrl_regs.c:523: note: 'caslat' was declared here
+
+ Add a warning in DDR1 case if cas_latency isn't a value we know about.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit d1e2319414ea5218ba801163e4530ecf2dfcbf36
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Mon Sep 1 23:06:23 2008 +0200
+
+ rtc: allow rtc_set to return an error and use it in cmd_date
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit ee9536a28cb149bcb6c5dee9d08c62c91f4c72d2
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Mon Sep 1 01:16:33 2008 +0200
+
+ ap325rxa/favr-32-ezkit: Use CONFIG_FLASH_CFI_DRIVER
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 6b971c73f182248ce103503d74fbc0100bb8c8b7
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Sun Aug 31 05:37:04 2008 +0900
+
+ config.mk: Move arch-specific condition to $(ARCH)_config.mk
+
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit ea86b9e64b811753d9eabe0f560ee189fbe5d0c1
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 29 19:08:29 2008 -0500
+
+ Prevent crash if random/invalid ramdisks are passed to bootm
+
+ Adds returning an error from the ramdisk detection code if
+ its not a real ramdisk (invalid). There is no reason we can't
+ just return back to the console if we detect an invalid
+ ramdisk or CRC error.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 8e02494e8f86c8f2d7324b5eb9e75271104a01ef
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Fri Aug 29 21:04:45 2008 +0200
+
+ Prevent crash if random DTB address is passed to bootm
+
+ This patch adds bootm_start() return value check. If
+ error status is returned, we do not proceed further to
+ prevent board reset or crash as we still can recover
+ at this point.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit cc347801add2689b1ee54d21f62bc14ecf6e1dd8
+Author: Andrew Dyer <adyer@righthandtech.com>
+Date: Fri Aug 29 12:30:39 2008 -0500
+
+ clean up some #if !defined() in drivers/video/cfb_console.c
+
+ rearrange some #if !defined() / #else / #endif statements to remove
+ the negative logic.
+
+ Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
+
+commit c83f4c2d77f07174dcd6bef7e87a0f7017be7c33
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Fri Aug 29 09:02:20 2008 +0900
+
+ apollon: use the last memory area for u-boot
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit a6f2e455b774d0c5d56e44e5661df9adb69b6e07
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Aug 28 13:50:42 2008 +0200
+
+ TQM8272: move NAND part in seperate File
+
+ I didn't try to use drivers/mtd/nand/fsl_upm.c for the NAND driver,
+ because I have no longer access to the hardware.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 584f979f7ee914e32d408739cbdd2c4457ec18b8
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Aug 28 13:48:36 2008 +0200
+
+ TQM8272: Fix compiling error for the TQM8272 board.
+
+ Fix compile problems caused by
+ commit cfa460adfdefcc30d104e1a9ee44994ee349bb7b
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 1a7f8ccec981648ccd38fca2535490582eee08e6
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Wed Aug 27 14:45:20 2008 +0900
+
+ Add JFFS2 command support on OneNAND
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit f5c3ba79788b0e39baab7026d374fe375dd1a43f
+Author: Mark Jackson <mpfj@mimc.co.uk>
+Date: Mon Aug 25 19:21:30 2008 +0100
+
+ Allow console input to be disabled
+
+ Added new CONFIG_DISABLE_CONSOLE define and GD_FLG_DISABLE_CONSOLE.
+
+ When CONFIG_DISABLE_CONSOLE is defined, setting
+ GD_FLG_DISABLE_CONSOLE disables all console input and output.
+
+ Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
+
+commit 2b22d608f370565c87f55928b524207031419c11
+Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+Date: Wed Jul 30 12:39:29 2008 +0200
+
+ loads: allow negative offsets
+
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+
+commit e90fb6afab2c0c074dfb67bacb4de179eb188a24
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Thu Sep 4 11:19:05 2008 +0200
+
+ USB EHCI: reset root hub
+
+ Some of multi-function USB controllers (e.g. ISP1562) allow root hub
+ resetting only via EHCI registers. So, this patch adds the
+ corresponding kind of reset to OHCI's hc_reset() if the newly
+ introduced CONFIG_PCI_EHCI_DEVNO option is set (e.g. for Socrates
+ board).
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+ Acked-by: Markus Klotzbuecher <mk@denx.de>
+
+commit 5875d358f025c1b042d8a0f08384b756de7256c9
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Fri Aug 15 15:42:09 2008 +0200
+
+ RX 8025 RTC: analyze 12/24-hour mode flag in rtc_get().
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+
+commit 3e3c026ed746a284c6f0ef139b26d859939de7e9
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Sep 5 10:47:46 2008 +0200
+
+ devices: Use list_add_tail() instead of list_add() to register a device
+
+ This patch fixes a problem spotted on Glacier/Canyonlands (and most
+ likely lots of other board ports), that no serial output was seen
+ after console initialization in console_init_r(). This is because the
+ last added console device was used instead of the first added.
+
+ This patch fixes this problem by using list_add_tail() instead of
+ list_add() to register a device. This way the first added console
+ is used again.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 78d78236896d62bb8ca7302af38d8f1493eb2651
+Author: Victor Gallardo <vgallardo@amcc.com>
+Date: Thu Sep 4 23:49:36 2008 -0700
+
+ ppc4xx: Add support for GPCS, SGMII and M88E1112 PHY
+
+ This patch adds GPCS, SGMII and M88E1112 PHY support
+ for the AMCC PPC460GT/EX processors.
+
+ Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f6b6c45840f9b4671d2d97243a12a1f3ffb64765
+Author: Adam Graham <agraham@amcc.com>
+Date: Wed Sep 3 12:26:59 2008 -0700
+
+ ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routines
+
+ Signed-off-by: Adam Graham <agraham@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 075d0b81e896e8735ae26372cd384f87cbd24e41
+Author: Adam Graham <agraham@amcc.com>
+Date: Wed Sep 3 12:26:28 2008 -0700
+
+ ppc4xx: IBM Memory Controller DDR autocalibration routines
+
+ Alternate SDRAM DDR autocalibration routine that can be generically used
+ for any PPC4xx chips that have the IBM SDRAM Controller core allowing for
+ support of more DIMM/memory chip vendors and gets the DDR autocalibration
+ values which give the best read latency performance (SDRAM0_RDCC.[RDSS]).
+
+ Two alternate SDRAM DDR autocalibration algoritm are provided in this patch,
+ "Method_A" and "Method_B". DDR autocalibration Method_A scans the full range
+ of possible PPC4xx SDRAM Controller DDR autocalibration values and takes a
+ lot longer to run than Method_B. Method_B executes in the same amount of time
+ as the currently existing DDR autocalibration routine, i.e. 1 second or so.
+ Normally Method_B is used and it is set as the default method.
+
+ The current U-Boot PPC4xx DDR autocalibration code calibrates the IBM SDRAM
+ Controller registers.[bit-field]:
+ 1) SDRAM0_RQDC.[RQFD]
+ 2) SDRAM0_RFDC.[RFFD]
+
+ This alternate PPC4xx DDR autocalibration code calibrates the following
+ IBM SDRAM Controller registers.[bit-field]:
+
+ 1) SDRAM0_WRDTR.[WDTR]
+ 2) SDRAM0_CLKTR.[CKTR]
+ 3) SDRAM0_RQDC.[RQFD]
+ 4) SDRAM0_RFDC.[RFFD]
+
+ and will also use the calibrated settings of the above four registers that
+ produce the best "Read Sample Cycle Select" value in the SDRAM0_RDCC.[RDSS]
+ register.[bit-field].
+
+ Signed-off-by: Adam Graham <agraham@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e07f4a8033b6270b8103049adb6456f660ff4a89
+Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+Date: Mon Sep 1 13:09:39 2008 -0400
+
+ ppc44x: Unification of virtex5 pp440 boards
+
+ This patch provides an unificated way of handling xilinx v5 ppc440 boards.
+
+ It unificates 3 different things:
+
+ 1) Source code
+ A new board called ppc440-generic has been created. This board includes
+ a generic tlb initialization (Maps the whole memory into virtual) and
+ defines board_pre_init, checkboard, initdram and get_sys_info weakly,
+ so, they can be replaced by specific functions.
+
+ If a new board needs to redefine any of the previous functions
+ (specific initialization) it can create a new directory with the
+ specific initializations needed. (see the example ml507 board).
+
+ 2) Configuration file
+ Common configurations are located under configs/xilinx-ppc440.h, this
+ header file interpretes the xparameters file generated by EDK and
+ configurates u-boot in correspondence. Example: if there is a Temac,
+ allows CMD_CONFIG_NET
+ Specific configuration are located under specific configuration file.
+ (see the example ml507 board)
+
+ 3) Makefile
+ Some work has been done in order to not duplicate work in the Main
+ Makefile. Please see the attached code.
+
+ In order to support new boards they can be implemented in the next way:
+
+ a) Simple Generic Board (90% of the time)
+ Using EDK generates a new xparameters.h file, replace
+ ppc440-generic/xparameters.h and run make xilinx-ppc440-generic_config
+ && make
+
+ b) Simple Boards with special u-boot parameters (9 % of the time)
+ Create a new file under configs for it (use ml507.h as example) and
+ change your paramaters. Create a new Makefile paragraph and compile
+
+ c) Complex boards (1% of the time)
+ Create a new folder for the board, like the ml507
+
+ Finally, it adds support for the Avnet FX30T Evaluation board, following
+ the new generic structure:
+
+ Cheap board by Avnet for evaluating the Virtex5 FX technology.
+
+ This patch adds support for:
+ - UartLite
+ - 16MB Flash
+ - 64MB RAM
+
+ Prior using U-boot in this board, read carefully the ERRATA by Avnet
+ to solve some memory initialization issues.
+
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 64ac1eb5afafced49b327425ad1814b2dc422d6e
+Author: Nick Spence <nick.spence@freescale.com>
+Date: Tue Sep 2 15:21:16 2008 -0500
+
+ mpc83xx: fix mpc8313 in-tree building with NAND
+
+ and add mpc8313 NAND build to MAKEALL
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 6eb2a44e27919fdc601e0c05404b298a7602c0e3
+Author: Nick Spence <nick.spence@freescale.com>
+Date: Thu Aug 28 14:09:25 2008 -0700
+
+ mpc83xx: clean up cache operations and unlock_ram_in_cache() functions
+
+ Cleans up some latent issues with the data cache control so that
+ dcache_enable() and dcache_disable() will work reliably (after
+ unlock_ram_in_cache() has been called)
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 46497056ae3b1e81e736e9cf3a170472c5d9719f
+Author: Nick Spence <nick.spence@freescale.com>
+Date: Thu Aug 28 14:09:19 2008 -0700
+
+ mpc83xx: Store and display Arbiter Event Register values
+
+ Record the Arbiter Event Register values and optionally display them.
+
+ The Arbiter Event Register can record the type and effective address of
+ an arbiter error, even through an HRESET. This patch stores the values in
+ the global data structure.
+
+ Display of the Arbiter Event registers immediately after the RSR value
+ can be enabled with defines. The Arbiter values will only be displayed
+ if an arbiter event has occured since the last Power On Reset, and either
+ of the following defines exist:
+ #define CONFIG_DISPLAY_AER_BRIEF - display only the arbiter address and
+ and type register values
+ #define CONFIG_DISPLAY_AER_FULL - display and interpret the arbiter
+ event register values
+
+ Address Only transactions are one of the trapped events that can register
+ as an arbiter event. They occur with some cache manipulation instructions
+ if the HID0_ABE (Address Broadcast Enable) is set and the memory region
+ has the MEMORY_COHERENCE WIMG bit set. Setting:
+ #define CONFIG_MASK_AER_AO - prevents the arbiter from recording address
+ only events, so that it can still capture
+ other real problems.
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit ade50c7fa1b16ef98be17e9c3ae286aecf4f5605
+Author: Nick Spence <nick.spence@freescale.com>
+Date: Thu Aug 28 14:09:11 2008 -0700
+
+ mpc83xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
+
+ This is needed in unlock_ram_in_cache() because it is called from C and
+ will corrupt the small data area anchor that is kept in R2.
+
+ lock_ram_in_cache() is modified similarly as good coding practice, but
+ is not called from C.
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit d9fe88173cb4f7d293796ffe10c7a0d3d426d8f9
+Author: Nick Spence <nick.spence@freescale.com>
+Date: Fri Aug 22 23:52:50 2008 -0700
+
+ MPC83XX: Fix GPIO configuration - set gpio level before direction
+
+ Set DAT value before DIR values to avoid creating glitches on the
+ GPIO signals.
+
+ Set gpio level register before direction register to inhibit
+ glitches on high level output pins.
+
+ Dir and data gets cleared at powerup, so high level output lines see
+ a short low pulse between setting the direction and level registers.
+
+ Issue was seen on a new board with the nReset line of the NOR flash
+ connected to a GPIO. Setting the direction register puts the NOR flash
+ in reset so the next instruction to set the level cannot get executed.
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+ Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 7007c5975ee900ad70983b0681d3251e221f8321
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Sep 2 02:58:32 2008 +0200
+
+ doc/qemu_mips: add doc howto debug u-boot with gdb
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 7deb3b3ecd0e81ef09bb68aa0ec2346f4ae0a405
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Wed Sep 3 17:15:45 2008 +0200
+
+ ppx4xx: Fix broken DASA_SIM board
+
+ This patch adds initdram() to DASA_SIM boards that has been
+ removed accidentally by a previous commit.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7e410aa30fbcb1d19a26bbf1e84a9ca6102d534b
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Sep 1 08:35:37 2008 +0200
+
+ ppc4xx: Remove reference to common/lists.o from some esd linker scripts
+
+ This patch removes some direct references to common/lists.o from some
+ esd linker scripts. This is necessary because the lists source was moved
+ and is not in the "common" directory anymore.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 97b0734d65f8a0b03df0a335a2addc759da56107
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 2 16:33:05 2008 +0200
+
+ ppc4xx: Remove obsolete or unused functions from some esd boards
+
+ This patch removes initdram() and testdram() from most esd 405 platforms.
+ Some boards also have an empty dummy implementation of
+ misc_init_f(). This is also removed.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1092ce218c514e5ccb18450ac5af501d96d6e3e9
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 2 15:07:54 2008 +0200
+
+ ppc4xx: Update VOM405 board configuration
+
+ - remove PCI code
+ - add command line editing
+ - minor cleanup
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 830c800e28e96ec7c3c6936a0bd1b9461f3e77d4
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 2 15:07:53 2008 +0200
+
+ ppc4xx: Remove obsolete initdram() function from VOM405 board
+
+ This patch removed the obsolete initdram() function from
+ VOM405 platform file.
+
+ Some minor cleanup.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3d4dd7a941b2327b8c2fc535b782ca307ff8b6c8
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 2 15:07:52 2008 +0200
+
+ ppc4xx: Cleanup VOM405 linker script
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit fcaffd597f6f5191b12ca66c2a4789bbdeea85c2
+Author: Matthias Fuchs <mf@esd.eu>
+Date: Tue Sep 2 15:07:51 2008 +0200
+
+ ppc4xx: Add fdt support for VOM405 boards
+
+ Signed-off-by: Matthias Fuchs <mf@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9ec367aa2c5dcf79558aa2b209b45d7686654c14
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 2 11:36:14 2008 +0200
+
+ ppc4xx: Coding style cleanup
+
+ Wrap long lines etc.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 17e65c21adfb63980e6aff80bfbd2df0eeb12060
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 2 11:35:56 2008 +0200
+
+ ppc4xx: Enable USB on PLU405 boards
+
+ This patch enables the PCI-OHCI controller on PLU405 board.
+
+ Also the default CPU frequency is updated to 266 MHz and
+ command line editing is enabled.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 40e43e3b87d57b2ac786e27f6e25a7df9940d93b
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 2 11:35:35 2008 +0200
+
+ ppc4xx: Cleanup PLU405 platform file
+
+ This patch
+ - wraps some long lines
+ - removes unused/obsolete functions: misc_init_f() and initdram()
+
+ Signed-off-by: Matthias Fuchs <mf@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d74cdb1d0614ab78128e0735a51e7988a7b7ea33
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 2 11:35:04 2008 +0200
+
+ ppc4xx: Cleanup PLU405 linker script
+
+ Signed-off-by: Matthias Fuchs <mf@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3bc1054cec2f6b25822f301ea922a16233baa4c7
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 2 11:34:36 2008 +0200
+
+ ppc4xx: Add fdt support for PLU405 boards
+
+ Signed-off-by: Matthias Fuchs <mf@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5a3e480b783bfbc139586293a54fb875d7c5c5d4
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 2 11:34:08 2008 +0200
+
+ ppc4xx: Increase U-Boot size to 384kB for PLU405 boards
+
+ Signed-off-by: Matthias Fuchs <mf@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit be1b0d2777e179191a57b138b660547a17e55aad
+Author: Jochen Friedrich <jochen@scram.de>
+Date: Tue Sep 2 11:24:59 2008 +0200
+
+ Don't tftp to unknown flash
+
+ If a board has a variable number of flash banks, there are empty entries
+ in flash_info[] and CFG_DIRECT_FLASH_TFTP is set, tftp boot fails with
+ "Outside available Flash". This patch skips flash banks with unknown
+ flash ids.
+
+ Signed-off-by: Jochen Friedrich <jochen@scram.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 33314470ab32a3f5412bb61b5f3d6c216c88bf9b
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Thu Aug 28 13:40:44 2008 +0900
+
+ net: smc911x: Add pkt_data_pull and pkt_data_push function
+
+ The RSK7203 board has the SMSC9118 wired up 'incorrectly'.
+ Byte-swapping is necessary, and so poor performance is inevitable.
+ This problem cannot evade by the swap function of CHIP, this can
+ evade by software Byte-swapping.
+ And this has problem by FIFO access only. pkt_data_pull/pkt_data_push
+ functions necessary to solve this problem.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 10efa024b8ffd9e6aaca63da8bddfdffdc672274
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 20:37:00 2008 -0700
+
+ Moved initialization of EEPRO100 Ethernet controller to board_eth_init()
+
+ Affected boards:
+ db64360
+ db64460
+ katmai
+ taihu
+ taishan
+ yucca
+ cpc45
+ cpu87
+ eXalion
+ elppc
+ debris
+ kvme080
+ mpc8315erdb
+ integratorap
+ ixdp425
+ oxc
+ pm826
+ pm828
+ pm854
+ pm856
+ ppmc7xx
+ sc3
+ sc520_spunk
+ sorcery
+ tqm8272
+ tqm85xx
+ utx8245
+
+ Removed initialization of the driver from net/eth.c
+ Also, wrapped contents of pci_eth_init() by CONFIG_PCI.
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 8ca0b3f99c4fce7a599dcaf92ae095496dc8c8e0
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:45:44 2008 -0700
+
+ Moved initialization of TULIP Ethernet controller to board_eth_init()
+
+ Affected boards:
+ cu824
+ bab7xx
+ adciop
+ dasa_sim
+ mousse
+ mpc8540eval
+ musenki
+ mvblue
+ pcippc2/pcippc6
+ sbc8240
+ stxssa
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit ad3381cf4167120db5c7b88e4970245e1d5c0a32
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:44:19 2008 -0700
+
+ Moved initialization of E1000 Ethernet controller to board_eth_init()
+
+ Affected boards:
+ ap1000
+ mvbc_p
+ PM854
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 4fce2aceaf8afd31a252bc782c9dbc497bf40487
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:40:51 2008 -0700
+
+ Moved initialization of plb2800 Ethernet driver to board_eth_init
+
+ Affected boards:
+ purple
+
+ Removed initialization of controller from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit e1d7480b5de1fd4830bf7cf5e2237d3b0846d08d
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:39:12 2008 -0700
+
+ Moved initialization of MPC5xxx_FEC Ethernet driver to CPU directory
+
+ Modified board_eth_init() functions of boards that have this FEC in addition
+ to other Ethernet controllers.
+
+ Affected boards:
+ bc3450
+ icecube
+ mvbc_p
+ o2dnt
+ pm520
+ total5200
+ tq5200
+
+ Removed initialization of controller from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit a0aad08f9427ac00218bdb2cb649833ce6ec9b8d
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:36:38 2008 -0700
+
+ Moved initialization of MPC512x_FEC Ethernet driver to CPU directory
+
+ Added a cpu_eth_init() function to MPC512x CPU directory and
+ removed code from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 8218bd2aa68820b878a8413493ae17fd8d21f944
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:16:59 2008 -0700
+
+ Moved initialization of IncaIP Ethernet controller to board_eth_init
+
+ Affected boards:
+ IncaIP
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 164846eeb25cb2a5ede7ab9371fdca7f4831a055
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:15:26 2008 -0700
+
+ Moved initialization of 3COM Ethernet controller (AmigaOne) to board_eth_init()
+
+ Affected boards:
+ AmigaOneG3SE
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 6aca145e067efe75398e9fac97822bd3700de0b2
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:13:34 2008 -0700
+
+ Moved initialization of GT6426x Ethernet controller to board_eth_init()
+
+ Affected boards:
+ EVB64260
+ P3G4
+ ZUMA
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit e3090534d62045dcb73f5392bacc64a4e8e443dc
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:08:43 2008 -0700
+
+ Moved initialization of PCNET Ethernet controller to board_eth_init()
+
+ Affected boards:
+ PN62
+ sc520_cdp
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit b902b8dda5e1fd4d5fe2f202c71ee3521d2c40ed
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:07:16 2008 -0700
+
+ Moved initialization of NATSEMI Ethernet controller to board_eth_init()
+
+ Affected boards:
+ a3000
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 19403633dd70333893c2da7926a1d0dcd6dab7d8
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 10:03:22 2008 -0700
+
+ Moved initialization of NS8382X Ethernet controller to board_eth_init()
+
+ Affected boards:
+ bc3450
+ cpci5200
+ mecp5200
+ pf2000
+ icecube
+ o2dnt
+ pm520
+ sandpoint8245
+ total5200
+ tqm5200
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit ccdd12f83ef93719fbe85f642aa4dc648b9498f0
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 09:59:33 2008 -0700
+
+ Moved initialization of TSI108 Ethernet controller to board_eth_init()
+
+ Affected boards:
+ mpc7448hpc2
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 0b252f50ae218ae15bfb63af44227972686ebc56
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 21:41:08 2008 -0700
+
+ Moved initialization of RTL8139 Ethernet controller to board_eth_init()
+
+ Affected boards:
+ hidden_dragon
+ MPC8544DS
+ MPC8610HPCN
+ R2DPLUS
+ TB0229
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 02d69891d95ee76b0e86e1715a4dc0b964a57cb7
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 09:49:42 2008 -0700
+
+ Moved initialization of RTL8169 Ethernet controller to board_eth_init()
+
+ Affected boards:
+ linkstation
+ r7780mp
+
+ Removed initialization of the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 3ae071e44256144d6c1e3febb65f6c56bd433769
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Tue Aug 12 22:11:53 2008 -0700
+
+ Moved initialization of Ethernet controllers on Atmel AT91 to board_eth_init()
+
+ Removed at91sam9_eth_initialize() from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 89973f8a82c28ad893c4c3cc56839a8e10fe5f13
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sun Aug 31 22:22:04 2008 -0700
+
+ Introduce netdev.h header file and remove externs
+
+ This addresses all drivers whose initializers have already
+ been moved to board_eth_init()/cpu_eth_init().
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 5a8a163ac394d9f4f7ff57f415d82bd673b0068c
+Author: Andy Fleming <afleming@freescale.com>
+Date: Sun Aug 31 16:33:30 2008 -0500
+
+ Add pixis_set_sgmii command
+
+ The 8544DS and 8572DS platforms support an optional SGMII riser card to
+ expose ethernet over an SGMII interface. Once the card is in, it is also
+ necessary to configure the board such that it uses the card, rather than
+ the on-board ethernet ports. This can either be done by flipping dip switches
+ on the motherboard, or by modifying registers in the pixis. Either way
+ requires a reboot.
+
+ This adds a command to allow users to choose which ports are routed through
+ the SGMII card, and which through the onboard ports. It also allows users
+ to revert to the current switch settings.
+
+ This code does not work on the 8572, as the PIXIS is different.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 216f2a7156a5fde7b47adc40ad553c888a9cbaa7
+Author: Andy Fleming <afleming@freescale.com>
+Date: Sun Aug 31 16:33:29 2008 -0500
+
+ Add SGMII support for the 8544 DS
+
+ The 8544 DS has an optional SGMII Riser card, which uses different PHY
+ addresses. Check if we are in SGMII mode, and invoke the SGMII Riser
+ setup code if so.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 652f7c2eef76a1340928bd660845441e932d86a2
+Author: Andy Fleming <afleming@freescale.com>
+Date: Sun Aug 31 16:33:28 2008 -0500
+
+ Add support for Freescale SGMII Riser Card
+
+ The 8544DS and 8572DS systems have an optional SGMII riser card which
+ exposes new ethernet ports which are connected to the eTSECs via an
+ SGMII interface. The SGMII PHYs for this board are offset from the standard
+ PHY addresses, so this code modifies the passed in tsec_info structure to
+ use the SGMII PHYs on the card, instead.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 2abe361c03b43e6dcf68f54e96b5c05156c49284
+Author: Andy Fleming <afleming@freescale.com>
+Date: Sun Aug 31 16:33:27 2008 -0500
+
+ Add SGMII support to the tsec
+
+ Adds support for configuring the TBI to talk properly with the SerDes.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 75b9d4ae0d69f214eab641caf12ce8af83a39a42
+Author: Andy Fleming <afleming@freescale.com>
+Date: Sun Aug 31 16:33:26 2008 -0500
+
+ Pass in tsec_info struct through tsec_initialize
+
+ The tsec driver contains a hard-coded array of configuration information
+ for the tsec ethernet controllers. We create a default function that works
+ for most tsecs, and allow that to be overridden by board code. It creates
+ an array of tsec_info structures, which are then parsed by the corresponding
+ driver instance to determine configuration. Also, add regs, miiregs, and
+ devname fields to the tsec_info structure, so that we don't need the kludgy
+ "index" parameter.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit dd3d1f56a01f460d560766126ee7dfed2ea9bc10
+Author: Andy Fleming <afleming@freescale.com>
+Date: Sun Aug 31 16:33:25 2008 -0500
+
+ tsec: Move tsec.h to include/
+
+ This is to prepare the way for board code passing in the tsec_info structure
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit d23dc394aa69093b6326ad917db04dc0d1aff3f8
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Fri Jun 6 15:52:44 2008 +0200
+
+ PHY: Add support for the M88E1121R Marvell chip.
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 1711f3bd16d1c5e9d17b4c0198b426d86999781b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 2 21:17:36 2008 +0200
+
+ fw_env.c: fix build problems with MTD_VERSION=old
+
+ (as needed to support old 2.4 Linux kernel based releases)
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 628ffd73bcff0c9f3bc5a8eeb2c7455fe9d28a51
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Mon Sep 1 17:11:26 2008 +0200
+
+ device: make device_register() clone the device
+
+ This is expected by the callers, but this fact was hidden well within
+ the old list implementation.
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit c75e772a2f061a508bba28ded1b5bea91f0442b0
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Sun Aug 31 23:28:15 2008 +0900
+
+ sh: Remove CC line from board's Makefile
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 468eae0660de6fdfd9999944c536ecc4797bd944
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Sun Aug 31 23:25:57 2008 +0900
+
+ sh: Replaced "@./mkconfig" for @$(MKCONFIG)
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 3aeb1ff7482a732503186c742d3a5ded4b7a0d34
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Thu Aug 28 14:50:52 2008 +0900
+
+ sh: Add support sh2 to MAKEALL
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 6f3d8bb5faa12dbf3031382286784c978df038ee
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Thu Aug 28 14:52:23 2008 +0900
+
+ sh: Fix compile error rsk7203 board
+
+ This boards used old type preprocessor.
+ This patch fix compile error.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 1c98172e025018552e9bb4c43b0aaee76f79b1aa
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Thu Aug 28 14:53:31 2008 +0900
+
+ sh: Fix compile error sh7785lcr board
+
+ This boards used old type preprocessor.
+ This patch fix compile error.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 6f0da4972e48f99d37bc522814940a6022cd3084
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Fri Aug 22 17:39:09 2008 +0900
+
+ sh: Renesas Solutions AP325RXA board support
+
+ AP325RXA is SH7723's reference board.
+ This has SCIF, NOR Flash, Ethernet, USB host, LCDC, SD Host, Camera and other.
+ In this patch, support SCIF, NOR Flash, and Ethernet.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit ab09f433b50bb83b5e440c335bc3839ee069e534
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Fri Aug 22 17:48:51 2008 +0900
+
+ sh: add support Renesas SH7723
+
+ Renesas SH7723 has 5 SCIF, SD, Camera, LCDC and other.
+ This patch supports CPU register's header file and SCIF serial driver.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit c655fad06ba3fb042dbc667724a40e1a9a091248
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Sun Aug 31 23:02:04 2008 +0900
+
+ sh: Renesas RSK+ 7203 board support
+
+ This adds initial support for the RTE RSK+ SH7203 board.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 6ede753ddf52a7b0f992d9bccbe5e4a0968ca475
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Thu Jul 3 23:11:02 2008 +0900
+
+ sh: Add support Renesas SH7203 processor
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 6ad43d0dd86b612895ddc7f480eb6cdfe793adf9
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Sun Aug 31 22:48:33 2008 +0900
+
+ sh: Add support SH2/SH2A which is CPU of Renesas Technology
+
+ Add support SH2/SH2A basic function.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 0d53a47dc0737b6aa3a39caee21410c169441ae5
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Sun Aug 31 22:45:08 2008 +0900
+
+ sh: Renesas R0P7785LC0011RL board support
+
+ This board has SH7785, 512MB DDR2-SDRAM, NOR Flash,
+ Graphic, Ethernet, USB, SD, RTC, and I2C controller.
+
+ This patch supports the following functions:
+ - 128MB DDR2-SDRAM (29-bit address mode only)
+ - NOR Flash
+ - USB host
+ - Ethernet
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit b0b6218929bc7de9a6bdb8e564fa8ec2efa71b4e
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date: Thu Jul 10 19:32:53 2008 +0900
+
+ sh: add support for SH7785
+
+ Renesas SH7785 has DDR2-SDRAM controller, PCI, and other.
+ This patch supports CPU register's header file.
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit d6e04258be8f2408845468d3cf722a4cf0433445
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Aug 31 04:45:42 2008 +0200
+
+ davinci: fix remaining dm644x_eth
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 08ab4e1780fa63c88dd5a5ab52f4ff4ed1ee1878
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Aug 31 04:24:56 2008 +0200
+
+ fs: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit c1de7a6daf9c657484e1c6d433f01fccd49a7f48
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Aug 31 04:24:55 2008 +0200
+
+ devices: merge to list_head
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit ef0255fc75f28655f9681422079287d68a14dbaa
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Aug 31 04:24:51 2008 +0200
+
+ update linux/list
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 71cb31227bee741b274f6c0279b2aac1ab8e28e3
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Aug 31 00:39:48 2008 +0200
+
+ smdk6400: add gitignore
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit f9f692e2b146d4e306b777e6d5f69f1d725b9eb9
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Aug 31 00:39:48 2008 +0200
+
+ smdk6400: Use CONFIG_FLASH_CFI_DRIVER
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 7c0e5a8db3d1358b0ce3cc85ada0de6341ca4a15
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Sun Aug 31 00:39:47 2008 +0200
+
+ smdk6400: remove redundant bootargs definition
+
+ Double bootargs setting leads to a duplicated environmant entry.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 11edcfe260f20dcea79284a3e95270989d433854
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Sun Aug 31 00:39:47 2008 +0200
+
+ ARM: Add support for S3C6400 based SMDK6400 board
+
+ SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl
+ driver for it too. The board can also boot from the NOR flash, but due to
+ hardware limitations it can only address 64KiB on it, which is not enough
+ for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit e0056b341069796eaea11eae0fc8eb93a3dceaac
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Sun Aug 31 00:39:47 2008 +0200
+
+ NAND: add NAND driver for S3C64XX
+
+ Based on the original S3C64XX NAND driver by Samsung for U-Boot 1.1.6.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 3fe7b589f9c7463df39056f8872006a67f56a91c
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Sun Aug 31 00:39:47 2008 +0200
+
+ S3C64XX: remove broken HWFLOW support from the serial driver
+
+ As noted by Harald Welte, HWFLOW support in the S3C64XX serial driver is
+ broken and currently unused. Remove it.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 2fb28dcf82048045e1bf5014e938e486fa6c2383
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Sun Aug 31 00:39:47 2008 +0200
+
+ serial: add S3C64XX serial driver
+
+ Based on the original S3C64XX UART driver by Samsung for U-Boot 1.1.6.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 8262813ca04fc57f5d8856e1828085c136e0f1eb
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Sun Aug 31 00:39:46 2008 +0200
+
+ USB: Add support for OHCI controller on S3C6400
+
+ Notice: USB on S3C6400 currently works _only_ with switched off MMU. One could
+ try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
+ it should work too and we could still profit from instruction cache.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit 9b07773f8883665b002500c190507e9fd99b7181
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Sun Aug 31 00:39:46 2008 +0200
+
+ ARM: Add arm1176 core with S3C6400 SoC
+
+ Based on the original S3C64XX port by Samsung for U-Boot 1.1.6.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+
+commit fcaac589a68115819ddadcf5c18ded9a5f9e2c75
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Sun Aug 31 00:39:46 2008 +0200
+
+ ARM DaVinci: Changing function names for EMAC driver
+
+ DM644x is just one of a series of DaVinci chips that use the EMAC driver.
+ By replacing all the function names that start with dm644x_* to davinci_*
+ we make these function more portable. I have tested this change on my EVM.
+ DM6467 is another DaVinci SOC which uses the EMAC driver and i will
+ be sending patches that add DaVinci DM6467 support to the list soon.
+
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit fbbb1de369ca7d5ace6f7b0ce9d0aee24a6f457b
+Author: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
+Date: Sat Aug 30 23:21:30 2008 +0200
+
+ Integrator[AP/CP] - Remove unused file memsetup.S
+
+ - memsetup.s is changed/merged to lowlevel_init.S
+ memsetup.S has a global label memsetup that just returns back to caller
+ - memsetup global label is changed/merged to lowlevel_init
+ This label is not called from anywhere.
+
+ Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
+
+commit 89d51d022a63be1a851eda983c8cbce1a044f65f
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Wed Aug 27 21:35:52 2008 +0200
+
+ ARM DaVinci: Standardize names of directories/files
+
+ ARM DaVinci: Standardize names of directories/files.
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 264bbdd11d01f14f5ea4629556ae63b00b13402d
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Fri Jul 11 15:10:13 2008 -0400
+
+ ARM DaVinci: Move common functions to board/davinci/common
+
+ ARM DaVinci: Move common functions to board/davinci/common.
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit c2b4b2e4814f4ace9015fdb64132894327400bf0
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 29 11:56:49 2008 +0200
+
+ ppc4xx/NAND: Add select_chip function to 4xx NDFC driver
+
+ This function is needed for the new NAND infrastructure. We only need
+ a dummy implementation though for the NDFC.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3d4a746e2fb4545f07d871049805fb34ae97cc94
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 29 12:06:27 2008 +0200
+
+ ppc4xx: Increase image size for NAND boot target
+
+ This is needed since now with HUSH enabled (amcc-common.h) the image
+ read from NAND exceeds the previous limit.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6b5049d056cd8ef72d1f2f461ceb2d033d93f759
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Thu Aug 28 23:58:30 2008 -0700
+
+ Move MPC512x_FEC driver to drivers/net
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 80b00af01b3c9154774de2936f05a051e92f6a03
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Thu Aug 28 23:58:29 2008 -0700
+
+ Move MPC5xxx_FEC driver to drivers/net
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 3de7bf0e6b1ad2608014096c8192f13229b2e9d7
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Aug 29 21:53:57 2008 +0200
+
+ cmd_terminal: remove no need ifdef
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 578118bdf122877ae769776be002255be447b4fa
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Aug 29 21:53:57 2008 +0200
+
+ common/Makefile: order by functionality
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit ba7b5b2348b684cf8ec424b2e38e267dc1cfd2fb
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Aug 29 21:53:56 2008 +0200
+
+ miiphyutil: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 81789c39db3f0f6b621df8c0ec66014d701f368e
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Aug 29 21:53:37 2008 +0200
+
+ autoscript: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit bbf52df9aa94ffb115b8b1ebeb00d01374bb0a1d
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Aug 29 01:18:11 2008 +0200
+
+ crc16: move to lib_generic
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 55195773eacefb22dd483a3c560ea30a14263ce1
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Aug 29 01:18:01 2008 +0200
+
+ miiphybb: move to drivers/net/phy
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit e8314035996a9118ac5948df2ff8a2f2161ed67a
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Thu Aug 28 12:31:51 2008 +0200
+
+ soft_spi: move to drivers/spi
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 4d75e0aa9caca64d4a1d55d95cd1ca5f30d9fc56
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Thu Aug 28 12:31:51 2008 +0200
+
+ soft_i2c: move to drivers/i2c
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 717a222229fdb77703e9174d0eb08a4b41febf49
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Thu Aug 28 12:31:48 2008 +0200
+
+ gunzip: move to lib_generic
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 52aef8f9ba28b747973bf76741c23db658d5773c
+Author: Wolfgang Ocker <weo@reccoware.de>
+Date: Tue Aug 26 19:55:23 2008 +0200
+
+ ppc4xx: NAND configuration
+
+ Made NAND bank configuration setting a config variable.
+
+ Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5bc542a593abc9e974fbd34704af85c37c366c60
+Author: Victor Gallardo <vgallardo@amcc.com>
+Date: Thu Aug 28 16:03:28 2008 -0700
+
+ ppc4xx: fix UIC external_interrupt hang on UIC0
+
+ This patch fixes a UIC external_interrupt hang if critical or non-critical
+ interrupt is set at the same time as a normal interrupt is set on UIC0.
+
+ Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 04737d5ffd16248cb80ab3dd4f3765057a803f18
+Author: Prodyut Hazarika <phazarika@amcc.com>
+Date: Wed Aug 27 16:39:00 2008 -0700
+
+ ppc4xx: Optimizations/Cleanups for IBM DDR2 Memory Controller
+
+ Removed Magic numbers from Initialization preload registers
+ Tested with Kilauea, Glacier, Canyonlands and Katmai boards
+ About 5-7% improvement seen for LMBench memtests
+
+ Signed-off-by: Prodyut Hazarika <phazarika@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8a490422bed685c9491274ec997f62061d88620b
+Author: John Rigby <jrigby@freescale.com>
+Date: Thu Aug 28 13:17:07 2008 -0600
+
+ ADS5121: Fix NOR and CPLD ALE timing for rev 2 silicon
+
+ MPC5121 rev 2 silicon has a new register for controlling how long
+ CS is asserted after deassertion of ALE in multiplexed mode.
+
+ The default is to assert CS together with ALE. The alternative
+ is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.
+
+ The default is wrong for the NOR flash and CPLD on the ADS5121.
+
+ This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
+ it does so conditionally based on silicon rev 2.0 or greater.
+
+ Signed-off-by: Martha J Marx <mmarx@silicontkx.com>
+ Signed-off-by: John Rigby <jrigby@freescale.com>
+
+commit 5d9a5efa4b332f442b54a755d49969123c3a8742
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Aug 19 00:56:46 2008 +0600
+
+ Add I2C frequency dividers for ColdFire
+
+ The existing I2C freqency dividers for FDR does not apply
+ to ColdFire platforms; thus, a seperate table is added
+ based on MCF5xxx Reference Manual
+
+ Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+ Acked-by: Tabi Timur <timur@freescale.com>
+
+commit eec567a67e00d1ed8d941e9098b7d421f4091abf
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Aug 19 03:01:19 2008 +0600
+
+ ColdFire: I2C fix for multiple platforms
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit d53cf6a9c7423cba668b867978648645f71c3090
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Aug 19 00:37:13 2008 +0600
+
+ ColdFire: Add CONFIG_MII_INIT for M5272C3
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit f78ced3028d4130b24a318943a70cf5584ab16f4
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Aug 19 00:26:25 2008 +0600
+
+ ColdFire: Multiple fixes for MCF5445x platforms
+
+ Add FEC pin set and mii reset in __mii_init(). Change
+ legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
+ change cfi_offset to 0, and change CFG_FLASH_CFI to
+ CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
+ M54455EVB env settings in configuration file.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 454e725b3a9537b7f273bbd0cbca180f23a7a6e8
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Fri Aug 15 18:24:25 2008 +0000
+
+ ColdFire: Change the SDRAM BRD2WT timing from 3 to 7
+
+ The user manuals recommend 7.
+
+ Signed-off-by: Kurt Mahan <kmahan@freescale.com>
+ Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 79e0799cf6e88d98d77b216a55234bf674b59a4e
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Fri Aug 15 16:50:07 2008 +0000
+
+ ColdFire: Raise uart baudrate to 115200 bps
+
+ M5249EVB, M5271EVB, M5272C3, M5275EVB and M5282EVB platforms
+ uart baudrate increase from 19200 to 115200 bps
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit ab6ba842682552ccf071d0034da0a20633d1d1ac
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 13 12:07:03 2008 +0000
+
+ ColdFire: Fix board.c warning message
+
+ Implicit declaration of nand_init() warning message
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 5798b1c4650e9a8713c95b25c1e669a2bc80a97b
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Aug 27 01:10:34 2008 -0500
+
+ FSL DDR: Remove duplicate setting of cs0_bnds register on 86xx.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 258c37b147353bc522ffc33dfbd7d0d9cd7c32d7
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Aug 21 20:44:49 2008 +0200
+
+ mpc52xx: added support for the MPC5200 based MUC.MC52 board from MAN.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 9cff4448a9cb882defe6c8bde73b77fc0c636799
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 19 14:46:36 2008 -0500
+
+ mpc85xx: remove redudant code with lib_ppc/interrupts.c
+
+ For some reason we duplicated the majority of code in lib_ppc/interrupts.c
+ not show how that happened, but there is no good reason for it.
+
+ Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
+ they exist.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9490a7f1a9484617bad75c60807ce02c8a3a6d56
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Jul 25 13:31:05 2008 -0500
+
+ mpc85xx: Add support for the MPC8536DS reference board
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
+ Signed-off-by: Dejan Minic <minic@freescale.com>
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ef50d6c06ece74fb17e8d7510e62cad9df8b810d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 12 11:14:19 2008 -0500
+
+ mpc85xx: Add support for the MPC8536
+
+ The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We
+ also have SERDES init code for the 8536.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
+ Signed-off-by: Dejan Minic <minic@freescale.com>
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 129ba616b3813dde861f25f3d8a3c47c5c36ad5f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 12 11:13:08 2008 -0500
+
+ mpc85xx: Add support for the MPC8572DS reference board
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 457caecdbca3df21a93abff19eab12dbc61b7897
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Aug 27 01:05:35 2008 -0500
+
+ FSL DDR: Remove old SPD support from cpu/mpc85xx
+
+ All 85xx boards have been converted to the new code so we can
+ remove the old SPD DDR setup code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0e7927db138976469e7257e29c1338050a50fcd9
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Aug 27 01:04:07 2008 -0500
+
+ FSL DDR: Convert STXSSA to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c360d9b970fbb9c13744c355879671165bbb9b9e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Aug 27 01:03:42 2008 -0500
+
+ FSL DDR: Convert STXGP3 to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 8e55313b7ae12352a343f9b9962e662dbd897187
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 23:52:58 2008 -0500
+
+ FSL DDR: Convert SBC8560 to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9658bec2e8f55d56ca1be70090ce5a348be4980f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 23:52:32 2008 -0500
+
+ FSL DDR: Convert MPC8540EVAL to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6bfa8f723cfd82c55e3ef5620ade396916470a70
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 23:52:07 2008 -0500
+
+ FSL DDR: Convert PM856 to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d53bd3e17bd4f460257c19255569ea6dcfaae817
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 23:51:49 2008 -0500
+
+ FSL DDR: Convert PM854 to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 33b9079ba20926f14238fff863b68a98e938948e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 23:15:28 2008 -0500
+
+ FSL DDR: Convert sbc8548 to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a947e4c7eb15cea1d9fb633955c516aab5ad35dd
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 23:14:14 2008 -0500
+
+ FSL DDR: Convert atum8548 to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit be0bd8234b9777ecd63c4c686f72af070d886517
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 22:56:56 2008 -0500
+
+ FSL DDR: Convert socrates to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 1167a2fd56138b716e01370c4267f3b70bf9ffa0
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 08:02:30 2008 -0500
+
+ FSL DDR: Convert MPC8544DS to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit e6f5b35b41ddbd637bb9ca4ad985b1e0b07dae0e
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Mar 18 13:51:05 2008 -0500
+
+ FSL DDR: Convert MPC8568MDS to new DDR code.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit e31d2c1e2bc954dc32e33bb2076139f85b95f8e6
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Mar 18 13:51:06 2008 -0500
+
+ FSL DDR: Convert MPC8548CDS to new DDR code.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit aa11d85cf318b961e029fe50d68ca47d004bce93
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Mar 17 15:48:18 2008 -0500
+
+ FSL DDR: Convert MPC8541CDS to new DDR code.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 2b40edb10d81da7bba724edbccd7f53777112579
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Mar 18 11:12:42 2008 -0500
+
+ FSL DDR: Convert MPC8555ADS to new DDR code.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 8b625114e8bc5a6b436181167a6e7fcd3303dd2c
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Mar 18 11:12:44 2008 -0500
+
+ FSL DDR: Convert MPC8560ADS to new DDR code.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9617c8d49a21703eaf13a4033ab1a56eecc033cc
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Jun 6 13:12:18 2008 -0500
+
+ FSL DDR: Convert MPC8540ADS to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 2a6c2d7ab2a66660f40a6cd3de2eb29ee29d9693
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 21:34:55 2008 -0500
+
+ FSL DDR: Add 85xx specific register setting
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6fb1b7346849ccd0c20306143e334f5b76143070
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Jun 9 11:07:46 2008 -0500
+
+ FSL DDR: Add e500 TLB helper for DDR code
+
+ Provide a helper function that board code can call to map TLBs when
+ setting up DDR.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d26b739afe5a6760bd345743188759cd9d0f3b47
+Author: Andrew Dyer <adyer@righthandtech.com>
+Date: Tue Aug 26 17:03:38 2008 -0500
+
+ dm9000 remove dead external phy support, gpio fix
+
+ dm9000 has code to detect and initialize external phy parts, but later
+ on in the code the part is forced to use the internal phy
+ unconditionally. Remove the unused/untested code.
+
+ change the GPIO initialization so that only the GPIO used as an
+ internal phy reset (hardwired in the chip) is set as an output. The
+ remaining GPIO need to be handled by board specific code to prevent
+ possible drive conflicts. Set as inputs for safety.
+
+ replace a few magic numbers with defines
+
+ Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit a1573db0c07c8ba99e9c373bb07ecd6f59da672c
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Aug 26 11:17:48 2008 -0500
+
+ Standardize bootp, tftpboot, rarpboot, dhcp, and nfs command descriptions
+
+ cmd_net.c command descriptions were updated to describe the optional
+ hostIPaddr argument. The dhcp command help message was also updated
+ to more closely reflect the other commands in cmd_net.c
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 51dfe1382ebaf691485badfa0ea5e75b0710531b
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Wed Aug 20 11:30:28 2008 +0200
+
+ Fix bogus error message in the DHCP handler
+
+ The DHCP handler has 1 state that is not listed in this case, causing a
+ failure message when there is actually no failure.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 61365501a0e2cae9c1df2818b7b5b3f52c450d18
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Wed Aug 20 11:30:27 2008 +0200
+
+ Fix compile error when CONFIG_BOOTP_RANDOM_DELAY is set.
+
+ The option CONFIG_BOOTP_RANDOM_DELAY does not compile, because of a
+ missing extern inside the net/bootp.h header
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 1803f7f91ff35ca402259065df7557107dcf28a2
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Aug 19 21:26:32 2008 +0000
+
+ ColdFire: Add FEC Buffer descriptors in SRAM
+
+ Add FEC Buffer descriptors and data buffer in SRAM for
+ faster execution and access.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 429be27ce195210d4b9decf9e867b9ca6155a87d
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Aug 21 23:55:11 2008 +0000
+
+ Fix ColdFire FEC warning messages
+
+ Types mismatch and implicit declaration of icache_invalid()
+ warning messages
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 6a002171098e968bd5b362347d2831224fab6048
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sat Jul 12 00:17:50 2008 -0700
+
+ Moved initialization of SKGE Ethernet driver to board code.
+
+ The only board using this driver is the SL8245 board.
+ Removed initialization for the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 8379f42bc745eb9e4ca551a30fd2d0a63f740d75
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sat Jul 12 00:08:45 2008 -0700
+
+ Moved conditional compilation to Makefile for SK98 Ethernet driver
+
+ Brute-force removal of #ifdefs. Didn't touch the code.
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 65d3d99c28dc363d15eaee78225ff643df499b97
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Fri Jul 11 23:42:19 2008 -0700
+
+ Moved initialization of ULI526X Ethernet driver to board code.
+
+ The only board using this driver is the Freescale MPC8610HPCD board.
+ Removed initialization for the driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 914947313a710f5dcf06beaf7f2aa24f1ebcce4f
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Fri Jul 11 23:15:28 2008 -0700
+
+ Moved initialization of Blackfin EMAC Ethernet controller to board_eth_init()
+
+ Added board_eth_init() function to bf537-stamp board.
+ Removed initialization for the Blackin EMAC driver from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit fc363ce35408f348cacced68505f3747a53e3d7c
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Wed Jul 9 01:04:19 2008 -0700
+
+ Moved initialization of GRETH Ethernet driver to CPU directory
+
+ Added a cpu_eth_init() function to leon2/leon3 CPU directories and
+ removed code from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 86882b80771309bceb11c6accfd7f6f90ade8bfc
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Tue Aug 26 22:16:25 2008 -0700
+
+ Moved initialization of MCFFEC Ethernet driver to CPU directory
+
+ Added a cpu_eth_init() function to coldfire CPU directories and
+ removed code from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit b31da88b9c160d80d42a59cbbb31e24f27184d5c
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Tue Aug 26 22:12:36 2008 -0700
+
+ Moved initialization of FSL_MCDMAFEC Ethernet driver to CPU directory
+
+ Added a cpu_eth_init() function to cpu/mcf547x_8x directory and
+ removed code from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit b5710d9974f6f0f3ddb4e67d6cccc262ab37049e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 15:01:38 2008 -0500
+
+ FSL DDR: Remove old SPD support from cpu/mpc86xx
+
+ All 86xx boards have been converted to the new code so we can
+ remove the old SPD DDR setup code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9bd4e5911b750837515466bc7449087698b88e0e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 15:01:37 2008 -0500
+
+ FSL DDR: Convert SBC8641D to new DDR code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 39aa1a73483e1ac2bd56d5523abfc3970ee82c77
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Aug 26 15:01:36 2008 -0500
+
+ FSL DDR: Convert MPC8610HPCD to new DDR code.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6a8e5692933e8e6d6e5ba7e594f49dd6d4c3a263
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 15:01:35 2008 -0500
+
+ FSL DDR: Convert MPC8641HPCN to new DDR code.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 46ff4f1100ea64a01d21cc008ce85ac15eb1821f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 15:01:34 2008 -0500
+
+ FSL DDR: Add 86xx specific register setting
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 233fdd502a6c227f476212b3097653ad48d7e254
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 15:01:32 2008 -0500
+
+ FSL DDR: Add DDR2 DIMM paramter support
+
+ Compute DIMM parameters based upon the SPD information.
+
+ Signed-off-by: James Yang <James.Yang@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 05c05a2363a6ac11e0e405926034546ffad71fad
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 15:01:30 2008 -0500
+
+ FSL DDR: Add DDR1 DIMM paramter support
+
+ Compute DIMM parameters based upon the SPD information in spd.
+
+ Signed-off-by: James Yang <James.Yang@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 58e5e9aff147e8c7e2bc1406bf9384f65f020ffa
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 15:01:29 2008 -0500
+
+ FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
+
+ The main purpose of this rewrite it to be able to share the same
+ initialization code on all FSL PowerPC products that have DDR
+ controllers. (83xx, 85xx, 86xx).
+
+ The code is broken up into the following steps:
+ GET_SPD
+ COMPUTE_DIMM_PARMS
+ COMPUTE_COMMON_PARMS
+ GATHER_OPTS
+ ASSIGN_ADDRESSES
+ COMPUTE_REGS
+ PROGRAM_REGS
+
+ This allows us to share more code an easily allow for board specific code
+ overrides.
+
+ Additionally this code base adds support for >4G of DDR and provides a
+ foundation for supporting interleaving on processors with more than one
+ controller.
+
+ Signed-off-by: James Yang <James.Yang@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f784e32b4bce0013983506b11af4b85b8ca3d36e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 26 15:01:28 2008 -0500
+
+ FSL DDR: Provide a generic set_ddr_laws()
+
+ Provide a helper function that will setup the last available
+ LAWs (upto 2) for DDR. Useful for SPD/dyanmic DDR setting code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0f2cbe3f5eddbdf3848265f35e4f714434929cff
+Author: James Yang <James.Yang@freescale.com>
+Date: Tue Aug 26 15:01:27 2008 -0500
+
+ Add proper SPD definitions for DDR1/2/3
+
+ Also adds helper functions for DDR1/2 to verify the checksum.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 285db74716c724ae8a0ff177878fd09a74428c7b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Aug 27 01:02:48 2008 +0200
+
+ Update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit adf22b66d8bf05bd46e098cf71e6dca29b30aa7b
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Aug 19 10:08:49 2008 +0200
+
+ Add support for muas3001 board (MPC8270)
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 322098bff32410d2a00031649b47c4ec90a66d9a
+Author: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
+Date: Tue Aug 19 08:31:18 2008 +0530
+
+ common/cmd_load.c cleanup - remove unused variables
+
+ - Remove unused global variable os_data_count.
+ - Remove unused variable z.
+
+ Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
+
+commit 306620b762a4f9fa6678568ad2e8772dec145208
+Author: Andre Schwarz <andre.schwarz@matrix-vision.de>
+Date: Mon Aug 18 13:35:27 2008 +0200
+
+ remove MVS1 board
+
+ MVS1 board has reached end-of-life and can be removed completely.
+
+ Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+
+commit 40d7e99d374ba0a0a29cd1a8ba40d3b7c2c175c7
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:45 2008 -0500
+
+ bootm: refactor do_reset and os boot function args
+
+ There is no need for each OS specific function to call do_reset() we
+ can just do it once in bootm. This means its feasible on an error for
+ the OS boot function to return.
+
+ Also, remove passing in cmd_tbl_t as its not needed by the OS boot
+ functions. flag isn't currently used but might be in the future so
+ we left it alone.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 40afac22a9c602e55c501c800f1c064324711b56
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:44 2008 -0500
+
+ fdt: Added resize command
+
+ Resize the fdt to size + padding to 4k boundary
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 2a1a2cb6e2b87ee550e6f27b647d23331dfd5e1b
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:43 2008 -0500
+
+ fdt: refactor initrd related code
+
+ Created a new fdt_initrd() to deal with setting the initrd properties
+ in the device tree and fixing up the mem reserve. We can use this
+ both in the choosen node handling and lets us remove some duplicated
+ code when we fixup the initrd info in bootm on PPC.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3082d2348c8e13342f5fdd10e9b3f7408062dbf9
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:42 2008 -0500
+
+ fdt: refactor fdt resize code
+
+ Move the fdt resizing code out of ppc specific boot code and into
+ common fdt support code.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 396f635b8ff3ccbc38d75d5eda98444c6466810a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:41 2008 -0500
+
+ bootm: refactor image detection and os load steps
+
+ Created a bootm_start() that handles the parsing and detection of all
+ the images that will be used by the bootm command (OS, ramdisk, fdt).
+ As part of this we now tract all the relevant image offsets in the
+ bootm_headers_t struct. This will allow us to have all the needed
+ state for future sub-commands and lets us reduce a bit of arch
+ specific code on SPARC.
+
+ Created a bootm_load_os() that deals with decompression and loading
+ the OS image.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit e906cfae08e8cc2447f59b1bc4c22ab9c3c286d2
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:40 2008 -0500
+
+ bootm: move lmb into the bootm_headers_t structure
+
+ To allow for persistent state between future bootm subcommands we
+ need the lmb to exist in a global state.
+ Moving it into the bootm_headers_t allows us to do that.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 54f9c86691309b2f919f567f9255b8bcad2c7651
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:39 2008 -0500
+
+ bootm: Set working fdt address as part of the bootm flow
+
+ Set the fdt working address so "fdt FOO" commands can be used as part
+ of the bootm flow. Also set an the environment variable "fdtaddr"
+ with the value.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 06a09918f3903450313e2047a9cc258bf5872f46
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:38 2008 -0500
+
+ bootm: refactor fdt locating and relocation code
+
+ Move the code that handles finding a device tree blob and relocating
+ it (if needed) into common code so all arch's have access to it.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c4f9419c6b54958e0eddbcbc9e5a4a7b7ec99865
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:37 2008 -0500
+
+ bootm: refactor ramdisk locating code
+
+ Move determing if we have a ramdisk and where its located into the
+ common code. Keep track of the ramdisk start and end in the
+ bootm_headers_t image struct.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c160a9544743e80e8889edb2275538e7764ce334
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:36 2008 -0500
+
+ bootm: refactor entry point code
+
+ Move entry point code out of each arch and into common code.
+ Keep the entry point in the bootm_headers_t images struct.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 20220d22b9f41446288588cd2e457e0077a18bed
+Author: Randy Vinson <rvinson@mvista.com>
+Date: Wed Aug 13 11:44:57 2008 -0700
+
+ mpc7448hpc2: Fix PCI I/O space mapping.
+
+ PCI I/O space is currently mapped 1:1 at 0xFA000000. Linux requires
+ PCI I/O space to start at 0 on the PCI bus. This patch maps PCI I/O
+ space such that 0xFA000000 in the processor's address space maps to 0
+ on the PCI I/O bus.
+
+ Signed-off-by Randy Vinson <rvinson@mvista.com>
+ Acked-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit b4e07520bbb5467ad72eb92a5c9177d2797b9e30
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Wed Aug 13 18:10:26 2008 +0200
+
+ i.MX31: Specify maintainers for i.MX31-based boards
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 51e46e28fda4bbdf5149ac7f67d62fcc8df4da63
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Aug 26 15:01:28 2008 +0200
+
+ ADS5121: adjust image addresses in RAM and flash
+
+ Use the same mapping in flash as used by Linux
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 19f101412c16edee9fd55db4039e1d68a833b28b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Aug 26 13:14:34 2008 +0200
+
+ cmd_mem.c: Fix help message alignment
+
+ Bug was introced by "Big white-space cleanup" (53677ef1)
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 1a9eeb78b825bfade31d7606a2fe3b9eca9e35be
+Author: Andre Schwarz <andre.schwarz@matrix-vision.de>
+Date: Wed Aug 20 11:11:52 2008 +0200
+
+ change mvBL-M7 default env and move to vendor subdir
+
+ fix mvBL-M7 config and move to matrix_vision subdir
+
+ Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 002d27caf26e7eb913d474d3a91f67d56c8c31d5
+Author: Nick Spence <nick.spence@freescale.com>
+Date: Fri Aug 22 23:52:40 2008 -0700
+
+ MPC83XX: Add miscellaneous registers and #defines to support MPC83xx family devices
+
+ This patch adds elements to the 83xx sysconf structure and #define values that are used
+ by mpc83xx family devices.
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 447ad5768abda669ac0e7f46fcdb62fbe828d637
+Author: Ira W. Snyder <iws@ovro.caltech.edu>
+Date: Fri Aug 22 11:00:15 2008 -0700
+
+ MPC8349EMDS: Add PCI Agent (PCISLAVE) support
+
+ Add the ability for the MPC8349EMDS to run in PCI Agent mode, acting as a
+ PCI card rather than a host computer.
+
+ Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 4ff9aea9d6b5602683a920951ef896996438af62
+Author: Ira W. Snyder <iws@ovro.caltech.edu>
+Date: Fri Aug 22 11:00:14 2008 -0700
+
+ mpc83xx: add PCISLAVE support to 83XX_GENERIC_PCI setup code
+
+ This adds a helper function to unlock the PCI configuration bit, so that
+ any extra PCI setup (such as outbound windows, etc.) can be done after
+ using the 83XX_GENERIC_PCI code to set up the PCI bus.
+
+ Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 162338e1fcde231ca4d562e5ebd7859456731691
+Author: Ira W. Snyder <iws@ovro.caltech.edu>
+Date: Fri Aug 22 11:00:13 2008 -0700
+
+ MPC8349EMDS: use 83XX_GENERIC_PCI setup code
+
+ Change the MPC8349EMDS board to use the generic PCI initialization code
+ for the mpc83xx cpu.
+
+ Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit f4e55a4941e8ba46bc06020b2747928adf8fdee7
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Mon Aug 25 14:53:09 2008 -0500
+
+ fix out of tree building
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit a49d10cf027d059ee15c262010a05cdaec0961e1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Aug 25 23:45:41 2008 +0200
+
+ Minor coding style cleanup, updte CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 4d56e8dea670757c801a6a65531f02a8f981ce1f
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Aug 20 20:29:38 2008 +0200
+
+ RTC: Fix Makefile problem with COBJS-$(CONFIG_RTC_DS1307 || CONFIG_RTC_DS1338)
+
+ This "||" doesn't seem to work. Now using the idea suggest by Scott Wood
+ to combine both config options into one line. This even allows defining
+ both options and not generating the target object twice.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 079edb913dbae147b50a488cf02e03f473fc5f28
+Author: Jens Gehrlein <sew_s@tqs.de>
+Date: Fri Jul 4 16:50:05 2008 +0200
+
+ MX31: fix bit masks in function mx31_decode_pll()
+
+ Bits MPCTL[MFN] and MPCTL[MFD] were not fully covered.
+
+ Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
+
+commit e8f1207bbf2df6fb693ee1aa3329b2014c92e5e6
+Author: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
+Date: Mon Aug 25 11:11:34 2008 +0200
+
+ Correct ARM Versatile Timer Initialization
+
+ - According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271),
+ -- Timer Value Register @ TIMER Base + 4 is Read-only.
+ -- Prescale Value (Bits 3-2 of TIMER Control register)
+ can only be one of 00,01,10. 11 is undefined.
+ -- CFG_HZ for Versatile board is set to
+ #define CFG_HZ (1000000 / 256)
+ So Prescale bits is set to indicate
+ - 8 Stages of Prescale, Clock divided by 256
+ - The Timer Control Register has one Undefined/Shouldn't Use Bit
+ So we should do read/modify/write Operation
+
+ Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
+
+commit 535cfa4f3de86cf48d6c0af1daf33aebdca089f9
+Author: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
+Date: Mon Aug 25 11:30:29 2008 +0200
+
+ Add ARM AMBA PL031 RTC Support
+
+ Signed-off-by: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
+
+commit e39411674669cc880e1ec4a8ca4794fb15c33a45
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Tue Aug 19 16:21:03 2008 -0400
+
+ ARM DaVinci: Removed redundant NAND initialization code.
+
+ ARM DaVinci: Removed redundant NAND initialization code.
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit b3fb663b20d995ca41327db877ddb168279b3f62
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Tue Aug 19 16:21:00 2008 -0400
+
+ ARM DaVinci: Fix compilation error with new MTD code.
+
+ ARM DaVinci: Fix compilation error with new MTD code.
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit 109c30fb8edea1a15d37a6ce787cd5faf33d8e43
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Fri Aug 22 14:37:05 2008 -0400
+
+ Add note on dereferencing /aliases pointers
+
+ Replace the "must quote special characters" note with a hint on
+ how to dereference /aliases pointers by omitting the leading "/".
+ This feature was introduced by Kumar Gala as a libfdt enhancement
+ in commit ed035708235332c3c117ee3bb1a426063f03cfcb.
+
+ Example:
+
+ => fdt print /aliases
+ aliases {
+ ethernet0 = "/qe@e0100000/ucc@2000";
+ ethernet1 = "/qe@e0100000/ucc@3000";
+ serial0 = "/soc8360@e0000000/serial@4500";
+ serial1 = "/soc8360@e0000000/serial@4600";
+ pci0 = "/pci@e0008500";
+ };
+ => fdt print ethernet0
+ ucc@2000 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ cell-index = <0x1>;
+ reg = <0x2000 0x200>;
+ interrupts = <0x20>;
+ interrupt-parent = <0x2>;
+ local-mac-address = [00 00 00 00 00 00];
+ rx-clock-name = "none";
+ tx-clock-name = "clk9";
+ phy-handle = <0x3>;
+ phy-connection-type = "rgmii-id";
+ pio-handle = <0x4>;
+ };
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit feeca3f578b7f53c032ba203698751c982f8bf5a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Aug 14 08:28:19 2008 -0500
+
+ libfdt: Add support for using aliases in fdt_path_offset()
+
+ If the path doesn't start with '/' check to see if it matches some alias
+ under "/aliases" and substitute the matching alias value in the path
+ and retry the lookup.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+ Acked-by: David Gibson <david@gibson.dropbear.id.au>
+ Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 0219399a4e3a8edb428e1924e1a03d58cccf8d8e
+Author: David Gibson <david@gibson.dropbear.id.au>
+Date: Wed Aug 6 14:50:49 2008 +1000
+
+ libfdt: Implement fdt_get_property_namelen() and fdt_getprop_namelen()
+
+ As well as fdt_subnode_offset(), libfdt includes an
+ fdt_subnode_offset_namelen() function that takes the subnode name to
+ look up not as a NUL-terminated string, but as a string with an
+ explicit length. This can be useful when the caller has the name as
+ part of a longer string, such as a full path.
+
+ However, we don't have corresponding 'namelen' versions for
+ fdt_get_property() and fdt_getprop(). There are less obvious use
+ cases for these variants on property names, but there are
+ circumstances where they can be useful e.g. looking up property names
+ which need to be parsed from a longer string buffer such as user input
+ or a configuration file, or looking up an alias in a path with
+ IEEE1275 style aliases.
+
+ So, since it's very easy to implement such variants, this patch does
+ so. The original NUL-terminated variants are, of course, implemented
+ in terms of the namelen versions.
+
+ Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
+
+commit f171746f701ea58bf6a53e835b53d2aaebee0d81
+Author: David Gibson <david@gibson.dropbear.id.au>
+Date: Tue Jul 29 14:51:22 2008 +1000
+
+ libfdt: Forgot one function when cleaning the namespace
+
+ In commit b6d80a20fc293f3b995c3ce1a6744a5574192125, we renamed all
+ libfdt functions to be prefixed with fdt_ or _fdt_ to minimise the
+ chance of collisions with things from whatever package libfdt is
+ embedded in, pulled into the libfdt build via that environment's
+ libfdt_env.h.
+
+ Except... I missed one. This patch applies the same treatment to
+ _stringlist_contains(). While we're at it, also make it static since
+ it's only used in the same file.
+
+ Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
+
+commit 46390da15411351fc3b498bd8c1615f78fe80df0
+Author: Wolfram Sang <w.sang@pengutronix.de>
+Date: Wed Jul 9 11:22:44 2008 +0200
+
+ libfdt: Improve documentation in libfdt.h
+
+ Fix a few typos and mistakes.
+
+ Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
+ Acked-by: David Gibson <david@gibson.dropbear.id.au>
+
+commit fc7758ee4f5782878f2e96876b7bc56cfee0ac66
+Author: David Gibson <david@gibson.dropbear.id.au>
+Date: Wed Jul 9 14:10:24 2008 +1000
+
+ libfdt: Increase namespace-pollution paranoia
+
+ libfdt is supposed to easy to embed in projects all and sundry.
+ Often, it won't be practical to separate the embedded libfdt's
+ namespace from that of the surrounding project. Which means there can
+ be namespace conflicts between even libfdt's internal/static functions
+ and functions or macros coming from the surrounding project's headers
+ via libfdt_env.h.
+
+ This patch, therefore, renames a bunch of libfdt internal functions
+ and macros and makes a few other chances to reduce the chances of
+ namespace collisions with embedding projects. Specifically:
+ - Internal functions (even static ones) are now named _fdt_*()
+
+ - The type and (static) global for the error table in
+ fdt_strerror() gain an fdt_ prefix
+
+ - The unused macro PALIGN is removed
+
+ - The memeq and streq macros are removed and open-coded in the
+ users (they were only used once each)
+
+ - Other macros gain an FDT_ prefix
+
+ - To save some of the bulk from the previous change, an
+ FDT_TAGALIGN() macro is introduced, where FDT_TAGALIGN(x) ==
+ FDT_ALIGN(x, FDT_TAGSIZE)
+
+ Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
+
+commit c66830263af19831f2b7db307f79d1943febf7f9
+Author: David Gibson <david@gibson.dropbear.id.au>
+Date: Mon Jul 7 10:14:15 2008 +1000
+
+ dtc: Enable and fix -Wcast-qual warnings
+
+ Enabling -Wcast-qual warnings in dtc shows up a number of places where
+ we are incorrectly discarding a const qualification. There are also
+ some places where we are intentionally discarding the 'const', and we
+ need an ugly cast through uintptr_t to suppress the warning. However,
+ most of these are pretty well isolated with the *_w() functions. So
+ in the interests of maximum safety with const qualifications, this
+ patch enables the warnings and fixes the existing complaints.
+
+ Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
+ Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit ef4e8ce1beb5b93aedda5a4c1b90bfd989c6791e
+Author: David Gibson <david@gibson.dropbear.id.au>
+Date: Mon Jul 7 10:10:48 2008 +1000
+
+ dtc: Enable and fix -Wpointer-arith warnings
+
+ This patch turns on the -Wpointer-arith option in the dtc Makefile,
+ and fixes the resulting warnings due to using (void *) in pointer
+ arithmetic. While convenient, pointer arithmetic on void * is not
+ portable, so it's better that we avoid it, particularly in libfdt.
+
+ Also add necessary definition of uintptr_t needed by David Gibson's
+ changeset "dtc: Enable and fix -Wpointer-arith warnings" (the definition
+ comes from stdint.h, which u-boot doesn't have). -- gvb
+
+ Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 5d4b3d2b31e58fcb2d4bd10af762f5ff41b229fd
+Author: Tirumala R Marri <tmarri@amcc.com>
+Date: Thu Aug 21 21:54:53 2008 -0700
+
+ ppc4xx: AMCC PPC460GT/EX PCI-E de-emphasis adjustment fix
+
+ During recent PCI-E tests it has been found that current
+ driverl level and de-emphasis values are not set correctly.
+ After sweeping throgh all de-ephasis values, it was found that
+ 0x130 is a right value. Where 0x13 is driver level and 0 is
+ de-emphasis.
+
+ Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0bb86d823b6c150c7ee17de0cfca9ffccc16463b
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Wed Aug 20 20:46:56 2008 +0200
+
+ Make the YAFFS filesystem work
+
+ Recently the YAFFS filesystem support has been added to U-boot.
+ However, just enabling CONFIG_YAFFS2 is not enough to get it working.
+
+ ymount will generate an exception (when dereferencing mtd->readoob()), because
+ the genericDevice is a null pointer. Further, a lot of logging is produced
+ while using YAFFS fs, so logging should also be disabled.
+ Both issues are solved by this patch.
+
+ With this patch and CONFIG_YAFFS2 enabled, I get a readable filesystem
+ in U-boot, as well as in Linux.
+
+ Tested on a Atmel AT91SAM9261EK board.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Acked-by: William Juul <william.juul@tandberg.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit bfd7f38614e21f745b6d6845fcc616ebc5e4d36f
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Tue Aug 19 08:42:53 2008 +0900
+
+ Fix OneNAND read_oob/write_oob functions compatability
+
+ Also sync with kernel OneNAND codes
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 8d765456c1d33f2010d2717ee58de7647fdc6346
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Aug 18 17:11:20 2008 -0500
+
+ NAND: Remove delay from nand_boot_fsl_elbc.c.
+
+ It was for debugging purposes, and shouldn't have been left in.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit f556483734126793522fb7a8cf36af90da78f084
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 21 11:05:03 2008 +0200
+
+ ppc4xx: Cleanup of "ppc4xx: Optimize PLB4 Arbiter..." patch
+
+ This patch fixes some minor issues introduced with the patch:
+ ppc4xx: Optimize PLB4 Arbiter... from Prodyut Hazarika:
+
+ - Rework memory-queue and PLB arbiter optimization code, that the
+ local variable is not needed anymore. This removes one #ifdef.
+ - Use consistant spacing in ppc4xx.h header (XXX + 0x01 instead
+ of XXX+ 0x01). This was not introduced by Prodyut, just a
+ copy-paste problem.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 079589bcfb24ba11068460276a3cc9549ab5346f
+Author: Prodyut Hazarika <phazarika@amcc.com>
+Date: Wed Aug 20 09:38:51 2008 -0700
+
+ ppc4xx: Optimize PLB4 Arbiter and Memory Queue settings for PPC440SP/SPe,
+ PPC405EX and PPC460EX/GT/SX
+
+ - Read pipeline depth set to 4 for PPC440SP/SPE, PPC405EX, PPC460EX/GT/SX
+ processors
+ - Moved PLB4 Arbiter register definitions to ppc4xx.h since it is shared
+ across processors (405 and 440/460)
+ - Optimize Memory Queue settings for PPC440SP/SPE and PPC460EX/GT/SX
+ processors
+ - Add register bit definitions for Memory Queue Configuration registers
+
+ Signed-off-by: Prodyut Hazarika <phazarika@amcc.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ba37aa03287c5483c61c0a3e320c8888bee0143a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 19 15:41:18 2008 -0500
+
+ fdt: rework fdt_fixup_ethernet() to use env instead of bd_t
+
+ Move to using the environment variables 'ethaddr', 'eth1addr', etc..
+ instead of bd->bi_enetaddr, bi_enet1addr, etc.
+
+ This makes the code a bit more flexible to the number of ethernet
+ interfaces.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 4cacf7c64609839f809e2f9c45873f1d65861703
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 19 14:57:55 2008 +0200
+
+ hush: Fix printf debug macro in hush.c so that it usable in U-Boot
+
+ This patch changes the debug_printf() marco for U-Boot in hush.c and
+ moves the definition of DEBUG_SHELL to a place that is actually compiled
+ under U-Boot.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8f2b457ef26a44d9e5fd7d6b16c394e5c3a71ca2
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Aug 19 09:57:41 2008 +0200
+
+ cfi: rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER
+
+ Commit 00b1883a4cac59d97cd297b1a3a398db85982865
+ missed a few boards:
+ include/configs/M5253DEMO.h
+ include/configs/ml507.h
+ include/configs/redwood.h
+
+ This patch fixes this.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 0768b7a872964085eece8d5e9fec9175e9deb161
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Mon Aug 18 13:41:27 2008 +0200
+
+ Consolidate strmhz() implementation
+
+ ARM, i386, m68k and ppc all have identical implementations of strmhz().
+ Other architectures don't provide this function at all.
+
+ This patch moves strmhz() into lib_generic, reducing code duplication
+ and providing a more unified API across architectures.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit a928d0df211f1d829308d335d19be3ca42558dfc
+Author: Andre Schwarz <andre.schwarz@matrix-vision.de>
+Date: Mon Aug 18 12:02:51 2008 +0200
+
+ fix mvbc_p board build warnings
+
+ fix build warnings @ mvBC-P board by using correct types, i.e. change
+ out_be32 to out_be16 and out_8 accordingly.
+
+ Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+
+commit a958b663d27f616bd1dfb720d1b476d1ecaaa569
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Aug 16 18:54:27 2008 +0200
+
+ Makefile: fix posix support on find
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit bef92e215d945cc574399c1a1b00a3a76d35aa03
+Author: Axel Beierlein <belatronix@web.de>
+Date: Sat Aug 16 00:30:48 2008 +0200
+
+ Adding bootlimit/bootcount feature for MPC5XXX on TQM5200 Boards
+
+ Tested with TQM5200S on STK52XX.200 Board
+
+ Signed-off-by: Axel Beierlein <belatronix@web.de>
+
+commit 0800707b6d5041a840a65d556032c15c584b55f8
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Fri Aug 15 14:36:32 2008 -0500
+
+ mod_i2c_mem() bugfix
+
+ The last used chip, address, and address length were not being
+ stored for the imm and imn commands.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 4afbef967275b2f636abae86f91b81becee7ad03
+Author: Steven A. Falco <sfalco@harris.com>
+Date: Fri Aug 15 15:37:31 2008 -0400
+
+ Fix typo in spelling of ATAPI.
+
+ Correct a small spelling mistake.
+
+ Signed-off-by: Steven A. Falco <sfalco@harris.com>
+
+commit 36c2d3062ecc6ab85f8e237180eb134464c48418
+Author: Steven A. Falco <sfalco@harris.com>
+Date: Fri Aug 15 15:34:10 2008 -0400
+
+ Add a hook to allow board-specific PIO mode setting.
+
+ This patch adds a hook whereby a board-specific routine can be called to
+ configure hardware for a PIO mode. The prototype for the board-specific
+ routine is:
+
+ int inline ide_set_piomode(int pio_mode)
+
+ ide_set_piomode should be prepared to configure hardware for a pio_mode
+ between 0 and 6, inclusive. It should return 0 on success or 1 on failure.
+
+ Signed-off-by: Steven A. Falco <sfalco@harris.com>
+
+commit 9571b84cb1423876f1153081b9e6a51d90fbcdc4
+Author: Steven A. Falco <sfalco@harris.com>
+Date: Fri Aug 15 15:29:12 2008 -0400
+
+ Replace enums in ata.h with an include of libata.h
+
+ This patch removes some enums from ata.h and replaces them with an
+ include of libata.h. This way, we eliminate duplicated code, and
+ prevent errors whereby the different versions could be out of sync.
+
+ Signed-off-by: Steven A. Falco <sfalco@harris.com>
+
+commit 0de0afbca865ecf482b4d2b635236746def8518f
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Fri Aug 15 18:32:41 2008 +0200
+
+ coldfire: fix CFI drivers activation with new macro
+
+ rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 7dbc38ad915f4ae67f4cd1818b7ac8fed368aaa9
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:35 2008 -0500
+
+ fdt: fdt addr w/o any args reports back the current working address
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f953d99fd528a496b400a706b511eaf8e3ea66af
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:34 2008 -0500
+
+ fdt: added the ability to set initrd start/end via chosen command
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ffa4bafacaef67058463b3d7d0099ced57569dd2
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:33 2008 -0500
+
+ Add command to enable/disable interrupts
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9e8e63cce69556aef10b58bcbc56d324f570ec3a
+Author: Nick Spence <nick.spence@freescale.com>
+Date: Tue Aug 19 22:21:16 2008 -0700
+
+ CFI: Add CFI_CMDSET_INTEL_EXTENDED to fix flash_real_protect()
+
+ This patch fixes a missing vendor code in the flash_real_protect() function.
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4e00acded2e6a8d663e12690a0f0f08f5bec5a58
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Aug 19 16:53:39 2008 +0000
+
+ CFI: Fix AMD Legacy sector protect
+
+ New implement sector lock and unlock or softlock commands
+ do not exist in AMD legacy flash. Thus, causing issue
+ when erasing AMD legacy flash (such as lv040)
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 492671404140f09d5b21b3d2ce4e362c0692c069
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Wed Aug 20 09:40:16 2008 +0200
+
+ hammerhead/mimc200: Use CONFIG_FLASH_CFI_DRIVER
+
+ CFG_FLASH_CFI_DRIVER was recently renamed CONFIG_FLASH_CFI_DRIVER.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 33eac2b3d946fc998a09245dfe54d017079b9056
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Wed Aug 20 09:28:36 2008 +0200
+
+ hammerhead: Add missing printf parameter to CONFIG_AUTOBOOT_PROMPT
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 25da0b84195fdda89a943b2d25757db5afeef5b8
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Wed Aug 20 09:27:37 2008 +0200
+
+ favr-32-ezkit: Fix printf format warnings
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 462da25e89b0b58bf4c66346c1fcb3087c61b4b8
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Fri Aug 15 12:04:25 2008 +0200
+
+ MAINTAINERS: Sort avr32 section alphabetically
+
+ The rest of the MAINTAINERS file appears to be sorted
+ almost-alphabetically, but entries for the newly added AVR32 boards were
+ added somewhat randomly. This patch sorts the list alphabetically again.
+
+ Also update my e-mail address. The old one still works, but it may not
+ work forever.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 13b50fe3bc065c48911fa373231421280855a9d6
+Author: Mark Jackson <mpfj@mimc.co.uk>
+Date: Wed Jul 30 13:07:27 2008 +0100
+
+ avr32: Add MIMC200 board
+
+ The MIMC200 board is based on Atmel's NGW100 dev kit, but with an extra
+ 8MByte FLASH and 128KByte FRAM.
+
+ Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit db70b84329315c52f6ec77f5ae5ca1afe970a9bb
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date: Wed Jul 9 21:07:34 2008 +0900
+
+ rtl8169: add support for RTL8110SCL
+
+ This patch fixes a problem that RTL8110SCL started transfer
+ with an incorrect memory address.
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 943b825bf15e6a28ac8328e0f6489478bceef1ea
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jun 25 15:48:52 2008 -0500
+
+ Fix dm9000 receive status and len little endian issue
+
+ The received status and len was in little endian
+ format and caused the ethernet unable to proceed
+ further. Add __le16_to_cpu() in dm9000_rx_status_8/16/32bit().
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit fcd69a1a57fb2af4d26201422095a4be9f36963e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:32 2008 -0500
+
+ Clean up usage of icache_disable/dcache_disable
+
+ There is no point in disabling the icache on 7xx/74xx/86xx parts and not
+ also flushing the icache. All callers of invalidate_l1_instruction_cache()
+ call icache_disable() right after. Make it so icache_disable() calls
+ invalidate_l1_instruction_cache() for us.
+
+ Also, dcache_disable() already calls dcache_flush() so there is no point
+ in the explicit calls of dcache_flush().
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a15b07104ca7bbb7093c9009c9ae1b58b4202d13
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Aug 15 08:24:31 2008 -0500
+
+ Update linux bootm to support ePAPR client interface
+
+ The ePAPR spec has some subtle differences from the current device
+ tree based boot interface to the powerpc linux kernel. The powerpc
+ linux kernel currently ignores the differences that ePAPR specifies.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit b734e5556a239b3be5f9693b2f4b4b739683ec16
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Aug 18 23:50:20 2008 +0200
+
+ Minor code cleanup: keep lists sorted.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d0039d4ed275e6ca09fb417895024ad02be118c4
+Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+Date: Wed Jul 23 19:10:14 2008 +0200
+
+ Add support for ADT7460 I2C monitor chip
+
+ Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
+
+commit eb59ea45ab77c14b090ea857d9ea9f902f40db0b
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon Jul 14 19:45:45 2008 +0200
+
+ video: Clean drivers/video/Makefile
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 871c18dd301752270e1f74328c846c3104be1e2e
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon Jul 14 19:45:37 2008 +0200
+
+ rtc: Clean drivers/rtc/Makefile
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit a4a549b4b53adf40a0d3882cc30ac812a8f847c5
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon Jul 14 19:45:35 2008 +0200
+
+ i2c: Clean drivers/i2c/ Makefile
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 0a823aa2a8a8c0685e73900f387d602d7edafc0e
+Author: Harald Welte <laforge@openmoko.org>
+Date: Wed Jul 9 22:30:30 2008 +0800
+
+ Add 'license' command to U-Boot command line
+
+ The 'license' command includes the U-Boot license (GPLv2) into the
+ actual bootloader binary. The license text can be shown interactively
+ at the U-Boot commandline.
+
+ For products where the commandline can actually be accessed by the
+ end user, this helps to prevent inadvertent GPL violations, since the
+ GPLv2 license text can no longer be 'forgotten' to be included into
+ the product.
+
+ The 'license' command can be enabled by CONFIG_CMD_LICENSE.
+
+ Signed-off-by: Harald Welte <laforge@openmoko.org>
+
+commit fe2ce5500ebf43d79d227190bd2370232d5b113d
+Author: Harald Welte <laforge@gnumonks.org>
+Date: Sun Jul 6 15:56:38 2008 +0800
+
+ add 'unzip' command to u-boot commandline
+
+ [PATCH] add new 'unzip' command to u-boot commandline
+
+ common/cmd_mem.c: new command "unzip srcaddr dstaddr [dstsize]" to unzip from
+ memory to memory, and option CONFIG_CMD_UNZIP to enable it
+
+ Signed-off-by: Werner Almesberger <werner@openmoko.org>
+ Signed-off-by: Harald Welte <laforge@openmoko.org>
+
+commit 07efc9e321619c3dec213310c32e011aa6f02783
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 6 19:37:17 2008 -0500
+
+ Change CFG_ENV_SIZE to CFG_ENV_SECT_SIZE for SPI sector erase
+
+ The CFG_ENV_SIZE is not suitable used for SPI flash erase
+ sector size if CFG_ENV_SIZE is less than CFG_ENV_SECT_SIZE.
+ Add condition check if CFG_ENV_SIZE is larger than
+ CFG_ENV_SECT_SIZE, calculate the right number of sectors for
+ erasing.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 4cb4e654cafabaa1ac180d37b00c8f6095dae9c9
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Mon Aug 11 15:54:25 2008 +0000
+
+ ColdFire: Multiple fixes for M5282EVB
+
+ Incorrect CFG_HZ value, change 1000000 to 1000.
+ Rename #waring to #warning. RAMBAR1 uses twice
+ in start.S, rename the later to FLASHBAR. Insert
+ nop for DRAM setup. And, env_offset in linker file.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 10db3a17a278dd3a27668b31cb32cdd1476e9513
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Mon Aug 11 15:26:43 2008 +0000
+
+ ColdFire: Move m5282evb from board to board/freescale
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 56df091d391f74bbf2dc2f7931f9f3c8f23529e4
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Mon Aug 11 15:25:07 2008 +0000
+
+ ColdFire: Move m5272c3 from board to board/freescale
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 659e9bad629a480f606b286d5703aef7159edf98
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Mon Aug 11 15:23:16 2008 +0000
+
+ ColdFire: Move m5271evb from board to board/freescale
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 05316f8ece8206339a208ec052f039cd0f7ca922
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Mon Aug 11 13:41:49 2008 +0000
+
+ ColdFire: Add M54451EVB platform support for MCF5445x
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 922cd7515597e9a2c07d68e2a6240b0b7b0f0136
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 6 19:14:08 2008 -0500
+
+ ColdFire: Add Serial Flash support for M54455EVB
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 9f751551456828b2d0ff417f10959fb0c7110bd0
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jul 23 20:38:53 2008 -0500
+
+ ColdFire: Implement SBF feature for M5445EVB
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit a7323bba229203aae2604afde131ab47bad4eadc
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jul 23 17:53:36 2008 -0500
+
+ ColdFire: Add SSPI feature for MCF5445x
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit b2d022d1ac3f59bffa9cec249341e77aea168abc
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jul 23 17:37:10 2008 -0500
+
+ ColdFire: Use CFI Flash driver for M54455EVB
+
+ Remove non-common flash driver in
+ board/freescale/m54455evb/flash.c. The non-cfi flash will
+ use CONFIG_FLASH_CFI_LEGACY to configure the flash
+ attribute.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 6d33c6acfa35b1144d46ffbff7e29ee7969290d0
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jul 23 17:11:47 2008 -0500
+
+ ColdFire: Add M5253DEMO platform support for MCF5253
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 80ba61fd82569af40e04d4a089257b81881884f2
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 6 14:17:09 2008 -0500
+
+ ColdFire: Raise M5253EVBE uart baudrate to 115200 bps
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit d361307e73ce1f6fc68760123f37d4876f851f3e
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 6 14:11:36 2008 -0500
+
+ ColdFire: Fix M5253EVB dram bring up issue
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 4b0708093e15b412296328bf81325cf9b69fe512
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Aug 14 14:41:06 2008 +0200
+
+ Coding Style cleanup, update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
commit 68cf19aae48f2969ec70669604d0d776f02c8bc4
Author: Scott Wood <scottwood@freescale.com>
Date: Wed Aug 13 18:24:05 2008 -0500
Signed-off-by: Steven A. Falco <sfalco@harris.com>
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 0eb5717a85b6cba3f67c11fa89bdde38dcd081b5
+Author: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
+Date: Wed Aug 6 14:42:13 2008 +0200
+
+ avr32: add support for EarthLCD Favr-32 board
+
+ This patch adds support for the Favr-32 board made by EarthLCD.
+
+ This kit, which is also called ezLCD-101 when running with EarthLCD firmware,
+ has a 10.4" touch screen LCD panel, 16 MB 32-bit SDRAM, 8 MB parallel flash,
+ Ethernet, audio out, USB device, SD-card slot, USART and various other
+ connectors for cennecting stuff to SPI, I2C, GPIO, etc.
+
+ Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit bc9019e19758a19a388fb20ef18dc771cd39fdda
+Author: Rafael Campos <rafael.campos@hanscan.com>
+Date: Thu Jul 31 10:22:20 2008 +0200
+
+ cfi-flash: Added support to flash_real_protect for Atmel flash devices
+
+ Some of the flash memories produced by ATMEL start in read-only mode.
+ We need to unprotect it. This patch allows the AT49BV6416 to work with
+ cfi_flash memories. Tested in the at91rm9200ek board.
+
+ Signed-off-by: Rafael Campos Las Heras <rafael.campos@hanscan.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7949839e5836bf8b1074bb6142c46d30ac3aa350
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Tue Aug 5 15:36:39 2008 +0200
+
+ cfi-flash: Add definition for the AM29LV800BB AMD NOR-flash
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit 1318673045fe188c6e24c582b1e6efc00ae1c62c
Author: Stefan Roese <sr@denx.de>
Date: Wed Aug 6 14:06:03 2008 +0200
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 5c374c9ee16fee2bf68533cc4010b3c0df21f783
+Author: Julien May <mailinglist@miromico.ch>
+Date: Mon Jun 23 13:57:52 2008 +0200
+
+ Add support for the hammerhead (AVR32) board
+
+ The Hammerhead platform is built around a AVR32 32-bit microcontroller
+ from Atmel. It offers versatile peripherals, such as ethernet, usb
+ device, usb host etc.
+
+ The board also incooperates a power supply and is a Power over Ethernet
+ (PoE) Powered Device (PD).
+
+ Additonally, a Cyclone III FPGA from Altera is integrated on the board.
+ The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
+ DDR2 SDRAM interfaces, which will cover even the most exceptional need
+ of memory bandwidth. Together with the onboard video decoder the board
+ is ready for video processing.
+
+ For more information see: http:///www.miromico.com/hammerhead
+
+ Signed-off-by: Julien May <mailinglist@miromico.ch>
+ [haavard.skinnemoen@atmel.com: various small fixes and adaptions]
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
commit 09d318a8bb1444ec92e31cafcdba877eb9409e58
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Tue Jul 29 12:23:49 2008 -0500
Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+commit c8c845cfdc6d0217135c1d5927eebd2b133a3314
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Sat Jul 5 00:08:48 2008 -0700
+
+ Moved initialization of AVR32 Ethernet controllers to board_eth_init()
+
+ Renamed initialization functions for atngw100 and atstk1000.
+ Removed initializations for these boards from net/eth.c
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
commit a229d291f33308ab7761d39f25fa1a53c0fc00a2
Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Date: Wed Jul 23 10:55:46 2008 +0200
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 021f6df6e96af5b387810cf96d24848da1faa55c
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Jul 10 17:20:51 2008 +0400
+
+ 83xx: mpc8315erdb: fix silly thinko in fdt_tsec1_fixup
+
+ The thinko was quite silly indeed, I messed with !ptr. Normally this
+ would trigger some fault, but in U-Boot NULL pointer is equal to phys
+ 0, so the code was working still, just didn't actually test mpc8315erdb
+ environment variable value. Heh.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 25f5f0d49a3ae89bf4396f2557ce98debfef21da
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Tue Jul 8 21:00:04 2008 +0400
+
+ 83xx: mpc8315erdb: add support for switching between ULPI/UTMI USB PHYs
+
+ Freescale ships MPC8315E-RDB boards either with TSEC1 and USB UTMI
+ support, or without TSEC1 but with USB ULPI PHY support in addition.
+ With this patch user can specify desired USB PHY.
+
+ Also, it seems that we can't distinguish the two boards in software, so
+ user have to set `mpc8315erdb' environment variable to either 'tsec1'
+ (TSEC1 enabled) or `ulpi' (board with ULPI PHY, TSEC1 disabled), so that
+ Linux will not probe for TSEC1.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 015b27b9e165fcf220e42f2c4afbaeaa2758fcf6
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Tue Jul 8 20:59:43 2008 +0400
+
+ fdt_support: fdt_fixup_dr_usb: add support for phy_type fixups
+
+ Currently U-Boot can only fixup the usb dr_mode, but some boards (namely
+ MPC8315E-RDB) can use two PHY types: ULPI (stand-alone OTG port) or UTMI
+ (connected to the four-ports hub, usb host only).
+
+ This patch implements support for passing Dual-Role USB controller's
+ device tree property phy_type through the usb_phy_type environment
+ variable.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
commit 699f05125509249072a0b865c8d35520d97cd501
Author: Wolfgang Denk <wd@denx.de>
Date: Tue Jul 15 22:22:44 2008 +0200
projects / karo-tx-uboot.git / blobdiff