#
-# (C) Copyright 2000 - 2009
+# (C) Copyright 2000 - 2011
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
system clock. On most PQ3 devices this is 8, on newer QorIQ
devices it can be 16 or 32. The ratio varies from SoC to Soc.
+ CONFIG_SYS_FSL_PCIE_COMPAT
+
+ Defines the string to utilize when trying to match PCIe device
+ tree nodes for the given platform.
+
- Intel Monahans options:
CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.
+ CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
+
+ This setting is mandatory for all boards that have only one
+ machine type and must be used to specify the machine type
+ number as it appears in the ARM machine registry
+ (see http://www.arm.linux.org.uk/developer/machines/).
+ Only boards that have multiple machine types supported
+ in a single configuration file and the machine type is
+ runtime discoverable, do not have to use this setting.
+
- vxWorks boot parameters:
bootvx constructs a valid bootline using the following
Note: If a "bootargs" environment is defined, it will overwride
the defaults discussed just above.
+- Cache Configuration:
+ CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
+ CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
+ CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
+
+- Cache Configuration for ARM:
+ CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
+ controller
+ CONFIG_SYS_PL310_BASE - Physical base address of PL310
+ controller register space
+
- Serial Ports:
CONFIG_PL010_SERIAL
(requires CONFIG_CMD_MEMORY)
CONFIG_CMD_SOURCE "source" command Support
CONFIG_CMD_SPI * SPI serial bus support
+ CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
CONFIG_CMD_USB * USB support
- CONFIG_CMD_VFD * VFD support (TRAB)
CONFIG_CMD_CDP * Cisco Discover Protocol support
CONFIG_CMD_FSL * Microblaze FSL support
- Watchdog:
CONFIG_WATCHDOG
If this variable is defined, it enables watchdog
- support. There must be support in the platform specific
- code for a watchdog. For the 8xx and 8260 CPUs, the
- SIU Watchdog feature is enabled in the SYPCR
- register.
+ support for the SoC. There must be support in the SoC
+ specific code for a watchdog. For the 8xx and 8260
+ CPUs, the SIU Watchdog feature is enabled in the SYPCR
+ register. When supported for a specific SoC is
+ available, then no further board specific code should
+ be needed to use it.
+
+ CONFIG_HW_WATCHDOG
+ When using a watchdog circuitry external to the used
+ SoC, then define this variable and provide board
+ specific code for the "hw_watchdog_reset" function.
- U-Boot Version:
CONFIG_VERSION_VARIABLE
enabled with CONFIG_CMD_MMC. The MMC driver also works with
the FAT fs. This is enabled with CONFIG_CMD_FAT.
+ CONFIG_SH_MMCIF
+ Support for Renesas on-chip MMCIF controller
+
+ CONFIG_SH_MMCIF_ADDR
+ Define the base address of MMCIF registers
+
+ CONFIG_SH_MMCIF_CLK
+ Define the clock frequency for MMCIF
+
- Journaling Flash filesystem support:
CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
CONFIG_JFFS2_NAND_DEV
driver in use must provide a function: mcast() to join/leave a
multicast group.
- CONFIG_BOOTP_RANDOM_DELAY
- BOOTP Recovery Mode:
CONFIG_BOOTP_RANDOM_DELAY
Modem Support:
--------------
-[so far only for SMDK2400 and TRAB boards]
+[so far only for SMDK2400 boards]
- Modem support enable:
CONFIG_MODEM_SUPPORT
- CONFIG_SYS_SRIOn_MEM_SIZE:
Size of SRIO port 'n' memory region
+- CONFIG_SYS_NDFC_16
+ Defined to tell the NDFC that the NAND chip is using a
+ 16 bit bus.
+
+- CONFIG_SYS_NDFC_EBC0_CFG
+ Sets the EBC0_CFG register for the NDFC. If not defined
+ a default value will be used.
+
- CONFIG_SPD_EEPROM
Get DDR timing information from an I2C EEPROM. Common
with pluggable memory modules such as SODIMMs
one, specify here. Note that the value must resolve
to something your driver can deal with.
+- CONFIG_SYS_DDR_RAW_TIMING
+ Get DDR timing information from other than SPD. Common with
+ soldered DDR chips onboard without SPD. DDR raw timing
+ parameters are extracted from datasheet and hard-coded into
+ header files or board specific files.
+
- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
This can be used to load and uncompress arbitrary
data.
+ fdt_high - if set this restricts the maximum address that the
+ flattened device tree will be copied into upon boot.
+ If this is set to the special value 0xFFFFFFFF then
+ the fdt will not be copied at all on boot. For this
+ to work it must reside in writable memory, have
+ sufficient padding on the end of it for u-boot to
+ add the information it needs into it, and the memory
+ must be accessible by the kernel.
+
i2cfast - (PPC405GP|PPC405EP only)
if set to 'y' configures Linux I2C driver for fast
mode (400kHZ). This environment variable is used in
projects / karo-tx-uboot.git / blobdiff