Merge branches 'fixes', 'mcpm', 'misc' and 'mmci' into for-next

[karo-tx-linux.git] / arch / arm / boot / compressed / head.S

diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index fe4d9c3ad761c8dfaadce6e214d709417947f396..75189f13cf54c63d0db56b98ad2c41834a30893e 100644 (file)
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -11,6 +11,7 @@
 #include <linux/linkage.h>
 #include <asm/assembler.h>
 
+       .arch   armv7-a
 /*
  * Debugging stuff
  *
@@ -141,7 +142,6 @@ start:
                mov     r7, r1                  @ save architecture ID
                mov     r8, r2                  @ save atags pointer
 
-#ifndef __ARM_ARCH_2__
                /*
                 * Booting from Angel - need to enter SVC mode and disable
                 * FIQs/IRQs (numeric definitions from angel arm.h source).
@@ -157,10 +157,6 @@ not_angel:
                safe_svcmode_maskall r0
                msr     spsr_cxsf, r9           @ Save the CPU boot mode in
                                                @ SPSR
-#else
-               teqp    pc, #0x0c000003         @ turn off interrupts
-#endif
-
                /*
                 * Note that some cache flushing and other stuff may
                 * be needed here - is there an Angel SWI call for this?
@@ -182,7 +178,19 @@ not_angel:
                ldr     r4, =zreladdr
 #endif
 
-               bl      cache_on
+               /*
+                * Set up a page table only if it won't overwrite ourself.
+                * That means r4 < pc && r4 - 16k page directory > &_end.
+                * Given that r4 > &_end is most unfrequent, we add a rough
+                * additional 1MB of room for a possible appended DTB.
+                */
+               mov     r0, pc
+               cmp     r0, r4
+               ldrcc   r0, LC0+32
+               addcc   r0, r0, pc
+               cmpcc   r4, r0
+               orrcc   r4, r4, #1              @ remember we skipped cache_on
+               blcs    cache_on
 
 restart:       adr     r0, LC0
                ldmia   r0, {r1, r2, r3, r6, r10, r11, r12}
@@ -228,7 +236,7 @@ restart:    adr     r0, LC0
  *   r0  = delta
  *   r2  = BSS start
  *   r3  = BSS end
- *   r4  = final kernel address
+ *   r4  = final kernel address (possibly with LSB set)
  *   r5  = appended dtb size (still unknown)
  *   r6  = _edata
  *   r7  = architecture ID
@@ -276,6 +284,7 @@ restart:    adr     r0, LC0
                 */
                cmp     r0, #1
                sub     r0, r4, #TEXT_OFFSET
+               bic     r0, r0, #1
                add     r0, r0, #0x100
                mov     r1, r6
                sub     r2, sp, r6
@@ -322,12 +331,13 @@ dtb_check_done:
 
 /*
  * Check to see if we will overwrite ourselves.
- *   r4  = final kernel address
+ *   r4  = final kernel address (possibly with LSB set)
  *   r9  = size of decompressed image
  *   r10 = end of this image, including  bss/stack/malloc space if non XIP
  * We basically want:
  *   r4 - 16k page directory >= r10 -> OK
  *   r4 + image length <= address of wont_overwrite -> OK
+ * Note: the possible LSB in r4 is harmless here.
  */
                add     r10, r10, #16384
                cmp     r4, r10
@@ -389,7 +399,8 @@ dtb_check_done:
                add     sp, sp, r6
 #endif
 
-               bl      cache_clean_flush
+               tst     r4, #1
+               bleq    cache_clean_flush
 
                adr     r0, BSYM(restart)
                add     r0, r0, r6
@@ -401,7 +412,7 @@ wont_overwrite:
  *   r0  = delta
  *   r2  = BSS start
  *   r3  = BSS end
- *   r4  = kernel execution address
+ *   r4  = kernel execution address (possibly with LSB set)
  *   r5  = appended dtb size (0 if not present)
  *   r7  = architecture ID
  *   r8  = atags pointer
@@ -464,6 +475,15 @@ not_relocated:     mov     r0, #0
                cmp     r2, r3
                blo     1b
 
+               /*
+                * Did we skip the cache setup earlier?
+                * That is indicated by the LSB in r4.
+                * Do it now if so.
+                */
+               tst     r4, #1
+               bic     r4, r4, #1
+               blne    cache_on
+
 /*
  * The C runtime environment should now be setup sufficiently.
  * Set up some pointers, and start decompressing.
@@ -512,6 +532,7 @@ LC0:                .word   LC0                     @ r1
                .word   _got_start              @ r11
                .word   _got_end                @ ip
                .word   .L_user_stack_end       @ sp
+               .word   _end - restart + 16384 + 1024*1024
                .size   LC0, . - LC0
 
 #ifdef CONFIG_ARCH_RPC
@@ -805,8 +826,8 @@ call_cache_fn:      adr     r12, proc_types
                .align  2
                .type   proc_types,#object
 proc_types:
-               .word   0x00000000              @ old ARM ID
-               .word   0x0000f000
+               .word   0x41000000              @ old ARM ID
+               .word   0xff00f000
                mov     pc, lr
  THUMB(                nop                             )
                mov     pc, lr