ARM: mxs: move display timing configurations into device tree

[karo-tx-linux.git] / arch / arm / boot / dts / imx28-m28evk.dts

diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index 3d2e1a49133580b1dab136d38f361cb999158d5d..5f0ba99aa809d4c8309c80520bd7aa2be67e164e 100644 (file)
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -119,7 +119,32 @@
                                pinctrl-names = "default";
                                pinctrl-0 = <&lcdif_24bit_pins_a
                                             &lcdif_pins_m28>;
+                               display = <&display>;
                                status = "okay";
+
+                               display: display {
+                                       bits-per-pixel = <16>;
+                                       bus-width = <18>;
+
+                                       display-timings {
+                                               native-mode = <&timing0>;
+                                               timing0: timing0 {
+                                                       clock-frequency = <33260000>;
+                                                       hactive = <800>;
+                                                       vactive = <480>;
+                                                       hback-porch = <0>;
+                                                       hfront-porch = <256>;
+                                                       vback-porch = <0>;
+                                                       vfront-porch = <45>;
+                                                       hsync-len = <1>;
+                                                       vsync-len = <1>;
+                                                       hsync-active = <0>;
+                                                       vsync-active = <0>;
+                                                       de-active = <1>;
+                                                       pixelclk-active = <1>;
+                                               };
+                                       };
+                               };
                        };
 
                        can0: can@80032000 {