ARM: tegra: add USB DT entries for Tegra30

[karo-tx-linux.git] / arch / arm / boot / dts / tegra30.dtsi

diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index d81c52e5b3587445acc38d1a2efb23ef06247ef5..0022c127e1d956c42badc2970887fca3b9d7511b 100644 (file)
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -631,6 +631,92 @@
                status = "disabled";
        };
 
+       usb@7d000000 {
+               compatible = "nvidia,tegra30-ehci", "usb-ehci";
+               reg = <0x7d000000 0x4000>;
+               interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+               phy_type = "utmi";
+               clocks = <&tegra_car TEGRA30_CLK_USBD>;
+               nvidia,needs-double-reset;
+               nvidia,phy = <&phy1>;
+               status = "disabled";
+       };
+
+       phy1: usb-phy@7d000000 {
+               compatible = "nvidia,tegra30-usb-phy";
+               reg = <0x7d000000 0x4000 0x7d000000 0x4000>;
+               phy_type = "utmi";
+               clocks = <&tegra_car TEGRA30_CLK_USBD>,
+                        <&tegra_car TEGRA30_CLK_PLL_U>,
+                        <&tegra_car TEGRA30_CLK_USBD>;
+               clock-names = "reg", "pll_u", "utmi-pads";
+               nvidia,hssync-start-delay = <9>;
+               nvidia,idle-wait-delay = <17>;
+               nvidia,elastic-limit = <16>;
+               nvidia,term-range-adj = <6>;
+               nvidia,xcvr-setup = <51>;
+               nvidia.xcvr-setup-use-fuses;
+               nvidia,xcvr-lsfslew = <1>;
+               nvidia,xcvr-lsrslew = <1>;
+               nvidia,xcvr-hsslew = <32>;
+               nvidia,hssquelch-level = <2>;
+               nvidia,hsdiscon-level = <5>;
+               status = "disabled";
+       };
+
+       usb@7d004000 {
+               compatible = "nvidia,tegra30-ehci", "usb-ehci";
+               reg = <0x7d004000 0x4000>;
+               interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+               phy_type = "ulpi";
+               clocks = <&tegra_car TEGRA30_CLK_USB2>;
+               nvidia,phy = <&phy2>;
+               status = "disabled";
+       };
+
+       phy2: usb-phy@7d004000 {
+               compatible = "nvidia,tegra30-usb-phy";
+               reg = <0x7d004000 0x4000>;
+               phy_type = "ulpi";
+               clocks = <&tegra_car TEGRA30_CLK_USB2>,
+                        <&tegra_car TEGRA30_CLK_PLL_U>,
+                        <&tegra_car TEGRA30_CLK_CDEV2>;
+               clock-names = "reg", "pll_u", "ulpi-link";
+               status = "disabled";
+       };
+
+       usb@7d008000 {
+               compatible = "nvidia,tegra30-ehci", "usb-ehci";
+               reg = <0x7d008000 0x4000>;
+               interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+               phy_type = "utmi";
+               clocks = <&tegra_car TEGRA30_CLK_USB3>;
+               nvidia,phy = <&phy3>;
+               status = "disabled";
+       };
+
+       phy3: usb-phy@7d008000 {
+               compatible = "nvidia,tegra30-usb-phy";
+               reg = <0x7d008000 0x4000 0x7d000000 0x4000>;
+               phy_type = "utmi";
+               clocks = <&tegra_car TEGRA30_CLK_USB3>,
+                        <&tegra_car TEGRA30_CLK_PLL_U>,
+                        <&tegra_car TEGRA30_CLK_USBD>;
+               clock-names = "reg", "pll_u", "utmi-pads";
+               nvidia,hssync-start-delay = <0>;
+               nvidia,idle-wait-delay = <17>;
+               nvidia,elastic-limit = <16>;
+               nvidia,term-range-adj = <6>;
+               nvidia,xcvr-setup = <51>;
+               nvidia.xcvr-setup-use-fuses;
+               nvidia,xcvr-lsfslew = <2>;
+               nvidia,xcvr-lsrslew = <2>;
+               nvidia,xcvr-hsslew = <32>;
+               nvidia,hssquelch-level = <2>;
+               nvidia,hsdiscon-level = <5>;
+               status = "disabled";
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;