Merge branch 'master' of git://git.denx.de/u-boot-arm

[karo-tx-uboot.git] / arch / arm / cpu / arm926ejs / at91 / reset.c

diff --git a/arch/arm/cpu/arm926ejs/at91/reset.c b/arch/arm/cpu/arm926ejs/at91/reset.c
index 1b67e77887f762f4ebda6c3394824a67866e0b6b..e67f47bd041a58cd5b6e533f486d67de014ce7b6 100644 (file)
--- a/arch/arm/cpu/arm926ejs/at91/reset.c
+++ b/arch/arm/cpu/arm926ejs/at91/reset.c
@@ -1,44 +1,29 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Stelian Pop <stelian@popies.net>
  * Lead Tech Design <www.leadtechdesign.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_rstc.h>
-#include <asm/arch/io.h>
 
-/*
- * Reset the cpu by setting up the watchdog timer and let him time out.
- */
+/* Reset the cpu by telling the reset controller to do so */
 void reset_cpu(ulong ignored)
 {
-       at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE;
-
-       /* this is the way Linux does it */
-
-       writel(AT91_RSTC_KEY | AT91_RSTC_CR_PROCRST | AT91_RSTC_CR_PERRST,
-               &rstc->cr);
+       at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC;
 
-       while (1);
-       /* Never reached */
+       writel(AT91_RSTC_KEY
+               | AT91_RSTC_CR_PROCRST  /* Processor Reset */
+               | AT91_RSTC_CR_PERRST   /* Peripheral Reset */
+#ifdef CONFIG_AT91RESET_EXTRST
+               | AT91_RSTC_CR_EXTRST   /* External Reset (assert nRST pin) */
+#endif
+               , &rstc->cr);
+       /* never reached */
+       while (1)
+               ;
 }