crypto/fsl - Add progressive hashing support using hardware acceleration.

[karo-tx-uboot.git] / arch / arm / cpu / arm926ejs / pantheon / timer.c

diff --git a/arch/arm/cpu/arm926ejs/pantheon/timer.c b/arch/arm/cpu/arm926ejs/pantheon/timer.c
index c71162a8be697abedf379296de0f7ed0bd456edf..6382d3b0cfbe131e8d8913af092a24bd243963da 100644 (file)
--- a/arch/arm/cpu/arm926ejs/pantheon/timer.c
+++ b/arch/arm/cpu/arm926ejs/pantheon/timer.c
@@ -3,26 +3,11 @@
  * Marvell Semiconductor <www.marvell.com>
  * Written-by: Lei Wen <leiwen@marvell.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/pantheon.h>
 
 /*
@@ -59,7 +44,7 @@ struct panthtmr_registers {
 #define        COUNT_RD_REQ            0x1
 
 DECLARE_GLOBAL_DATA_PTR;
-/* Using gd->tbu from timestamp and gd->tbl for lastdec */
+/* Using gd->arch.tbu from timestamp and gd->arch.tbl for lastdec */
 
 /*
  * For preventing risk of instability in reading counter value,
@@ -89,16 +74,16 @@ ulong get_timer_masked(void)
 {
        ulong now = read_timer();
 
-       if (now >= gd->tbl) {
+       if (now >= gd->arch.tbl) {
                /* normal mode */
-               gd->tbu += now - gd->tbl;
+               gd->arch.tbu += now - gd->arch.tbl;
        } else {
                /* we have an overflow ... */
-               gd->tbu += now + TIMER_LOAD_VAL - gd->tbl;
+               gd->arch.tbu += now + TIMER_LOAD_VAL - gd->arch.tbl;
        }
-       gd->tbl = now;
+       gd->arch.tbl = now;
 
-       return gd->tbu;
+       return gd->arch.tbu;
 }
 
 ulong get_timer(ulong base)
@@ -143,9 +128,9 @@ int timer_init(void)
 
        /* Enable timer 0 */
        writel(0x1, &panthtimers->cer);
-       /* init the gd->tbu and gd->tbl value */
-       gd->tbl = read_timer();
-       gd->tbu = 0;
+       /* init the gd->arch.tbu and gd->arch.tbl value */
+       gd->arch.tbl = read_timer();
+       gd->arch.tbu = 0;
 
        return 0;
 }
@@ -196,3 +181,21 @@ void reset_cpu (unsigned long ignored)
        /*enable functional WDT clock */
        writel(APBC_APBCLK | APBC_FNCLK, &mpmu->wdtpcr);
 }
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+       return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk (void)
+{
+       return (ulong)CONFIG_SYS_HZ;
+}