u32 get_device_type(void)
{
int mode;
- mode = readl(&cstat->statusreg) & (DEVICE_MASK);
+ mode = readl(&cstat->statusreg) & DEVICE_MASK;
return mode >>= 8;
}
u32 get_sysboot_value(void)
{
int mode;
- mode = readl(&cstat->statusreg) & (SYSBOOT_MASK);
+ mode = readl(&cstat->statusreg) & SYSBOOT_MASK;
return mode;
}
#ifdef CONFIG_DISPLAY_CPUINFO
+#define SYSBOOT_FREQ_SHIFT 22
+#define SYSBOOT_FREQ_MASK (3 << SYSBOOT_FREQ_SHIFT)
+
+static unsigned long bootfreqs[] = {
+ 19200000,
+ 24000000,
+ 25000000,
+ 26000000,
+};
+
+static u32 get_sysboot_freq(void)
+{
+ int mode;
+ mode = readl(&cstat->statusreg) & SYSBOOT_FREQ_MASK;
+ return bootfreqs[mode >> SYSBOOT_FREQ_SHIFT];
+}
+
/**
* Print CPU information
*/
int print_cpuinfo(void)
{
char *cpu_s, *sec_s;
- int arm_freq, ddr_freq;
+ unsigned long clk;
+ const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
switch (get_cpu_type()) {
- case AM335X:
+ case AM335X_ID:
cpu_s = "AM335X";
break;
default:
cpu_s = "Unknown cpu type";
- break;
}
switch (get_device_type()) {
sec_s = "?";
}
- printf("AM%s-%s rev %d\n",
+ printf("%s-%s rev %d\n",
cpu_s, sec_s, get_cpu_rev());
- /* TODO: Print ARM and DDR frequencies */
+ clk = get_sysboot_freq();
+ printf("OSC clk: %4lu.%03lu MHz\n",
+ clk / 1000000, clk / 1000 % 1000);
+ clk = clk_get_rate(cmwkup, mpu);
+ printf("MPU clk: %4lu.%03lu MHz\n",
+ clk / 1000000, clk / 1000 % 1000);
+ clk = clk_get_rate(cmwkup, ddr);
+ printf("DDR clk: %4lu.%03lu MHz\n",
+ clk / 1000000, clk / 1000 % 1000);
+ clk = clk_get_rate(cmwkup, per);
+ printf("PER clk: %4lu.%03lu MHz\n",
+ clk / 1000000, clk / 1000 % 1000);
+#ifdef CONFIG_LCD
+ clk = clk_get_rate(cmwkup, disp);
+ printf("LCD clk: %4lu.%03lu MHz\n",
+ clk / 1000000, clk / 1000 % 1000);
+#endif
return 0;
}