Merge branch 'master' of http://git.denx.de/u-boot-sunxi

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / start.S

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index fdc05b942f15bb80415c295faba6832e689d8b01..9b49ece2d650e199a1ed3415ed2ae47794f20fab 100644 (file)
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -31,9 +31,12 @@
  *************************************************************************/
 
        .globl  reset
+       .globl  save_boot_params_ret
 
 reset:
-       bl      save_boot_params
+       /* Allow the board to save important registers */
+       b       save_boot_params
+save_boot_params_ret:
        /*
         * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,
         * except if in HYP mode already
@@ -52,10 +55,10 @@ reset:
  * Continue to use ROM code vector only in OMAP4 spl)
  */
 #if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD))
-       /* Set V=0 in CP15 SCTRL register - for VBAR to point to vector */
-       mrc     p15, 0, r0, c1, c0, 0   @ Read CP15 SCTRL Register
+       /* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */
+       mrc     p15, 0, r0, c1, c0, 0   @ Read CP15 SCTLR Register
        bic     r0, #CR_V               @ V = 0
-       mcr     p15, 0, r0, c1, c0, 0   @ Write CP15 SCTRL Register
+       mcr     p15, 0, r0, c1, c0, 0   @ Write CP15 SCTLR Register
 
        /* Set vector address in CP15 VBAR register */
        ldr     r0, =_start
@@ -96,7 +99,7 @@ ENDPROC(c_runtime_cpu_setup)
  *
  *************************************************************************/
 ENTRY(save_boot_params)
-       bx      lr                      @ back to my caller
+       b       save_boot_params_ret            @ back to my caller
 ENDPROC(save_boot_params)
        .weak   save_boot_params