am33xx: Clean up unused DDR defines, prefix more with 'DDR2'

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / start.S

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index d23dc9d719b926cc7f2e3b978fbc728d1df8a2e8..aee27fdc4d33bac268b27961a28bd5504e1b908f 100644 (file)
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -33,6 +33,7 @@
 #include <config.h>
 #include <version.h>
 #include <asm/system.h>
+#include <linux/linkage.h>
 
 .globl _start
 _start: b      reset
@@ -82,18 +83,6 @@ _end_vect:
 _TEXT_BASE:
        .word   CONFIG_SYS_TEXT_BASE
 
-#ifdef CONFIG_TEGRA2
-/*
- * Tegra2 uses 2 separate CPUs - the AVP (ARM7TDMI) and the CPU (dual A9s).
- * U-Boot runs on the AVP first, setting things up for the CPU (PLLs,
- * muxes, clocks, clamps, etc.). Then the AVP halts, and expects the CPU
- * to pick up its reset vector, which points here.
- */
-.globl _armboot_start
-_armboot_start:
-       .word _start
-#endif
-
 /*
  * These are defined in the board-specific linker script.
  */
@@ -144,6 +133,7 @@ reset:
        orr     r0, r0, #0xd3
        msr     cpsr,r0
 
+#if !defined(CONFIG_TEGRA2)
 /*
  * Setup vector:
  * (OMAP4 spl TEXT_BASE is not 32 byte aligned.
@@ -159,9 +149,11 @@ reset:
        ldr     r0, =_start
        mcr     p15, 0, r0, c12, c0, 0  @Set VBAR
 #endif
+#endif /* !Tegra2 */
 
        /* the mask ROM code should have PLL and others stable */
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
+       bl      cpu_init_cp15
        bl      cpu_init_crit
 #endif
 
@@ -181,8 +173,7 @@ call_board_init_f:
  * after relocating the monitor code.
  *
  */
-       .globl  relocate_code
-relocate_code:
+ENTRY(relocate_code)
        mov     r4, r0  /* save addr_sp */
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
@@ -268,10 +259,12 @@ clear_bss:
 #endif
        mov     r2, #0x00000000         /* clear                            */
 
-clbss_l:str    r2, [r0]                /* clear loop...                    */
+clbss_l:cmp    r0, r1                  /* clear loop... */
+       bhs     clbss_e                 /* if reached end of bss, exit */
+       str     r2, [r0]
        add     r0, r0, #4
-       cmp     r0, r1
-       bne     clbss_l
+       b       clbss_l
+clbss_e:
 
 /*
  * We are done. Do not return, instead branch to second part of board
@@ -286,6 +279,18 @@ jump_2_ram:
        mcr     p15, 0, r0, c7, c10, 4  @ DSB
        mcr     p15, 0, r0, c7, c5, 4   @ ISB
 #endif
+/*
+ * Move vector table
+ */
+#if !defined(CONFIG_TEGRA2)
+#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD))
+       /* Set vector address in CP15 VBAR register */
+       ldr     r0, =_start
+       add     r0, r0, r9
+       mcr     p15, 0, r0, c12, c0, 0  @Set VBAR
+#endif
+#endif /* !Tegra2 */
+
        ldr     r0, _board_init_r_ofs
        adr     r1, _start
        add     lr, r0, r1
@@ -298,18 +303,17 @@ jump_2_ram:
 
 _board_init_r_ofs:
        .word board_init_r - _start
+ENDPROC(relocate_code)
 
-
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 /*************************************************************************
  *
- * CPU_init_critical registers
+ * cpu_init_cp15
  *
- * setup important registers
- * setup memory timing
+ * Setup CP15 registers (cache, MMU, TLBs). The I-cache is turned on unless
+ * CONFIG_SYS_ICACHE_OFF is defined.
  *
  *************************************************************************/
-cpu_init_crit:
+ENTRY(cpu_init_cp15)
        /*
         * Invalidate L1 I/D
         */
@@ -334,7 +338,19 @@ cpu_init_crit:
        orr     r0, r0, #0x00001000     @ set bit 12 (I) I-cache
 #endif
        mcr     p15, 0, r0, c1, c0, 0
+       mov     pc, lr                  @ back to my caller
+ENDPROC(cpu_init_cp15)
 
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+/*************************************************************************
+ *
+ * CPU_init_critical registers
+ *
+ * setup important registers
+ * setup memory timing
+ *
+ *************************************************************************/
+ENTRY(cpu_init_crit)
        /*
         * Jump to board specific initialization...
         * The Mask ROM will have already initialized
@@ -345,6 +361,7 @@ cpu_init_crit:
        bl      lowlevel_init           @ go setup pll,mux,memory
        mov     lr, ip                  @ restore link
        mov     pc, lr                  @ back to my caller
+ENDPROC(cpu_init_crit)
 #endif
 
 #ifndef CONFIG_SPL_BUILD