Unified codebase for TX28, TX48, TX51, TX53

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / tegra2 / funcmux.c

diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra2/funcmux.c
index 4fe6e06531ccd55737755222adf3b6bb30341a3f..0ef775302188a57b178e9f0ed78a3310fcc4b38e 100644 (file)
--- a/arch/arm/cpu/armv7/tegra2/funcmux.c
+++ b/arch/arm/cpu/armv7/tegra2/funcmux.c
@@ -106,6 +106,85 @@ int funcmux_select(enum periph_id id, int config)
                }
                break;
 
+       case PERIPH_ID_SDMMC2:
+               if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) {
+                       pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2);
+                       pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2);
+
+                       pinmux_tristate_disable(PINGRP_DTA);
+                       pinmux_tristate_disable(PINGRP_DTD);
+               }
+               break;
+
+       case PERIPH_ID_SDMMC3:
+               switch (config) {
+               case FUNCMUX_SDMMC3_SDB_SLXA_8BIT:
+                       pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3);
+                       pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3);
+                       pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3);
+                       pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3);
+
+                       pinmux_tristate_disable(PINGRP_SLXA);
+                       pinmux_tristate_disable(PINGRP_SLXC);
+                       pinmux_tristate_disable(PINGRP_SLXD);
+                       pinmux_tristate_disable(PINGRP_SLXK);
+                       /* fall through */
+
+               case FUNCMUX_SDMMC3_SDB_4BIT:
+                       pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
+                       pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
+                       pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
+
+                       pinmux_tristate_disable(PINGRP_SDB);
+                       pinmux_tristate_disable(PINGRP_SDC);
+                       pinmux_tristate_disable(PINGRP_SDD);
+                       bad_config = 0;
+                       break;
+               }
+               break;
+
+       case PERIPH_ID_SDMMC4:
+               switch (config) {
+               case FUNCMUX_SDMMC4_ATC_ATD_8BIT:
+                       pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4);
+                       pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4);
+
+                       pinmux_tristate_disable(PINGRP_ATC);
+                       pinmux_tristate_disable(PINGRP_ATD);
+                       break;
+
+               case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT:
+                       pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
+                       pinmux_tristate_disable(PINGRP_GME);
+                       /* fall through */
+
+               case FUNCMUX_SDMMC4_ATB_GMA_4_BIT:
+                       pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
+                       pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
+
+                       pinmux_tristate_disable(PINGRP_ATB);
+                       pinmux_tristate_disable(PINGRP_GMA);
+                       bad_config = 0;
+                       break;
+               }
+               break;
+
+       case PERIPH_ID_KBC:
+               if (config == FUNCMUX_DEFAULT) {
+                       enum pmux_pingrp grp[] = {PINGRP_KBCA, PINGRP_KBCB,
+                               PINGRP_KBCC, PINGRP_KBCD, PINGRP_KBCE,
+                               PINGRP_KBCF};
+                       int i;
+
+                       for (i = 0; i < ARRAY_SIZE(grp); i++) {
+                               pinmux_tristate_disable(grp[i]);
+                               pinmux_set_func(grp[i], PMUX_FUNC_KBC);
+                               pinmux_set_pullupdown(grp[i], PMUX_PULL_UP);
+                       }
+
+                       break;
+               }
+
        default:
                debug("%s: invalid periph_id %d", __func__, id);
                return -1;