arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45

[karo-tx-uboot.git] / arch / arm / cpu / at91-common / mpddrc.c

diff --git a/arch/arm/cpu/at91-common/mpddrc.c b/arch/arm/cpu/at91-common/mpddrc.c
index f78e4be6a6b5df89111b3a80e467d3a01fdcce44..44798e612c3b2e04cb456aa1c85b09429baa8ec9 100644 (file)
--- a/arch/arm/cpu/at91-common/mpddrc.c
+++ b/arch/arm/cpu/at91-common/mpddrc.c
@@ -17,6 +17,15 @@ static inline void atmel_mpddr_op(int mode, u32 ram_address)
        writel(0, ram_address);
 }
 
+static int ddr2_decodtype_is_seq(u32 cr)
+{
+#if defined(CONFIG_SAMA5D3)
+       if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
+               return 0;
+#endif
+       return 1;
+}
+
 int ddr2_init(const unsigned int ram_address,
              const struct atmel_mpddr *mpddr_value)
 {
@@ -25,7 +34,7 @@ int ddr2_init(const unsigned int ram_address,
 
        /* Compute bank offset according to NC in configuration register */
        ba_off = (mpddr_value->cr & ATMEL_MPDDRC_CR_NC_MASK) + 9;
-       if (!(mpddr_value->cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED))
+       if (ddr2_decodtype_is_seq(mpddr_value->cr))
                ba_off += ((mpddr_value->cr & ATMEL_MPDDRC_CR_NR_MASK) >> 2) + 11;
 
        ba_off += (mpddr_value->md & ATMEL_MPDDRC_MD_DBW_MASK) ? 1 : 2;