sunxi: Add support for the Auxtek-T003 HDMI stick

[karo-tx-uboot.git] / arch / arm / dts / tegra30.dtsi

diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi
index fb92a0fef96e0e5c4cfdf5c6f22de68af93ef33c..5ea7e347f3fad4c8acfc6ffc58432659e8093577 100644 (file)
--- a/arch/arm/dts/tegra30.dtsi
+++ b/arch/arm/dts/tegra30.dtsi
@@ -6,6 +6,89 @@
 
 / {
        compatible = "nvidia,tegra30";
+       interrupt-parent = <&intc>;
+
+       intc: interrupt-controller@50041000 {
+               compatible = "arm,cortex-a9-gic";
+               reg = <0x50041000 0x1000
+                      0x50040100 0x0100>;
+               interrupt-controller;
+               #interrupt-cells = <3>;
+       };
+
+       pcie-controller@00003000 {
+               compatible = "nvidia,tegra30-pcie";
+               device_type = "pci";
+               reg = <0x00003000 0x00000800   /* PADS registers */
+                      0x00003800 0x00000200   /* AFI registers */
+                      0x10000000 0x10000000>; /* configuration space */
+               reg-names = "pads", "afi", "cs";
+               interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH   /* controller interrupt */
+                             GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
+               interrupt-names = "intr", "msi";
+
+               #interrupt-cells = <1>;
+               interrupt-map-mask = <0 0 0 0>;
+               interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+
+               bus-range = <0x00 0xff>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+
+               ranges = <0x82000000 0 0x00000000 0x00000000 0 0x00001000   /* port 0 configuration space */
+                         0x82000000 0 0x00001000 0x00001000 0 0x00001000   /* port 1 configuration space */
+                         0x82000000 0 0x00004000 0x00004000 0 0x00001000   /* port 2 configuration space */
+                         0x81000000 0 0          0x02000000 0 0x00010000   /* downstream I/O */
+                         0x82000000 0 0x20000000 0x20000000 0 0x10000000   /* non-prefetchable memory */
+                         0xc2000000 0 0x30000000 0x30000000 0 0x10000000>; /* prefetchable memory */
+
+               clocks = <&tegra_car TEGRA30_CLK_PCIE>,
+                        <&tegra_car TEGRA30_CLK_AFI>,
+                        <&tegra_car TEGRA30_CLK_PCIEX>,
+                        <&tegra_car TEGRA30_CLK_PLL_E>,
+                        <&tegra_car TEGRA30_CLK_CML0>;
+               clock-names = "pex", "afi", "pcie_xclk", "pll_e", "cml";
+               status = "disabled";
+
+               pci@1,0 {
+                       device_type = "pci";
+                       assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>;
+                       reg = <0x000800 0 0 0 0>;
+                       status = "disabled";
+
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       ranges;
+
+                       nvidia,num-lanes = <2>;
+               };
+
+               pci@2,0 {
+                       device_type = "pci";
+                       assigned-addresses = <0x82001000 0 0x00001000 0 0x1000>;
+                       reg = <0x001000 0 0 0 0>;
+                       status = "disabled";
+
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       ranges;
+
+                       nvidia,num-lanes = <2>;
+               };
+
+               pci@3,0 {
+                       device_type = "pci";
+                       assigned-addresses = <0x82001800 0 0x00004000 0 0x1000>;
+                       reg = <0x001800 0 0 0 0>;
+                       status = "disabled";
+
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       ranges;
+
+                       nvidia,num-lanes = <2>;
+               };
+       };
 
        tegra_car: clock {
                compatible = "nvidia,tegra30-car";