/* RTC base address */
#define RTC_BASE 0x44E3E000
+/* USB OTG */
+#define USB_OTG_SS1_BASE 0x48390000
+#define USB_OTG_SS1_GLUE_BASE 0x48380000
+#define USB2_PHY1_POWER 0x44E10620
+
+#define USB_OTG_SS2_BASE 0x483D0000
+#define USB_OTG_SS2_GLUE_BASE 0x483C0000
+#define USB2_PHY2_POWER 0x44E10628
+
/* USB Clock Control */
#define PRM_PER_USB_OTG_SS0_CLKCTRL (CM_PER + 0x260)
#define PRM_PER_USB_OTG_SS1_CLKCTRL (CM_PER + 0x268)