ARM: vf610: Enable external 32KHz oscillator

[karo-tx-uboot.git] / arch / arm / include / asm / arch-vf610 / imx-regs.h

diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h
index 866b30372d20c162fd3dd0f9060a91de64df625d..aa60031b785a7d979f58e5d3f46ccdaa6ca7ef7b 100644 (file)
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -65,7 +65,7 @@
 #define QSPI0_BASE_ADDR                (AIPS0_BASE_ADDR + 0x00044000)
 #define IOMUXC_BASE_ADDR       (AIPS0_BASE_ADDR + 0x00048000)
 #define ANADIG_BASE_ADDR       (AIPS0_BASE_ADDR + 0x00050000)
-#define SCSCM_BASE_ADDR                (AIPS0_BASE_ADDR + 0x00052000)
+#define SCSC_BASE_ADDR         (AIPS0_BASE_ADDR + 0x00052000)
 #define ASRC_BASE_ADDR         (AIPS0_BASE_ADDR + 0x00060000)
 #define SPDIF_BASE_ADDR                (AIPS0_BASE_ADDR + 0x00061000)
 #define ESAI_BASE_ADDR         (AIPS0_BASE_ADDR + 0x00062000)
@@ -264,6 +264,9 @@
 #define SRC_SRSR_WDOG_A5                               (0x1 << 3)
 #define SRC_SRSR_POR_RST                               (0x1 << 0)
 
+/* Slow Clock Source Controller Module (SCSC) */
+#define SCSC_SOSC_CTR_SOSC_EN            0x1
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
 
@@ -448,6 +451,12 @@ struct mscm_ir {
        u16 rsvd3[848];
 };
 
+/* SCSC */
+struct scsc_reg {
+       u32 sirc_ctr;
+       u32 sosc_ctr;
+};
+
 #endif /* __ASSEMBLER__*/
 
 #endif /* __ASM_ARCH_IMX_REGS_H__ */