Merge branch 'devel-stable' into devel

[karo-tx-linux.git] / arch / arm / mach-ux500 / platsmp.c

diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index ade2e17f253c3665767d26d66c703ad9d1485bc1..d77e76cb7edd2eb107e74eb9200b39bcda5a6b39 100644 (file)
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -18,7 +18,6 @@
 #include <linux/io.h>
 
 #include <asm/cacheflush.h>
-#include <asm/localtimer.h>
 #include <asm/smp_scu.h>
 #include <mach/hardware.h>
 
@@ -28,29 +27,35 @@
  */
 volatile int pen_release = -1;
 
-static unsigned int __init get_core_count(void)
+/*
+ * Write pen_release in a way that is guaranteed to be visible to all
+ * observers, irrespective of whether they're taking part in coherency
+ * or not.  This is necessary for the hotplug code to work reliably.
+ */
+static void write_pen_release(int val)
 {
-       return scu_get_core_count(__io_address(UX500_SCU_BASE));
+       pen_release = val;
+       smp_wmb();
+       __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
+       outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
 }
 
 static DEFINE_SPINLOCK(boot_lock);
 
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
-       trace_hardirqs_off();
-
        /*
         * if any interrupts are already enabled for the primary
         * core (e.g. timer irq), then they will not have been enabled
         * for us: do so
         */
-       gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
+       gic_secondary_init(0);
 
        /*
         * let the primary processor know we're out of the
         * pen, then head off into the C entry point
         */
-       pen_release = -1;
+       write_pen_release(-1);
 
        /*
         * Synchronise with the boot thread.
@@ -74,11 +79,9 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
         * the holding pen - release it, then wait for it to flag
         * that it has been released by resetting pen_release.
         */
-       pen_release = cpu;
-       __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
-       outer_clean_range(__pa(&pen_release), __pa(&pen_release) + 1);
+       write_pen_release(cpu);
 
-       smp_cross_call(cpumask_of(cpu));
+       smp_cross_call(cpumask_of(cpu), 1);
 
        timeout = jiffies + (1 * HZ);
        while (time_before(jiffies, timeout)) {
@@ -97,9 +100,6 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 
 static void __init wakeup_secondary(void)
 {
-       /* nobody is to be released from the pen yet */
-       pen_release = -1;
-
        /*
         * write the address of secondary startup into the backup ram register
         * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the
@@ -126,40 +126,26 @@ static void __init wakeup_secondary(void)
  */
 void __init smp_init_cpus(void)
 {
-       unsigned int i, ncores = get_core_count();
+       unsigned int i, ncores;
 
-       for (i = 0; i < ncores; i++)
-               set_cpu_possible(i, true);
-}
-
-void __init smp_prepare_cpus(unsigned int max_cpus)
-{
-       unsigned int ncores = get_core_count();
-       unsigned int cpu = smp_processor_id();
-       int i;
+       ncores = scu_get_core_count(__io_address(UX500_SCU_BASE));
 
        /* sanity check */
-       if (ncores == 0) {
-               printk(KERN_ERR
-                      "U8500: strange CM count of 0? Default to 1\n");
-               ncores = 1;
-       }
-
-       if (ncores > num_possible_cpus())       {
+       if (ncores > NR_CPUS) {
                printk(KERN_WARNING
                       "U8500: no. of cores (%d) greater than configured "
                       "maximum of %d - clipping\n",
-                      ncores, num_possible_cpus());
-               ncores = num_possible_cpus();
+                      ncores, NR_CPUS);
+               ncores = NR_CPUS;
        }
 
-       smp_store_cpu_info(cpu);
+       for (i = 0; i < ncores; i++)
+               set_cpu_possible(i, true);
+}
 
-       /*
-        * are we trying to boot more cores than exist?
-        */
-       if (max_cpus > ncores)
-               max_cpus = ncores;
+void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+{
+       int i;
 
        /*
         * Initialise the present map, which describes the set of CPUs
@@ -168,13 +154,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
        for (i = 0; i < max_cpus; i++)
                set_cpu_present(i, true);
 
-       if (max_cpus > 1) {
-               /*
-                * Enable the local timer or broadcast device for the
-                * boot CPU, but only if we have more than one CPU.
-                */
-               percpu_timer_setup();
-               scu_enable(__io_address(UX500_SCU_BASE));
-               wakeup_secondary();
-       }
+       scu_enable(__io_address(UX500_SCU_BASE));
+       wakeup_secondary();
 }