Merge nommu branch

[karo-tx-linux.git] / arch / arm / mm / proc-xscale.S

diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 861b35947280fcc78897c01df1e3c9a8dc0da265..535395e25a8a5b90de9f2e61277ef8ade7632446 100644 (file)
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -24,8 +24,8 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/procinfo.h>
-#include <asm/hardware.h>
 #include <asm/pgtable.h>
+#include <asm/pgtable-hwdef.h>
 #include <asm/page.h>
 #include <asm/ptrace.h>
 #include "proc-macros.S"
@@ -241,7 +241,15 @@ ENTRY(xscale_flush_user_cache_range)
  *     it also trashes the mini I-cache used by JTAG debuggers.
  */
 ENTRY(xscale_coherent_kern_range)
-       /* FALLTHROUGH */
+       bic     r0, r0, #CACHELINESIZE - 1
+1:     mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
+       add     r0, r0, #CACHELINESIZE
+       cmp     r0, r1
+       blo     1b
+       mov     r0, #0
+       mcr     p15, 0, r0, c7, c5, 0           @ Invalidate I cache & BTB
+       mcr     p15, 0, r0, c7, c10, 4          @ Drain Write (& Fill) Buffer
+       mov     pc, lr
 
 /*
  *     coherent_user_range(start, end)
@@ -252,18 +260,16 @@ ENTRY(xscale_coherent_kern_range)
  *
  *     - start  - virtual start address
  *     - end    - virtual end address
- *
- *     Note: single I-cache line invalidation isn't used here since
- *     it also trashes the mini I-cache used by JTAG debuggers.
  */
 ENTRY(xscale_coherent_user_range)
        bic     r0, r0, #CACHELINESIZE - 1
 1:     mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
+       mcr     p15, 0, r0, c7, c5, 1           @ Invalidate I cache entry
        add     r0, r0, #CACHELINESIZE
        cmp     r0, r1
        blo     1b
        mov     r0, #0
-       mcr     p15, 0, r0, c7, c5, 0           @ Invalidate I cache & BTB
+       mcr     p15, 0, r0, c7, c5, 6           @ Invalidate BTB
        mcr     p15, 0, r0, c7, c10, 4          @ Drain Write (& Fill) Buffer
        mov     pc, lr
 
@@ -469,11 +475,12 @@ __xscale_setup:
        orr     r0, r0, #1 << 6                 @ cp6 for IOP3xx and Bulverde
        orr     r0, r0, #1 << 13                @ Its undefined whether this
        mcr     p15, 0, r0, c15, c1, 0          @ affects USR or SVC modes
+
+       adr     r5, xscale_crval
+       ldmia   r5, {r5, r6}
        mrc     p15, 0, r0, c1, c0, 0           @ get control register
-       ldr     r5, xscale_cr1_clear
        bic     r0, r0, r5
-       ldr     r5, xscale_cr1_set
-       orr     r0, r0, r5
+       orr     r0, r0, r6
        mov     pc, lr
        .size   __xscale_setup, . - __xscale_setup
 
@@ -483,12 +490,9 @@ __xscale_setup:
         * ..11 1.01 .... .101
         * 
         */
-       .type   xscale_cr1_clear, #object
-       .type   xscale_cr1_set, #object
-xscale_cr1_clear:
-       .word   0x3b07
-xscale_cr1_set:
-       .word   0x3905
+       .type   xscale_crval, #object
+xscale_crval:
+       crval   clear=0x00003b07, mmuset=0x00003905, ucset=0x00001900
 
        __INITDATA
 
@@ -589,6 +593,9 @@ __80200_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -609,6 +616,9 @@ __8032x_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -629,6 +639,9 @@ __8033x_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -649,6 +662,9 @@ __pxa250_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -669,6 +685,9 @@ __pxa210_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -689,6 +708,9 @@ __ixp2400_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -709,6 +731,9 @@ __ixp2800_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -729,6 +754,9 @@ __ixp42x_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -744,7 +772,14 @@ __ixp42x_proc_info:
 __ixp46x_proc_info:
        .long   0x69054200
        .long   0xffffff00
-       .long   0x00000c0e
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_BUFFERABLE | \
+               PMD_SECT_CACHEABLE | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -765,6 +800,9 @@ __pxa255_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -785,6 +823,9 @@ __pxa270_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name