Merge branch 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[karo-tx-linux.git] / arch / arm64 / kernel / cpufeature.c

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 5ad86ceac010167870ac8b3354f2711094b3864f..3c9aed32f70b2113773f671053a0f6ac87632b4a 100644 (file)
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -21,24 +21,57 @@
 #include <linux/types.h>
 #include <asm/cpu.h>
 #include <asm/cpufeature.h>
+#include <asm/processor.h>
 
 static bool
-has_id_aa64pfr0_feature(const struct arm64_cpu_capabilities *entry)
+feature_matches(u64 reg, const struct arm64_cpu_capabilities *entry)
 {
-       u64 val;
+       int val = cpuid_feature_extract_field(reg, entry->field_pos);
 
-       val = read_cpuid(id_aa64pfr0_el1);
-       return (val & entry->register_mask) == entry->register_value;
+       return val >= entry->min_field_value;
 }
 
+#define __ID_FEAT_CHK(reg)                                             \
+static bool __maybe_unused                                             \
+has_##reg##_feature(const struct arm64_cpu_capabilities *entry)                \
+{                                                                      \
+       u64 val;                                                        \
+                                                                       \
+       val = read_cpuid(reg##_el1);                                    \
+       return feature_matches(val, entry);                             \
+}
+
+__ID_FEAT_CHK(id_aa64pfr0);
+__ID_FEAT_CHK(id_aa64mmfr1);
+__ID_FEAT_CHK(id_aa64isar0);
+
 static const struct arm64_cpu_capabilities arm64_features[] = {
        {
                .desc = "GIC system register CPU interface",
                .capability = ARM64_HAS_SYSREG_GIC_CPUIF,
                .matches = has_id_aa64pfr0_feature,
-               .register_mask = (0xf << 24),
-               .register_value = (1 << 24),
+               .field_pos = 24,
+               .min_field_value = 1,
+       },
+#ifdef CONFIG_ARM64_PAN
+       {
+               .desc = "Privileged Access Never",
+               .capability = ARM64_HAS_PAN,
+               .matches = has_id_aa64mmfr1_feature,
+               .field_pos = 20,
+               .min_field_value = 1,
+               .enable = cpu_enable_pan,
        },
+#endif /* CONFIG_ARM64_PAN */
+#if defined(CONFIG_AS_LSE) && defined(CONFIG_ARM64_LSE_ATOMICS)
+       {
+               .desc = "LSE atomic instructions",
+               .capability = ARM64_HAS_LSE_ATOMICS,
+               .matches = has_id_aa64isar0_feature,
+               .field_pos = 20,
+               .min_field_value = 2,
+       },
+#endif /* CONFIG_AS_LSE && CONFIG_ARM64_LSE_ATOMICS */
        {},
 };
 
@@ -55,9 +88,15 @@ void check_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
                        pr_info("%s %s\n", info, caps[i].desc);
                cpus_set_cap(caps[i].capability);
        }
+
+       /* second pass allows enable() to consider interacting capabilities */
+       for (i = 0; caps[i].desc; i++) {
+               if (cpus_have_cap(caps[i].capability) && caps[i].enable)
+                       caps[i].enable();
+       }
 }
 
 void check_local_cpu_features(void)
 {
-       check_cpu_capabilities(arm64_features, "detected feature");
+       check_cpu_capabilities(arm64_features, "detected feature:");
 }