sh r6, r0, r8
#endif
-#ifdef CONFIG_SYS_INTC_0
/* interrupt_handler */
swi r2, r0, 0x10 /* interrupt - imm opcode */
swi r3, r0, 0x14 /* interrupt - brai opcode */
sh r7, r0, r8
rsubi r8, r10, 0x16
sh r6, r0, r8
-#endif
/* hardware exception */
swi r2, r0, 0x20 /* hardware exception - imm opcode */
rsubi r8, r10, 0x26
sh r6, r0, r8
+ /* Flush cache before enable cache */
+ addik r5, r0, 0
+ addik r6, r0, XILINX_DCACHE_BYTE_SIZE
+flush: bralid r15, flush_cache
+ nop
+
/* enable instruction and data cache */
mfs r12, rmsr
ori r12, r12, 0xa0
cmp r6, r5, r4 /* check if we have reach the end */
bnei r6, 2b
3: /* jumping to board_init */
- brai board_init
+ brai board_init_f
1: bri 1b
/*