Merge remote-tracking branch 'idle/next'

[karo-tx-linux.git] / arch / powerpc / platforms / powernv / pci-ioda.c

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 74a5a5773b1fbce0c31f567ef6536e75038fff98..c639af7d4826b595f8b28ded90497f677c5ff5fa 100644 (file)
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -70,6 +70,16 @@ define_pe_printk_level(pe_err, KERN_ERR);
 define_pe_printk_level(pe_warn, KERN_WARNING);
 define_pe_printk_level(pe_info, KERN_INFO);
 
+/*
+ * stdcix is only supposed to be used in hypervisor real mode as per
+ * the architecture spec
+ */
+static inline void __raw_rm_writeq(u64 val, volatile void __iomem *paddr)
+{
+       __asm__ __volatile__("stdcix %0,0,%1"
+               : : "r" (val), "r" (paddr) : "memory");
+}
+
 static int pnv_ioda_alloc_pe(struct pnv_phb *phb)
 {
        unsigned long pe;
@@ -454,10 +464,13 @@ static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, struct pci_bus *bus)
        }
 }
 
-static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
-                                        u64 *startp, u64 *endp)
+static void pnv_pci_ioda1_tce_invalidate(struct pnv_ioda_pe *pe,
+                                        struct iommu_table *tbl,
+                                        __be64 *startp, __be64 *endp, bool rm)
 {
-       u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index;
+       __be64 __iomem *invalidate = rm ?
+               (__be64 __iomem *)pe->tce_inval_reg_phys :
+               (__be64 __iomem *)tbl->it_index;
        unsigned long start, end, inc;
 
        start = __pa(startp);
@@ -484,7 +497,10 @@ static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
 
         mb(); /* Ensure above stores are visible */
         while (start <= end) {
-                __raw_writeq(start, invalidate);
+               if (rm)
+                       __raw_rm_writeq(cpu_to_be64(start), invalidate);
+               else
+                       __raw_writeq(cpu_to_be64(start), invalidate);
                 start += inc;
         }
 
@@ -496,10 +512,12 @@ static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
 
 static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe,
                                         struct iommu_table *tbl,
-                                        u64 *startp, u64 *endp)
+                                        __be64 *startp, __be64 *endp, bool rm)
 {
        unsigned long start, end, inc;
-       u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index;
+       __be64 __iomem *invalidate = rm ?
+               (__be64 __iomem *)pe->tce_inval_reg_phys :
+               (__be64 __iomem *)tbl->it_index;
 
        /* We'll invalidate DMA address in PE scope */
        start = 0x2ul << 60;
@@ -515,22 +533,25 @@ static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe,
        mb();
 
        while (start <= end) {
-               __raw_writeq(start, invalidate);
+               if (rm)
+                       __raw_rm_writeq(cpu_to_be64(start), invalidate);
+               else
+                       __raw_writeq(cpu_to_be64(start), invalidate);
                start += inc;
        }
 }
 
 void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
-                                u64 *startp, u64 *endp)
+                                __be64 *startp, __be64 *endp, bool rm)
 {
        struct pnv_ioda_pe *pe = container_of(tbl, struct pnv_ioda_pe,
                                              tce32_table);
        struct pnv_phb *phb = pe->phb;
 
        if (phb->type == PNV_PHB_IODA1)
-               pnv_pci_ioda1_tce_invalidate(tbl, startp, endp);
+               pnv_pci_ioda1_tce_invalidate(pe, tbl, startp, endp, rm);
        else
-               pnv_pci_ioda2_tce_invalidate(pe, tbl, startp, endp);
+               pnv_pci_ioda2_tce_invalidate(pe, tbl, startp, endp, rm);
 }
 
 static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
@@ -603,7 +624,9 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
                 * bus number, print that out instead.
                 */
                tbl->it_busno = 0;
-               tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
+               pe->tce_inval_reg_phys = be64_to_cpup(swinvp);
+               tbl->it_index = (unsigned long)ioremap(pe->tce_inval_reg_phys,
+                               8);
                tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE |
                               TCE_PCI_SWINV_PAIR;
        }
@@ -681,7 +704,9 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
                 * bus number, print that out instead.
                 */
                tbl->it_busno = 0;
-               tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
+               pe->tce_inval_reg_phys = be64_to_cpup(swinvp);
+               tbl->it_index = (unsigned long)ioremap(pe->tce_inval_reg_phys,
+                               8);
                tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
        }
        iommu_init_table(tbl, phb->hose->node);
@@ -786,8 +811,7 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
        struct irq_data *idata;
        struct irq_chip *ichip;
        unsigned int xive_num = hwirq - phb->msi_base;
-       uint64_t addr64;
-       uint32_t addr32, data;
+       __be32 data;
        int rc;
 
        /* No PE assigned ? bail out ... no MSI for you ! */
@@ -811,6 +835,8 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
        }
 
        if (is_64) {
+               __be64 addr64;
+
                rc = opal_get_msi_64(phb->opal_id, pe->mve_number, xive_num, 1,
                                     &addr64, &data);
                if (rc) {
@@ -818,9 +844,11 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
                                pci_name(dev), rc);
                        return -EIO;
                }
-               msg->address_hi = addr64 >> 32;
-               msg->address_lo = addr64 & 0xfffffffful;
+               msg->address_hi = be64_to_cpu(addr64) >> 32;
+               msg->address_lo = be64_to_cpu(addr64) & 0xfffffffful;
        } else {
+               __be32 addr32;
+
                rc = opal_get_msi_32(phb->opal_id, pe->mve_number, xive_num, 1,
                                     &addr32, &data);
                if (rc) {
@@ -829,9 +857,9 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
                        return -EIO;
                }
                msg->address_hi = 0;
-               msg->address_lo = addr32;
+               msg->address_lo = be32_to_cpu(addr32);
        }
-       msg->data = data;
+       msg->data = be32_to_cpu(data);
 
        /*
         * Change the IRQ chip for the MSI interrupts on PHB3.
@@ -1106,8 +1134,8 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
        struct pci_controller *hose;
        struct pnv_phb *phb;
        unsigned long size, m32map_off, iomap_off, pemap_off;
-       const u64 *prop64;
-       const u32 *prop32;
+       const __be64 *prop64;
+       const __be32 *prop32;
        int len;
        u64 phb_id;
        void *aux;
@@ -1142,8 +1170,8 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
        spin_lock_init(&phb->lock);
        prop32 = of_get_property(np, "bus-range", &len);
        if (prop32 && len == 8) {
-               hose->first_busno = prop32[0];
-               hose->last_busno = prop32[1];
+               hose->first_busno = be32_to_cpu(prop32[0]);
+               hose->last_busno = be32_to_cpu(prop32[1]);
        } else {
                pr_warn("  Broken <bus-range> on %s\n", np->full_name);
                hose->first_busno = 0;
@@ -1175,7 +1203,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
        if (!prop32)
                phb->ioda.total_pe = 1;
        else
-               phb->ioda.total_pe = *prop32;
+               phb->ioda.total_pe = be32_to_cpup(prop32);
 
        phb->ioda.m32_size = resource_size(&hose->mem_resources[0]);
        /* FW Has already off top 64k of M32 space (MSI space) */
@@ -1285,7 +1313,7 @@ void __init pnv_pci_init_ioda2_phb(struct device_node *np)
 void __init pnv_pci_init_ioda_hub(struct device_node *np)
 {
        struct device_node *phbn;
-       const u64 *prop64;
+       const __be64 *prop64;
        u64 hub_id;
 
        pr_info("Probing IODA IO-Hub %s\n", np->full_name);