perf/x86/intel: Add Haswell PEBS record support

[karo-tx-linux.git] / arch / x86 / kernel / cpu / perf_event.c

diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index e52a9e57778319a2f1098fab588d4cc8011c1496..ab3395295224fb9a436bc8d170589dc064d87ac7 100644 (file)
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -403,7 +403,8 @@ int x86_pmu_hw_config(struct perf_event *event)
                 * check that PEBS LBR correction does not conflict with
                 * whatever the user is asking with attr->branch_sample_type
                 */
-               if (event->attr.precise_ip > 1) {
+               if (event->attr.precise_ip > 1 &&
+                   x86_pmu.intel_cap.pebs_format < 2) {
                        u64 *br_type = &event->attr.branch_sample_type;
 
                        if (has_branch_stack(event)) {